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| Commit | Line | Data |
|---|---|---|
| 334bc118 LP |
1 | * Renesas SH-Mobile Serial Communication Interface |
| 2 | ||
| 3 | Required properties: | |
| 4 | ||
| 5 | - compatible: Must contain one of the following: | |
| 6 | ||
| 34c4eda8 SH |
7 | - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART. |
| 8 | - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART. | |
| 9 | - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. | |
| 10 | - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. | |
| 11 | - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. | |
| 12 | - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART. | |
| 13 | - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. | |
| 81bd1eb7 | 14 | - "renesas,scif-r8a7779" for R8A7779 (R-Car H1) SCIF compatible UART. |
| 334bc118 LP |
15 | - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. |
| 16 | - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART. | |
| 17 | - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART. | |
| 18 | - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART. | |
| 19 | - "renesas,scif-r8a7791" for R8A7791 (R-Car M2) SCIF compatible UART. | |
| 20 | - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART. | |
| 21 | - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART. | |
| 22 | - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART. | |
| 23 | - "renesas,scif" for generic SCIF compatible UART. | |
| 24 | - "renesas,scifa" for generic SCIFA compatible UART. | |
| 25 | - "renesas,scifb" for generic SCIFB compatible UART. | |
| 26 | - "renesas,hscif" for generic HSCIF compatible UART. | |
| 27 | ||
| 28 | When compatible with the generic version, nodes must list the | |
| 29 | SoC-specific version corresponding to the platform first followed by the | |
| 30 | generic version. | |
| 31 | ||
| 32 | - reg: Base address and length of the I/O registers used by the UART. | |
| 33 | - interrupts: Must contain an interrupt-specifier for the SCIx interrupt. | |
| 34 | ||
| 35 | - clocks: Must contain a phandle and clock-specifier pair for each entry | |
| 36 | in clock-names. | |
| 37 | - clock-names: Must contain "sci_ick" for the SCIx UART interface clock. | |
| 38 | ||
| 39 | Note: Each enabled SCIx UART should have an alias correctly numbered in the | |
| 40 | "aliases" node. | |
| 41 | ||
| 42 | Example: | |
| 43 | aliases { | |
| 44 | serial0 = &scifa0; | |
| 45 | }; | |
| 46 | ||
| 47 | scifa0: serial@e6c40000 { | |
| 25eb50b9 | 48 | compatible = "renesas,scifa-r8a7790", "renesas,scifa"; |
| 334bc118 LP |
49 | reg = <0 0xe6c40000 0 64>; |
| 50 | interrupt-parent = <&gic>; | |
| 51 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 52 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; | |
| 53 | clock-names = "sci_ick"; | |
| 54 | }; |