projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 334bc118 LP |
1 | * Renesas SH-Mobile Serial Communication Interface |
| 2 | ||
| 3 | Required properties: | |
| 4 | ||
| 5 | - compatible: Must contain one of the following: | |
| 6 | ||
| 7 | - "renesas,scif-r8a7790" for R8A7790 (R-Car H2) SCIF compatible UART. | |
| 8 | - "renesas,scifa-r8a7790" for R8A7790 (R-Car H2) SCIFA compatible UART. | |
| 9 | - "renesas,scifb-r8a7790" for R8A7790 (R-Car H2) SCIFB compatible UART. | |
| 10 | - "renesas,hscif-r8a7790" for R8A7790 (R-Car H2) HSCIF compatible UART. | |
| 11 | - "renesas,scif-r8a7791" for R8A7791 (R-Car M2) SCIF compatible UART. | |
| 12 | - "renesas,scifa-r8a7791" for R8A7791 (R-Car M2) SCIFA compatible UART. | |
| 13 | - "renesas,scifb-r8a7791" for R8A7791 (R-Car M2) SCIFB compatible UART. | |
| 14 | - "renesas,hscif-r8a7791" for R8A7791 (R-Car M2) HSCIF compatible UART. | |
| 15 | - "renesas,scif" for generic SCIF compatible UART. | |
| 16 | - "renesas,scifa" for generic SCIFA compatible UART. | |
| 17 | - "renesas,scifb" for generic SCIFB compatible UART. | |
| 18 | - "renesas,hscif" for generic HSCIF compatible UART. | |
| 19 | ||
| 20 | When compatible with the generic version, nodes must list the | |
| 21 | SoC-specific version corresponding to the platform first followed by the | |
| 22 | generic version. | |
| 23 | ||
| 24 | - reg: Base address and length of the I/O registers used by the UART. | |
| 25 | - interrupts: Must contain an interrupt-specifier for the SCIx interrupt. | |
| 26 | ||
| 27 | - clocks: Must contain a phandle and clock-specifier pair for each entry | |
| 28 | in clock-names. | |
| 29 | - clock-names: Must contain "sci_ick" for the SCIx UART interface clock. | |
| 30 | ||
| 31 | Note: Each enabled SCIx UART should have an alias correctly numbered in the | |
| 32 | "aliases" node. | |
| 33 | ||
| 34 | Example: | |
| 35 | aliases { | |
| 36 | serial0 = &scifa0; | |
| 37 | }; | |
| 38 | ||
| 39 | scifa0: serial@e6c40000 { | |
| 25eb50b9 | 40 | compatible = "renesas,scifa-r8a7790", "renesas,scifa"; |
| 334bc118 LP |
41 | reg = <0 0xe6c40000 0 64>; |
| 42 | interrupt-parent = <&gic>; | |
| 43 | interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 44 | clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>; | |
| 45 | clock-names = "sci_ick"; | |
| 46 | }; |