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7d4008eb JI |
1 | * Synopsys DesignWare ABP UART |
2 | ||
3 | Required properties: | |
4 | - compatible : "snps,dw-apb-uart" | |
5 | - reg : offset and length of the register set for the device. | |
6 | - interrupts : should contain uart interrupt. | |
7d78cbef HS |
7 | |
8 | Clock handling: | |
9 | The clock rate of the input clock needs to be supplied by one of | |
7d4008eb | 10 | - clock-frequency : the input clock frequency for the UART. |
7d78cbef HS |
11 | - clocks : phandle to the input clock |
12 | ||
13 | The supplying peripheral clock can also be handled, needing a second property | |
14 | - clock-names: tuple listing input clock names. | |
15 | Required elements: "baudclk", "apb_pclk" | |
7d4008eb JI |
16 | |
17 | Optional properties: | |
7fe090bf | 18 | - resets : phandle to the parent reset controller. |
7d4008eb JI |
19 | - reg-shift : quantity to shift the register offsets by. If this property is |
20 | not present then the register offsets are not shifted. | |
21 | - reg-io-width : the size (in bytes) of the IO accesses that should be | |
22 | performed on the device. If this property is not present then single byte | |
23 | accesses are used. | |
dfd37668 DL |
24 | - dcd-override : Override the DCD modem status signal. This signal will always |
25 | be reported as active instead of being obtained from the modem status | |
26 | register. Define this if your serial port does not use this pin. | |
27 | - dsr-override : Override the DTS modem status signal. This signal will always | |
28 | be reported as active instead of being obtained from the modem status | |
29 | register. Define this if your serial port does not use this pin. | |
30 | - cts-override : Override the CTS modem status signal. This signal will always | |
31 | be reported as active instead of being obtained from the modem status | |
32 | register. Define this if your serial port does not use this pin. | |
33 | - ri-override : Override the RI modem status signal. This signal will always be | |
34 | reported as inactive instead of being obtained from the modem status register. | |
35 | Define this if your serial port does not use this pin. | |
7d4008eb JI |
36 | |
37 | Example: | |
38 | ||
39 | uart@80230000 { | |
40 | compatible = "snps,dw-apb-uart"; | |
41 | reg = <0x80230000 0x100>; | |
42 | clock-frequency = <3686400>; | |
43 | interrupts = <10>; | |
44 | reg-shift = <2>; | |
45 | reg-io-width = <4>; | |
dfd37668 DL |
46 | dcd-override; |
47 | dsr-override; | |
48 | cts-override; | |
49 | ri-override; | |
7d4008eb | 50 | }; |
7d78cbef HS |
51 | |
52 | Example with one clock: | |
53 | ||
54 | uart@80230000 { | |
55 | compatible = "snps,dw-apb-uart"; | |
56 | reg = <0x80230000 0x100>; | |
57 | clocks = <&baudclk>; | |
58 | interrupts = <10>; | |
59 | reg-shift = <2>; | |
60 | reg-io-width = <4>; | |
61 | }; | |
62 | ||
63 | Example with two clocks: | |
64 | ||
65 | uart@80230000 { | |
66 | compatible = "snps,dw-apb-uart"; | |
67 | reg = <0x80230000 0x100>; | |
68 | clocks = <&baudclk>, <&apb_pclk>; | |
69 | clock-names = "baudclk", "apb_pclk"; | |
70 | interrupts = <10>; | |
71 | reg-shift = <2>; | |
72 | reg-io-width = <4>; | |
73 | }; |