projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a31ebc34 DM |
1 | Cirrus Logic CS4271 DT bindings |
| 2 | ||
| 3 | This driver supports both the I2C and the SPI bus. | |
| 4 | ||
| 5 | Required properties: | |
| 6 | ||
| 7 | - compatible: "cirrus,cs4271" | |
| 8 | ||
| 9 | For required properties on SPI, please consult | |
| 10 | Documentation/devicetree/bindings/spi/spi-bus.txt | |
| 11 | ||
| 12 | Required properties on I2C: | |
| 13 | ||
| 14 | - reg: the i2c address | |
| 15 | ||
| 16 | ||
| 17 | Optional properties: | |
| 18 | ||
| 19 | - reset-gpio: a GPIO spec to define which pin is connected to the chip's | |
| 20 | !RESET pin | |
| 293750f9 DM |
21 | - cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag |
| 22 | is enabled. | |
| fd23fb9f DM |
23 | - cirrus,enable-soft-reset: |
| 24 | The CS4271 requires its LRCLK and MCLK to be stable before its RESET | |
| 25 | line is de-asserted. That also means that clocks cannot be changed | |
| 26 | without putting the chip back into hardware reset, which also requires | |
| 27 | a complete re-initialization of all registers. | |
| 28 | ||
| 29 | One (undocumented) workaround is to assert and de-assert the PDN bit | |
| 30 | in the MODE2 register. This workaround can be enabled with this DT | |
| 31 | property. | |
| 32 | ||
| 33 | Note that this is not needed in case the clocks are stable | |
| 34 | throughout the entire runtime of the codec. | |
| a31ebc34 | 35 | |
| 9a397f47 PH |
36 | - vd-supply: Digital power |
| 37 | - vl-supply: Logic power | |
| 38 | - va-supply: Analog Power | |
| 39 | ||
| a31ebc34 DM |
40 | Examples: |
| 41 | ||
| 42 | codec_i2c: cs4271@10 { | |
| 43 | compatible = "cirrus,cs4271"; | |
| 44 | reg = <0x10>; | |
| 45 | reset-gpio = <&gpio 23 0>; | |
| 9a397f47 PH |
46 | vd-supply = <&vdd_3v3_reg>; |
| 47 | vl-supply = <&vdd_3v3_reg>; | |
| 48 | va-supply = <&vdd_3v3_reg>; | |
| a31ebc34 DM |
49 | }; |
| 50 | ||
| 51 | codec_spi: cs4271@0 { | |
| 52 | compatible = "cirrus,cs4271"; | |
| 53 | reg = <0x0>; | |
| 54 | reset-gpio = <&gpio 23 0>; | |
| 55 | spi-max-frequency = <6000000>; | |
| 56 | }; | |
| 57 |