Commit | Line | Data |
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d8b58e0b AJ |
1 | DesignWare I2S controller |
2 | ||
3 | Required properties: | |
4 | - compatible : Must be "snps,designware-i2s" | |
5 | - reg : Must contain the I2S core's registers location and length | |
6 | - clocks : Pairs of phandle and specifier referencing the controller's | |
7 | clocks. The controller expects one clock: the clock used as the sampling | |
8 | rate reference clock sample. | |
9 | - clock-names : "i2sclk" for the sample rate reference clock. | |
10 | - dmas: Pairs of phandle and specifier for the DMA channels that are used by | |
11 | the core. The core expects one or two dma channels: one for transmit and | |
12 | one for receive. | |
13 | - dma-names : "tx" for the transmit channel, "rx" for the receive channel. | |
14 | ||
5aa1418d JA |
15 | Optional properties: |
16 | - interrupts: The interrupt line number for the I2S controller. Add this | |
17 | parameter if the I2S controller that you are using does not support DMA. | |
18 | ||
d8b58e0b AJ |
19 | For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' |
20 | properties please check: | |
21 | * resource-names.txt | |
22 | * clock/clock-bindings.txt | |
23 | * dma/dma.txt | |
24 | ||
25 | Example: | |
26 | ||
27 | soc_i2s: i2s@7ff90000 { | |
28 | compatible = "snps,designware-i2s"; | |
29 | reg = <0x0 0x7ff90000 0x0 0x1000>; | |
30 | clocks = <&scpi_i2sclk 0>; | |
31 | clock-names = "i2sclk"; | |
32 | #sound-dai-cells = <0>; | |
33 | dmas = <&dma0 5>; | |
34 | dma-names = "tx"; | |
35 | }; |