Commit | Line | Data |
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b6344859 XL |
1 | Freescale Synchronous Audio Interface (SAI). |
2 | ||
3 | The SAI is based on I2S module that used communicating with audio codecs, | |
4 | which provides a synchronous audio interface that supports fullduplex | |
5 | serial interfaces with frame synchronization such as I2S, AC97, TDM, and | |
6 | codec/DSP interfaces. | |
7 | ||
b6344859 | 8 | Required properties: |
0b9938b2 | 9 | |
1593af62 FE |
10 | - compatible : Compatible list, contains "fsl,vf610-sai", |
11 | "fsl,imx6sx-sai" or "fsl,imx6ul-sai" | |
0b9938b2 NC |
12 | |
13 | - reg : Offset and length of the register set for the device. | |
14 | ||
15 | - clocks : Must contain an entry for each entry in clock-names. | |
16 | ||
17 | - clock-names : Must include the "bus" for register access and | |
18 | "mclk1", "mclk2", "mclk3" for bit clock and frame | |
19 | clock providing. | |
20 | - dmas : Generic dma devicetree binding as described in | |
21 | Documentation/devicetree/bindings/dma/dma.txt. | |
22 | ||
23 | - dma-names : Two dmas have to be defined, "tx" and "rx". | |
24 | ||
25 | - pinctrl-names : Must contain a "default" entry. | |
26 | ||
27 | - pinctrl-NNN : One property must exist for each entry in | |
28 | pinctrl-names. See ../pinctrl/pinctrl-bindings.txt | |
29 | for details of the property values. | |
30 | ||
31 | - big-endian : Boolean property, required if all the FTM_PWM | |
32 | registers are big-endian rather than little-endian. | |
33 | ||
34 | - lsb-first : Configures whether the LSB or the MSB is transmitted | |
35 | first for the fifo data. If this property is absent, | |
36 | the MSB is transmitted first as default, or the LSB | |
37 | is transmitted first. | |
38 | ||
39 | - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating | |
40 | that SAI will work in the synchronous mode (sync Tx | |
41 | with Rx) which means both the transimitter and the | |
42 | receiver will send and receive data by following | |
43 | receiver's bit clocks and frame sync clocks. | |
44 | ||
45 | - fsl,sai-asynchronous: This is a boolean property. If present, indicating | |
46 | that SAI will work in the asynchronous mode, which | |
47 | means both transimitter and receiver will send and | |
48 | receive data by following their own bit clocks and | |
49 | frame sync clocks separately. | |
08fdf65e | 50 | |
4d245850 FE |
51 | Optional properties (for mx6ul): |
52 | ||
53 | - fsl,sai-mclk-direction-output: This is a boolean property. If present, | |
54 | indicates that SAI will output the SAI MCLK clock. | |
55 | ||
08fdf65e NC |
56 | Note: |
57 | - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the | |
58 | default synchronous mode (sync Rx with Tx) will be used, which means both | |
59 | transimitter and receiver will send and receive data by following clocks | |
60 | of transimitter. | |
ce7344a4 | 61 | - fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. |
b6344859 XL |
62 | |
63 | Example: | |
64 | sai2: sai@40031000 { | |
65 | compatible = "fsl,vf610-sai"; | |
66 | reg = <0x40031000 0x1000>; | |
67 | pinctrl-names = "default"; | |
68 | pinctrl-0 = <&pinctrl_sai2_1>; | |
ca3e35c7 NC |
69 | clocks = <&clks VF610_CLK_PLATFORM_BUS>, |
70 | <&clks VF610_CLK_SAI2>, | |
71 | <&clks 0>, <&clks 0>; | |
72 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; | |
b6344859 XL |
73 | dma-names = "tx", "rx"; |
74 | dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>, | |
75 | <&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>; | |
014fd22e | 76 | big-endian; |
eadb0019 | 77 | lsb-first; |
b6344859 | 78 | }; |