Commit | Line | Data |
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2dcfa06e DH |
1 | Imagination Technologies I2S Output Controller |
2 | ||
3 | Required Properties: | |
4 | ||
5 | - compatible : Compatible list, must contain "img,i2s-out" | |
6 | ||
7 | - #sound-dai-cells : Must be equal to 0 | |
8 | ||
9 | - reg : Offset and length of the register set for the device | |
10 | ||
11 | - clocks : Contains an entry for each entry in clock-names | |
12 | ||
13 | - clock-names : Must include the following entries: | |
14 | "sys" The system clock | |
15 | "ref" The reference clock | |
16 | ||
17 | - dmas: Contains an entry for each entry in dma-names. | |
18 | ||
19 | - dma-names: Must include the following entry: | |
20 | "tx" Single DMA channel used by all active I2S channels | |
21 | ||
22 | - img,i2s-channels : Number of I2S channels instantiated in the I2S out block | |
23 | ||
24 | - resets: Contains a phandle to the I2S out reset signal | |
25 | ||
26 | - reset-names: Contains the reset signal name "rst" | |
27 | ||
28 | Optional Properties: | |
29 | ||
30 | - interrupts : Contains the I2S out interrupts. Depending on | |
31 | the configuration, there may be no interrupts, one interrupt, | |
32 | or an interrupt per I2S channel. For the case where there is | |
33 | one interrupt per channel, the interrupts should be listed | |
34 | in ascending channel order | |
35 | ||
36 | Example: | |
37 | ||
38 | i2s_out: i2s-out@18100A00 { | |
39 | compatible = "img,i2s-out"; | |
40 | reg = <0x18100A00 0x200>; | |
41 | interrupts = <GIC_SHARED 13 IRQ_TYPE_LEVEL_HIGH>; | |
42 | dmas = <&mdc 23 0xffffffff 0>; | |
43 | dma-names = "tx"; | |
44 | clocks = <&cr_periph SYS_CLK_I2S_OUT>, | |
45 | <&clk_core CLK_I2S>; | |
46 | clock-names = "sys", "ref"; | |
47 | img,i2s-channels = <6>; | |
48 | resets = <&pistachio_reset PISTACHIO_RESET_I2S_OUT>; | |
49 | reset-names = "rst"; | |
50 | #sound-dai-cells = <0>; | |
51 | }; |