Commit | Line | Data |
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6995b8cb LS |
1 | NVIDIA Tegra audio complex |
2 | ||
3 | Required properties: | |
4 | - compatible : "nvidia,tegra-audio-wm9712" | |
3ec9147d | 5 | - clocks : Must contain an entry for each entry in clock-names. |
d8f64797 | 6 | See ../clocks/clock-bindings.txt for details. |
3ec9147d | 7 | - clock-names : Must include the following entries: |
d8f64797 SW |
8 | - pll_a |
9 | - pll_a_out0 | |
10 | - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk) | |
6995b8cb LS |
11 | - nvidia,model : The user-visible name of this sound complex. |
12 | - nvidia,audio-routing : A list of the connections between audio components. | |
13 | Each entry is a pair of strings, the first being the connection's sink, | |
14 | the second being the connection's source. Valid names for sources and | |
15 | sinks are the WM9712's pins, and the jacks on the board: | |
16 | ||
17 | WM9712 pins: | |
18 | ||
19 | * MONOOUT | |
20 | * HPOUTL | |
21 | * HPOUTR | |
22 | * LOUT2 | |
23 | * ROUT2 | |
24 | * OUT3 | |
25 | * LINEINL | |
26 | * LINEINR | |
27 | * PHONE | |
28 | * PCBEEP | |
29 | * MIC1 | |
30 | * MIC2 | |
31 | * Mic Bias | |
32 | ||
33 | Board connectors: | |
34 | ||
35 | * Headphone | |
36 | * LineIn | |
37 | * Mic | |
38 | ||
39 | - nvidia,ac97-controller : The phandle of the Tegra AC97 controller | |
40 | ||
41 | ||
42 | Example: | |
43 | ||
44 | sound { | |
45 | compatible = "nvidia,tegra-audio-wm9712-colibri_t20", | |
46 | "nvidia,tegra-audio-wm9712"; | |
47 | nvidia,model = "Toradex Colibri T20"; | |
48 | ||
49 | nvidia,audio-routing = | |
50 | "Headphone", "HPOUTL", | |
51 | "Headphone", "HPOUTR", | |
52 | "LineIn", "LINEINL", | |
53 | "LineIn", "LINEINR", | |
54 | "Mic", "MIC1"; | |
55 | ||
56 | nvidia,ac97-controller = <&ac97>; | |
3ec9147d SW |
57 | |
58 | clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>; | |
59 | clock-names = "pll_a", "pll_a_out0", "mclk"; | |
6995b8cb | 60 | }; |