Commit | Line | Data |
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bf55499e SW |
1 | NVIDIA Tegra 20 I2S controller |
2 | ||
3 | Required properties: | |
4 | - compatible : "nvidia,tegra20-i2s" | |
5 | - reg : Should contain I2S registers location and length | |
6 | - interrupts : Should contain I2S interrupt | |
07999587 SW |
7 | - resets : Must contain an entry for each entry in reset-names. |
8 | See ../reset/reset.txt for details. | |
9 | - reset-names : Must include the following entries: | |
10 | - i2s | |
ed520c90 SW |
11 | - dmas : Must contain an entry for each entry in clock-names. |
12 | See ../dma/dma.txt for details. | |
13 | - dma-names : Must include the following entries: | |
14 | - rx | |
15 | - tx | |
16 | - clocks : Must contain one entry, for the module clock. | |
17 | See ../clocks/clock-bindings.txt for details. | |
bf55499e SW |
18 | |
19 | Example: | |
20 | ||
21 | i2s@70002800 { | |
22 | compatible = "nvidia,tegra20-i2s"; | |
23 | reg = <0x70002800 0x200>; | |
24 | interrupts = < 45 >; | |
d8f64797 | 25 | clocks = <&tegra_car 11>; |
07999587 SW |
26 | resets = <&tegra_car 11>; |
27 | reset-names = "i2s"; | |
ed520c90 SW |
28 | dmas = <&apbdma 21>, <&apbdma 21>; |
29 | dma-names = "rx", "tx"; | |
bf55499e | 30 | }; |