Commit | Line | Data |
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d4796e35 JX |
1 | * Rockchip I2S controller |
2 | ||
3 | The I2S bus (Inter-IC sound bus) is a serial link for digital | |
4 | audio data transfer between devices in the system. | |
5 | ||
6 | Required properties: | |
7 | ||
8 | - compatible: should be one of the followings | |
9 | - "rockchip,rk3066-i2s": for rk3066 | |
10 | - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188 | |
11 | - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288 | |
12 | - reg: physical base address of the controller and length of memory mapped | |
13 | region. | |
14 | - interrupts: should contain the I2S interrupt. | |
d4796e35 JX |
15 | - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, |
16 | Documentation/devicetree/bindings/dma/dma.txt | |
17 | - dma-names: should include "tx" and "rx". | |
18 | - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names. | |
19 | - clock-names: should contain followings: | |
20 | - "i2s_hclk": clock for I2S BUS | |
21 | - "i2s_clk" : clock for I2S controller | |
7fd9093a | 22 | - rockchip,playback-channels: max playback channels, if not set, 8 channels default. |
d307e01e | 23 | - rockchip,capture-channels: max capture channels, if not set, 2 channels default. |
d4796e35 JX |
24 | |
25 | Example for rk3288 I2S controller: | |
26 | ||
27 | i2s@ff890000 { | |
28 | compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; | |
29 | reg = <0xff890000 0x10000>; | |
30 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
d4796e35 | 31 | dmas = <&pdma1 0>, <&pdma1 1>; |
d67f660e | 32 | dma-names = "tx", "rx"; |
d4796e35 JX |
33 | clock-names = "i2s_hclk", "i2s_clk"; |
34 | clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>; | |
7fd9093a | 35 | rockchip,playback-channels = <8>; |
d307e01e | 36 | rockchip,capture-channels = <2>; |
d4796e35 | 37 | }; |