[deliverable/linux.git] / Documentation / devicetree / bindings / sound / rockchip-i2s.txt

* Rockchip I2S controller

The I2S bus (Inter-IC sound bus) is a serial link for digital
audio data transfer between devices in the system.

Required properties:

- compatible: should be one of the followings
   - "rockchip,rk3066-i2s": for rk3066
   - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
   - "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
   - "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
- reg: physical base address of the controller and length of memory mapped
  region.
- interrupts: should contain the I2S interrupt.
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
	Documentation/devicetree/bindings/dma/dma.txt
- dma-names: should include "tx" and "rx".
- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
- clock-names: should contain followings:
   - "i2s_hclk": clock for I2S BUS
   - "i2s_clk" : clock for I2S controller
- rockchip,playback-channels: max playback channels, if not set, 8 channels default.
- rockchip,capture-channels: max capture channels, if not set, 2 channels default.

Required properties for controller which support multi channels
playback/capture:

- rockchip,grf: the phandle of the syscon node for GRF register.

Example for rk3288 I2S controller:

i2s@ff890000 {
	compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
	reg = <0xff890000 0x10000>;
	interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
	dmas = <&pdma1 0>, <&pdma1 1>;
	dma-names = "tx", "rx";
	clock-names = "i2s_hclk", "i2s_clk";
	clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
	rockchip,playback-channels = <8>;
	rockchip,capture-channels = <2>;
};
Commit	Line	Data
d4796e35 JX	1	* Rockchip I2S controller
	2
	3	The I2S bus (Inter-IC sound bus) is a serial link for digital
	4	audio data transfer between devices in the system.
	5
	6	Required properties:
	7
	8	- compatible: should be one of the followings
	9	- "rockchip,rk3066-i2s": for rk3066
	10	- "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188
	11	- "rockchip,rk3288-i2s", "rockchip,rk3066-i2s": for rk3288
255edcdf	12	- "rockchip,rk3399-i2s", "rockchip,rk3066-i2s": for rk3399
d4796e35 JX	13	- reg: physical base address of the controller and length of memory mapped
	14	region.
	15	- interrupts: should contain the I2S interrupt.
d4796e35 JX	16	- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
	17	Documentation/devicetree/bindings/dma/dma.txt
	18	- dma-names: should include "tx" and "rx".
	19	- clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
	20	- clock-names: should contain followings:
	21	- "i2s_hclk": clock for I2S BUS
	22	- "i2s_clk" : clock for I2S controller
7fd9093a	23	- rockchip,playback-channels: max playback channels, if not set, 8 channels default.
d307e01e	24	- rockchip,capture-channels: max capture channels, if not set, 2 channels default.
d4796e35	25
170abcaa SZ	26	Required properties for controller which support multi channels
	27	playback/capture:
	28
	29	- rockchip,grf: the phandle of the syscon node for GRF register.
	30
d4796e35 JX	31	Example for rk3288 I2S controller:
	32
	33	i2s@ff890000 {
	34	compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
	35	reg = <0xff890000 0x10000>;
	36	interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
d4796e35	37	dmas = <&pdma1 0>, <&pdma1 1>;
d67f660e	38	dma-names = "tx", "rx";
d4796e35 JX	39	clock-names = "i2s_hclk", "i2s_clk";
d4796e35 JX	40	clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
7fd9093a	41	rockchip,playback-channels = <8>;
d307e01e	42	rockchip,capture-channels = <2>;
d4796e35	43	};