Commit | Line | Data |
---|---|---|
374a6679 RY |
1 | * SiRF SoC USP module |
2 | ||
3 | Required properties: | |
4 | - compatible: "sirf,prima2-usp-pcm" | |
5 | - reg: Base address and size entries: | |
6 | - dmas: List of DMA controller phandle and DMA request line ordered pairs. | |
7 | - dma-names: Identifier string for each DMA request line in the dmas property. | |
8 | These strings correspond 1:1 with the ordered pairs in dmas. | |
9 | ||
10 | One of the DMA channels will be responsible for transmission (should be | |
11 | named "tx") and one for reception (should be named "rx"). | |
12 | ||
13 | - clocks: USP controller clock source | |
14 | - pinctrl-names: Must contain a "default" entry. | |
15 | - pinctrl-NNN: One property must exist for each entry in pinctrl-names. | |
16 | ||
17 | Example: | |
18 | usp0: usp@b0080000 { | |
19 | compatible = "sirf,prima2-usp-pcm"; | |
20 | reg = <0xb0080000 0x10000>; | |
21 | clocks = <&clks 28>; | |
22 | dmas = <&dmac1 1>, <&dmac1 2>; | |
23 | dma-names = "rx", "tx"; | |
24 | pinctrl-names = "default"; | |
25 | pinctrl-0 = <&usp0_only_utfs_pins_a>; | |
26 | }; | |
27 |