Commit | Line | Data |
---|---|---|
850a5b67 JCPV |
1 | Atmel SPI device |
2 | ||
3 | Required properties: | |
4 | - compatible : should be "atmel,at91rm9200-spi". | |
5 | - reg: Address and length of the register set for the device | |
6 | - interrupts: Should contain spi interrupt | |
2c01a3d6 CP |
7 | - cs-gpios: chipselects (optional for SPI controller version >= 2 with the |
8 | Chip Select Active After Transfer feature). | |
bdb90b6b BB |
9 | - clock-names: tuple listing input clock names. |
10 | Required elements: "spi_clk" | |
11 | - clocks: phandles to input clocks. | |
850a5b67 | 12 | |
2c01a3d6 CP |
13 | Optional properties: |
14 | - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO | |
15 | capable SPI controllers. | |
16 | ||
850a5b67 JCPV |
17 | Example: |
18 | ||
19 | spi1: spi@fffcc000 { | |
20 | compatible = "atmel,at91rm9200-spi"; | |
21 | reg = <0xfffcc000 0x4000>; | |
22 | interrupts = <13 4 5>; | |
23 | #address-cells = <1>; | |
24 | #size-cells = <0>; | |
bdb90b6b BB |
25 | clocks = <&spi1_clk>; |
26 | clock-names = "spi_clk"; | |
850a5b67 | 27 | cs-gpios = <&pioB 3 0>; |
2c01a3d6 | 28 | atmel,fifo-size = <32>; |
850a5b67 JCPV |
29 | status = "okay"; |
30 | ||
31 | mmc-slot@0 { | |
32 | compatible = "mmc-spi-slot"; | |
33 | reg = <0>; | |
34 | gpios = <&pioC 4 0>; /* CD */ | |
35 | spi-max-frequency = <25000000>; | |
36 | }; | |
37 | }; |