Commit | Line | Data |
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6add6967 RH |
1 | ARM PL022 SPI controller |
2 | ||
3 | Required properties: | |
4 | - compatible : "arm,pl022", "arm,primecell" | |
5 | - reg : Offset and length of the register set for the device | |
6 | - interrupts : Should contain SPI controller interrupt | |
7 | ||
8 | Optional properties: | |
6d3952a7 | 9 | - num-cs : total number of chipselects |
6add6967 RH |
10 | - cs-gpios : should specify GPIOs used for chipselects. |
11 | The gpios will be referred to as reg = <index> in the SPI child nodes. | |
12 | If unspecified, a single SPI device without a chip select can be used. | |
39a6ac11 RS |
13 | - pl022,autosuspend-delay : delay in ms following transfer completion before |
14 | the runtime power management system suspends the | |
15 | device. A setting of 0 indicates no delay and the | |
16 | device will be suspended immediately | |
17 | - pl022,rt : indicates the controller should run the message pump with realtime | |
18 | priority to minimise the transfer latency on the bus (boolean) | |
dc715452 AB |
19 | - dmas : Two or more DMA channel specifiers following the convention outlined |
20 | in bindings/dma/dma.txt | |
21 | - dma-names: Names for the dma channels, if present. There must be at | |
22 | least one channel named "tx" for transmit and named "rx" for | |
23 | receive. | |
39a6ac11 | 24 | |
6add6967 | 25 | |
6d3952a7 RS |
26 | SPI slave nodes must be children of the SPI master node and can |
27 | contain the following properties. | |
28 | ||
29 | - pl022,interface : interface type: | |
30 | 0: SPI | |
31 | 1: Texas Instruments Synchronous Serial Frame Format | |
32 | 2: Microwire (Half Duplex) | |
33 | - pl022,com-mode : polling, interrupt or dma | |
34 | - pl022,rx-level-trig : Rx FIFO watermark level | |
35 | - pl022,tx-level-trig : Tx FIFO watermark level | |
36 | - pl022,ctrl-len : Microwire interface: Control length | |
37 | - pl022,wait-state : Microwire interface: Wait state | |
38 | - pl022,duplex : Microwire interface: Full/Half duplex | |
39 | ||
dc715452 AB |
40 | |
41 | Example: | |
42 | ||
43 | spi@e0100000 { | |
44 | compatible = "arm,pl022", "arm,primecell"; | |
45 | reg = <0xe0100000 0x1000>; | |
46 | #address-cells = <1>; | |
47 | #size-cells = <0>; | |
48 | interrupts = <0 31 0x4>; | |
49 | dmas = <&dma-controller 23 1>, | |
50 | <&dma-controller 24 0>; | |
51 | dma-names = "rx", "tx"; | |
52 | ||
53 | m25p80@1 { | |
54 | compatible = "st,m25p80"; | |
55 | reg = <1>; | |
56 | spi-max-frequency = <12000000>; | |
57 | spi-cpol; | |
58 | spi-cpha; | |
59 | pl022,hierarchy = <0>; | |
60 | pl022,interface = <0>; | |
61 | pl022,slave-tx-disable; | |
62 | pl022,com-mode = <0x2>; | |
63 | pl022,rx-level-trig = <0>; | |
64 | pl022,tx-level-trig = <0>; | |
65 | pl022,ctrl-len = <0x11>; | |
66 | pl022,wait-state = <0>; | |
67 | pl022,duplex = <0>; | |
68 | }; | |
69 | }; | |
70 |