Commit | Line | Data |
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0e97194b ADK |
1 | * Exynos Thermal Management Unit (TMU) |
2 | ||
3 | ** Required properties: | |
4 | ||
5 | - compatible : One of the following: | |
1fe56dc1 | 6 | "samsung,exynos3250-tmu" |
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7 | "samsung,exynos4412-tmu" |
8 | "samsung,exynos4210-tmu" | |
9 | "samsung,exynos5250-tmu" | |
923488a5 | 10 | "samsung,exynos5260-tmu" |
14a11dc7 NKC |
11 | "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420 |
12 | "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4 | |
13 | Exynos5420 (Must pass triminfo base and triminfo clock) | |
a41e939b | 14 | "samsung,exynos5433-tmu" |
0e97194b | 15 | "samsung,exynos5440-tmu" |
14ccc17a | 16 | "samsung,exynos7-tmu" |
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17 | - interrupt-parent : The phandle for the interrupt controller |
18 | - reg : Address range of the thermal registers. For soc's which has multiple | |
19 | instances of TMU and some registers are shared across all TMU's like | |
20 | interrupt related then 2 set of register has to supplied. First set | |
9025d563 NKC |
21 | belongs to register set of TMU instance and second set belongs to |
22 | registers shared with the TMU instance. | |
14a11dc7 NKC |
23 | |
24 | NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU | |
25 | channels 2, 3 and 4 | |
26 | Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced | |
27 | register, also provide clock to access that base. | |
28 | ||
29 | TRIMINFO at 0x1006c000 contains data for TMU channel 3 | |
30 | TRIMINFO at 0x100a0000 contains data for TMU channel 4 | |
31 | TRIMINFO at 0x10068000 contains data for TMU channel 2 | |
32 | ||
0e97194b | 33 | - interrupts : Should contain interrupt for thermal system |
14a11dc7 NKC |
34 | - clocks : The main clocks for TMU device |
35 | -- 1. operational clock for TMU channel | |
36 | -- 2. optional clock to access the shared registers of TMU channel | |
14ccc17a | 37 | -- 3. optional special clock for functional operation |
0e97194b | 38 | - clock-names : Thermal system clock name |
14a11dc7 NKC |
39 | -- "tmu_apbif" operational clock for current TMU channel |
40 | -- "tmu_triminfo_apbif" clock to access the shared triminfo register | |
41 | for current TMU channel | |
14ccc17a AK |
42 | -- "tmu_sclk" clock for functional operation of the current TMU |
43 | channel | |
fa7b29e8 KK |
44 | |
45 | The Exynos TMU supports generating interrupts when reaching given | |
46 | temperature thresholds. Number of supported thermal trip points depends | |
47 | on the SoC (only first trip points defined in DT will be configured): | |
48 | - most of SoC: 4 | |
49 | - samsung,exynos5433-tmu: 8 | |
50 | - samsung,exynos7-tmu: 8 | |
51 | ||
7e205258 LM |
52 | Following properties are mandatory (depending on SoC): |
53 | - samsung,tmu_gain: Gain value for internal TMU operation. | |
54 | - samsung,tmu_reference_voltage: Value of TMU IP block's reference voltage | |
55 | - samsung,tmu_noise_cancel_mode: Mode for noise cancellation | |
56 | - samsung,tmu_efuse_value: Default level of temperature - it is needed when | |
57 | in factory fusing produced wrong value | |
58 | - samsung,tmu_min_efuse_value: Minimum temperature fused value | |
59 | - samsung,tmu_max_efuse_value: Maximum temperature fused value | |
60 | - samsung,tmu_first_point_trim: First point trimming value | |
61 | - samsung,tmu_second_point_trim: Second point trimming value | |
62 | - samsung,tmu_default_temp_offset: Default temperature offset | |
63 | - samsung,tmu_cal_type: Callibration type | |
0e97194b | 64 | |
7bc40ddf JMC |
65 | ** Optional properties: |
66 | ||
67 | - vtmu-supply: This entry is optional and provides the regulator node supplying | |
68 | voltage to TMU. If needed this entry can be placed inside | |
69 | board/platform specific dts file. | |
70 | ||
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71 | Example 1): |
72 | ||
73 | tmu@100C0000 { | |
74 | compatible = "samsung,exynos4412-tmu"; | |
75 | interrupt-parent = <&combiner>; | |
76 | reg = <0x100C0000 0x100>; | |
77 | interrupts = <2 4>; | |
78 | clocks = <&clock 383>; | |
79 | clock-names = "tmu_apbif"; | |
80 | status = "disabled"; | |
81 | vtmu-supply = <&tmu_regulator_node>; | |
7e205258 | 82 | #include "exynos4412-tmu-sensor-conf.dtsi" |
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83 | }; |
84 | ||
85 | Example 2): | |
86 | ||
87 | tmuctrl_0: tmuctrl@160118 { | |
88 | compatible = "samsung,exynos5440-tmu"; | |
89 | reg = <0x160118 0x230>, <0x160368 0x10>; | |
90 | interrupts = <0 58 0>; | |
91 | clocks = <&clock 21>; | |
92 | clock-names = "tmu_apbif"; | |
d29f0a10 | 93 | #include "exynos5440-tmu-sensor-conf.dtsi" |
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94 | }; |
95 | ||
14a11dc7 NKC |
96 | Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register") |
97 | tmu_cpu2: tmu@10068000 { | |
98 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; | |
99 | reg = <0x10068000 0x100>, <0x1006c000 0x4>; | |
100 | interrupts = <0 184 0>; | |
101 | clocks = <&clock 318>, <&clock 318>; | |
102 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; | |
7e205258 | 103 | #include "exynos4412-tmu-sensor-conf.dtsi" |
14a11dc7 NKC |
104 | }; |
105 | ||
106 | tmu_cpu3: tmu@1006c000 { | |
107 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; | |
108 | reg = <0x1006c000 0x100>, <0x100a0000 0x4>; | |
109 | interrupts = <0 185 0>; | |
110 | clocks = <&clock 318>, <&clock 319>; | |
111 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; | |
7e205258 | 112 | #include "exynos4412-tmu-sensor-conf.dtsi" |
14a11dc7 NKC |
113 | }; |
114 | ||
115 | tmu_gpu: tmu@100a0000 { | |
116 | compatible = "samsung,exynos5420-tmu-ext-triminfo"; | |
117 | reg = <0x100a0000 0x100>, <0x10068000 0x4>; | |
118 | interrupts = <0 215 0>; | |
119 | clocks = <&clock 319>, <&clock 318>; | |
120 | clock-names = "tmu_apbif", "tmu_triminfo_apbif"; | |
7e205258 | 121 | #include "exynos4412-tmu-sensor-conf.dtsi" |
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122 | }; |
123 | ||
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124 | Note: For multi-instance tmu each instance should have an alias correctly |
125 | numbered in "aliases" node. | |
126 | ||
127 | Example: | |
128 | ||
129 | aliases { | |
130 | tmuctrl0 = &tmuctrl_0; | |
131 | tmuctrl1 = &tmuctrl_1; | |
132 | tmuctrl2 = &tmuctrl_2; | |
133 | }; |