Commit | Line | Data |
---|---|---|
6962ad52 CW |
1 | * Temperature Sensor ADC (TSADC) on rockchip SoCs |
2 | ||
3 | Required properties: | |
a519c27d | 4 | - compatible : should be "rockchip,<name>-tsadc" |
4be02530 | 5 | "rockchip,rk3228-tsadc": found on RK3228 SoCs |
a519c27d CW |
6 | "rockchip,rk3288-tsadc": found on RK3288 SoCs |
7 | "rockchip,rk3368-tsadc": found on RK3368 SoCs | |
4be02530 | 8 | "rockchip,rk3399-tsadc": found on RK3399 SoCs |
6962ad52 CW |
9 | - reg : physical base address of the controller and length of memory mapped |
10 | region. | |
11 | - interrupts : The interrupt number to the cpu. The interrupt specifier format | |
12 | depends on the interrupt controller. | |
13 | - clocks : Must contain an entry for each entry in clock-names. | |
14 | - clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for | |
15 | the peripheral clock. | |
16 | - resets : Must contain an entry for each entry in reset-names. | |
17 | See ../reset/reset.txt for details. | |
18 | - reset-names : Must include the name "tsadc-apb". | |
9aba783a CW |
19 | - pinctrl-names : The pin control state names; |
20 | - pinctrl-0 : The "init" pinctrl state, it will be set before device probe. | |
21 | - pinctrl-1 : The "default" pinctrl state, it will be set after reset the | |
22 | TSADC controller. | |
23 | - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. | |
6962ad52 CW |
24 | - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. |
25 | - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. | |
26 | - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. | |
27 | - rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW | |
28 | 1:HIGH. | |
29 | ||
30 | Exiample: | |
31 | tsadc: tsadc@ff280000 { | |
32 | compatible = "rockchip,rk3288-tsadc"; | |
33 | reg = <0xff280000 0x100>; | |
34 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | |
35 | clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; | |
36 | clock-names = "tsadc", "apb_pclk"; | |
37 | resets = <&cru SRST_TSADC>; | |
38 | reset-names = "tsadc-apb"; | |
9aba783a CW |
39 | pinctrl-names = "init", "default", "sleep"; |
40 | pinctrl-0 = <&otp_gpio>; | |
41 | pinctrl-1 = <&otp_out>; | |
42 | pinctrl-2 = <&otp_gpio>; | |
6962ad52 CW |
43 | #thermal-sensor-cells = <1>; |
44 | rockchip,hw-tshut-temp = <95000>; | |
45 | rockchip,hw-tshut-mode = <0>; | |
46 | rockchip,hw-tshut-polarity = <0>; | |
47 | }; | |
48 | ||
49 | Example: referring to thermal sensors: | |
50 | thermal-zones { | |
51 | cpu_thermal: cpu_thermal { | |
52 | polling-delay-passive = <1000>; /* milliseconds */ | |
53 | polling-delay = <5000>; /* milliseconds */ | |
54 | ||
55 | /* sensor ID */ | |
56 | thermal-sensors = <&tsadc 1>; | |
57 | ||
58 | trips { | |
59 | cpu_alert0: cpu_alert { | |
60 | temperature = <70000>; /* millicelsius */ | |
61 | hysteresis = <2000>; /* millicelsius */ | |
62 | type = "passive"; | |
63 | }; | |
64 | cpu_crit: cpu_crit { | |
65 | temperature = <90000>; /* millicelsius */ | |
66 | hysteresis = <2000>; /* millicelsius */ | |
67 | type = "critical"; | |
68 | }; | |
69 | }; | |
70 | ||
71 | cooling-maps { | |
72 | map0 { | |
73 | trip = <&cpu_alert0>; | |
74 | cooling-device = | |
75 | <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | |
76 | }; | |
77 | }; | |
78 | }; | |
79 | }; |