Commit | Line | Data |
---|---|---|
d5153cd7 | 1 | * Renesas Multi-Function Timer Pulse Unit 2 (MTU2) |
cca8d059 LP |
2 | |
3 | The MTU2 is a multi-purpose, multi-channel timer/counter with configurable | |
4 | clock inputs and programmable compare match. | |
5 | ||
6 | Channels share hardware resources but their counter and compare match value | |
7 | are independent. The MTU2 hardware supports five channels indexed from 0 to 4. | |
8 | ||
9 | Required Properties: | |
10 | ||
ffd24a54 SH |
11 | - compatible: must be one or more of the following: |
12 | - "renesas,mtu2-r7s72100" for the r7s72100 MTU2 | |
13 | - "renesas,mtu2" for any MTU2 | |
14 | This is a fallback for the above renesas,mtu2-* entries | |
cca8d059 LP |
15 | |
16 | - reg: base address and length of the registers block for the timer module. | |
17 | ||
18 | - interrupts: interrupt specifiers for the timer, one for each entry in | |
19 | interrupt-names. | |
20 | - interrupt-names: must contain one entry named "tgi?a" for each enabled | |
21 | channel, where "?" is the channel index expressed as one digit from "0" to | |
22 | "4". | |
23 | ||
24 | - clocks: a list of phandle + clock-specifier pairs, one for each entry | |
25 | in clock-names. | |
26 | - clock-names: must contain "fck" for the functional clock. | |
27 | ||
28 | ||
29 | Example: R7S72100 (RZ/A1H) MTU2 node | |
30 | ||
31 | mtu2: timer@fcff0000 { | |
ffd24a54 | 32 | compatible = "renesas,mtu2-r7s72100", "renesas,mtu2"; |
cca8d059 LP |
33 | reg = <0xfcff0000 0x400>; |
34 | interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>, | |
35 | <0 146 IRQ_TYPE_LEVEL_HIGH>, | |
36 | <0 150 IRQ_TYPE_LEVEL_HIGH>, | |
37 | <0 154 IRQ_TYPE_LEVEL_HIGH>, | |
38 | <0 159 IRQ_TYPE_LEVEL_HIGH>; | |
39 | interrupt-names = "tgi0a", "tgi1a", "tgi2a", "tgi3a", "tgi4a"; | |
40 | clocks = <&mstp3_clks R7S72100_CLK_MTU2>; | |
41 | clock-names = "fck"; | |
42 | }; |