Commit | Line | Data |
---|---|---|
61ab1a90 JI |
1 | * UART (Universal Asynchronous Receiver/Transmitter) |
2 | ||
3 | Required properties: | |
4 | - compatible : one of: | |
5 | - "ns8250" | |
6 | - "ns16450" | |
7 | - "ns16550a" | |
8 | - "ns16550" | |
9 | - "ns16750" | |
10 | - "ns16850" | |
2e39e5be | 11 | - "nvidia,tegra20-uart" |
e4305f0c | 12 | - "nxp,lpc3220-uart" |
61ab1a90 | 13 | - "ibm,qpace-nwp-serial" |
e06c93ca LFT |
14 | - "altr,16550-FIFO32" |
15 | - "altr,16550-FIFO64" | |
16 | - "altr,16550-FIFO128" | |
61ab1a90 JI |
17 | - "serial" if the port type is unknown. |
18 | - reg : offset and length of the register set for the device. | |
19 | - interrupts : should contain uart interrupt. | |
ab72fa55 MK |
20 | - clock-frequency : the input clock frequency for the UART |
21 | or | |
22 | clocks phandle to refer to the clk used as per Documentation/devicetree | |
23 | /bindings/clock/clock-bindings.txt | |
61ab1a90 JI |
24 | |
25 | Optional properties: | |
26 | - current-speed : the current active speed of the UART. | |
27 | - reg-offset : offset to apply to the mapbase from the start of the registers. | |
28 | - reg-shift : quantity to shift the register offsets by. | |
7423734e JI |
29 | - reg-io-width : the size (in bytes) of the IO accesses that should be |
30 | performed on the device. There are some systems that require 32-bit | |
31 | accesses to the UART (e.g. TI davinci). | |
61ab1a90 JI |
32 | - used-by-rtas : set to indicate that the port is in use by the OpenFirmware |
33 | RTAS and should not be registered. | |
fde8be29 GJ |
34 | - no-loopback-test: set to indicate that the port does not implements loopback |
35 | test mode | |
9f1ca068 | 36 | - fifo-size: the fifo size of the UART. |
61ab1a90 JI |
37 | |
38 | Example: | |
39 | ||
40 | uart@80230000 { | |
41 | compatible = "ns8250"; | |
42 | reg = <0x80230000 0x100>; | |
43 | clock-frequency = <3686400>; | |
44 | interrupts = <10>; | |
45 | reg-shift = <2>; | |
46 | }; |