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1 | Booting the Linux/ppc kernel without Open Firmware |
2 | -------------------------------------------------- | |
3 | ||
c125a183 DG |
4 | (c) 2005 Benjamin Herrenschmidt <benh at kernel.crashing.org>, |
5 | IBM Corp. | |
6 | (c) 2005 Becky Bruce <becky.bruce at freescale.com>, | |
7 | Freescale Semiconductor, FSL SOC and 32-bit additions | |
28f9ec34 VW |
8 | (c) 2006 MontaVista Software, Inc. |
9 | Flash chip node definition | |
c125a183 | 10 | |
5e1e9ba6 SY |
11 | Table of Contents |
12 | ================= | |
13 | ||
14 | I - Introduction | |
15 | 1) Entry point for arch/powerpc | |
16 | 2) Board support | |
17 | ||
18 | II - The DT block format | |
19 | 1) Header | |
20 | 2) Device tree generalities | |
21 | 3) Device tree "structure" block | |
22 | 4) Device tree "strings" block | |
23 | ||
24 | III - Required content of the device tree | |
25 | 1) Note about cells and address representation | |
26 | 2) Note about "compatible" properties | |
27 | 3) Note about "name" properties | |
28 | 4) Note about node and property names and character set | |
29 | 5) Required nodes and properties | |
30 | a) The root node | |
31 | b) The /cpus node | |
32 | c) The /cpus/* nodes | |
33 | d) the /memory node(s) | |
34 | e) The /chosen node | |
35 | f) the /soc<SOCname> node | |
36 | ||
37 | IV - "dtc", the device tree compiler | |
38 | ||
39 | V - Recommendations for a bootloader | |
40 | ||
41 | VI - System-on-a-chip devices and nodes | |
42 | 1) Defining child nodes of an SOC | |
43 | 2) Representing devices without a current OF specification | |
44 | a) MDIO IO device | |
5e1e9ba6 | 45 | b) Gianfar-compatible ethernet nodes |
a4ecabab | 46 | c) PHY nodes |
5e1e9ba6 SY |
47 | d) Interrupt controllers |
48 | e) I2C | |
49 | f) Freescale SOC USB controllers | |
50 | g) Freescale SOC SEC Security Engines | |
51 | h) Board Control and Status (BCSR) | |
52 | i) Freescale QUICC Engine module (QE) | |
2099172d | 53 | j) CFI or JEDEC memory-mapped NOR flash |
3b824f85 | 54 | k) Global Utilities Block |
7ae0fa49 | 55 | l) Xilinx IP cores |
5e1e9ba6 SY |
56 | |
57 | VII - Specifying interrupt information for devices | |
58 | 1) interrupts property | |
59 | 2) interrupt-parent property | |
60 | 3) OpenPIC Interrupt Controllers | |
61 | 4) ISA Interrupt Controllers | |
62 | ||
63 | Appendix A - Sample SOC node for MPC8540 | |
64 | ||
65 | ||
66 | Revision Information | |
67 | ==================== | |
68 | ||
c125a183 DG |
69 | May 18, 2005: Rev 0.1 - Initial draft, no chapter III yet. |
70 | ||
71 | May 19, 2005: Rev 0.2 - Add chapter III and bits & pieces here or | |
72 | clarifies the fact that a lot of things are | |
73 | optional, the kernel only requires a very | |
74 | small device tree, though it is encouraged | |
75 | to provide an as complete one as possible. | |
76 | ||
77 | May 24, 2005: Rev 0.3 - Precise that DT block has to be in RAM | |
78 | - Misc fixes | |
79 | - Define version 3 and new format version 16 | |
80 | for the DT block (version 16 needs kernel | |
81 | patches, will be fwd separately). | |
82 | String block now has a size, and full path | |
83 | is replaced by unit name for more | |
84 | compactness. | |
85 | linux,phandle is made optional, only nodes | |
86 | that are referenced by other nodes need it. | |
87 | "name" property is now automatically | |
88 | deduced from the unit name | |
89 | ||
90 | June 1, 2005: Rev 0.4 - Correct confusion between OF_DT_END and | |
91 | OF_DT_END_NODE in structure definition. | |
92 | - Change version 16 format to always align | |
93 | property data to 4 bytes. Since tokens are | |
94 | already aligned, that means no specific | |
5d3f083d | 95 | required alignment between property size |
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96 | and property data. The old style variable |
97 | alignment would make it impossible to do | |
98 | "simple" insertion of properties using | |
5dd60166 | 99 | memmove (thanks Milton for |
c125a183 | 100 | noticing). Updated kernel patch as well |
5d3f083d | 101 | - Correct a few more alignment constraints |
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102 | - Add a chapter about the device-tree |
103 | compiler and the textural representation of | |
104 | the tree that can be "compiled" by dtc. | |
105 | ||
c125a183 DG |
106 | November 21, 2005: Rev 0.5 |
107 | - Additions/generalizations for 32-bit | |
108 | - Changed to reflect the new arch/powerpc | |
109 | structure | |
110 | - Added chapter VI | |
111 | ||
112 | ||
113 | ToDo: | |
114 | - Add some definitions of interrupt tree (simple/complex) | |
5dd60166 | 115 | - Add some definitions for PCI host bridges |
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116 | - Add some common address format examples |
117 | - Add definitions for standard properties and "compatible" | |
118 | names for cells that are not already defined by the existing | |
119 | OF spec. | |
120 | - Compare FSL SOC use of PCI to standard and make sure no new | |
121 | node definition required. | |
122 | - Add more information about node definitions for SOC devices | |
123 | that currently have no standard, like the FSL CPM. | |
124 | ||
125 | ||
126 | I - Introduction | |
127 | ================ | |
128 | ||
129 | During the recent development of the Linux/ppc64 kernel, and more | |
130 | specifically, the addition of new platform types outside of the old | |
131 | IBM pSeries/iSeries pair, it was decided to enforce some strict rules | |
132 | regarding the kernel entry and bootloader <-> kernel interfaces, in | |
133 | order to avoid the degeneration that had become the ppc32 kernel entry | |
134 | point and the way a new platform should be added to the kernel. The | |
135 | legacy iSeries platform breaks those rules as it predates this scheme, | |
136 | but no new board support will be accepted in the main tree that | |
137 | doesn't follows them properly. In addition, since the advent of the | |
138 | arch/powerpc merged architecture for ppc32 and ppc64, new 32-bit | |
139 | platforms and 32-bit platforms which move into arch/powerpc will be | |
140 | required to use these rules as well. | |
141 | ||
142 | The main requirement that will be defined in more detail below is | |
143 | the presence of a device-tree whose format is defined after Open | |
144 | Firmware specification. However, in order to make life easier | |
145 | to embedded board vendors, the kernel doesn't require the device-tree | |
146 | to represent every device in the system and only requires some nodes | |
147 | and properties to be present. This will be described in detail in | |
148 | section III, but, for example, the kernel does not require you to | |
149 | create a node for every PCI device in the system. It is a requirement | |
150 | to have a node for PCI host bridges in order to provide interrupt | |
151 | routing informations and memory/IO ranges, among others. It is also | |
152 | recommended to define nodes for on chip devices and other busses that | |
153 | don't specifically fit in an existing OF specification. This creates a | |
154 | great flexibility in the way the kernel can then probe those and match | |
155 | drivers to device, without having to hard code all sorts of tables. It | |
156 | also makes it more flexible for board vendors to do minor hardware | |
157 | upgrades without significantly impacting the kernel code or cluttering | |
158 | it with special cases. | |
159 | ||
160 | ||
161 | 1) Entry point for arch/powerpc | |
162 | ------------------------------- | |
163 | ||
164 | There is one and one single entry point to the kernel, at the start | |
165 | of the kernel image. That entry point supports two calling | |
166 | conventions: | |
167 | ||
168 | a) Boot from Open Firmware. If your firmware is compatible | |
169 | with Open Firmware (IEEE 1275) or provides an OF compatible | |
170 | client interface API (support for "interpret" callback of | |
171 | forth words isn't required), you can enter the kernel with: | |
172 | ||
173 | r5 : OF callback pointer as defined by IEEE 1275 | |
5dd60166 | 174 | bindings to powerpc. Only the 32-bit client interface |
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175 | is currently supported |
176 | ||
177 | r3, r4 : address & length of an initrd if any or 0 | |
178 | ||
179 | The MMU is either on or off; the kernel will run the | |
180 | trampoline located in arch/powerpc/kernel/prom_init.c to | |
181 | extract the device-tree and other information from open | |
182 | firmware and build a flattened device-tree as described | |
183 | in b). prom_init() will then re-enter the kernel using | |
184 | the second method. This trampoline code runs in the | |
185 | context of the firmware, which is supposed to handle all | |
186 | exceptions during that time. | |
187 | ||
188 | b) Direct entry with a flattened device-tree block. This entry | |
189 | point is called by a) after the OF trampoline and can also be | |
190 | called directly by a bootloader that does not support the Open | |
191 | Firmware client interface. It is also used by "kexec" to | |
192 | implement "hot" booting of a new kernel from a previous | |
193 | running one. This method is what I will describe in more | |
194 | details in this document, as method a) is simply standard Open | |
195 | Firmware, and thus should be implemented according to the | |
196 | various standard documents defining it and its binding to the | |
197 | PowerPC platform. The entry point definition then becomes: | |
198 | ||
199 | r3 : physical pointer to the device-tree block | |
200 | (defined in chapter II) in RAM | |
201 | ||
202 | r4 : physical pointer to the kernel itself. This is | |
203 | used by the assembly code to properly disable the MMU | |
204 | in case you are entering the kernel with MMU enabled | |
205 | and a non-1:1 mapping. | |
206 | ||
2fe0ae78 | 207 | r5 : NULL (as to differentiate with method a) |
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208 | |
209 | Note about SMP entry: Either your firmware puts your other | |
210 | CPUs in some sleep loop or spin loop in ROM where you can get | |
211 | them out via a soft reset or some other means, in which case | |
212 | you don't need to care, or you'll have to enter the kernel | |
213 | with all CPUs. The way to do that with method b) will be | |
214 | described in a later revision of this document. | |
215 | ||
216 | ||
217 | 2) Board support | |
218 | ---------------- | |
219 | ||
220 | 64-bit kernels: | |
221 | ||
222 | Board supports (platforms) are not exclusive config options. An | |
223 | arbitrary set of board supports can be built in a single kernel | |
224 | image. The kernel will "know" what set of functions to use for a | |
225 | given platform based on the content of the device-tree. Thus, you | |
226 | should: | |
227 | ||
228 | a) add your platform support as a _boolean_ option in | |
229 | arch/powerpc/Kconfig, following the example of PPC_PSERIES, | |
230 | PPC_PMAC and PPC_MAPLE. The later is probably a good | |
231 | example of a board support to start from. | |
232 | ||
233 | b) create your main platform file as | |
234 | "arch/powerpc/platforms/myplatform/myboard_setup.c" and add it | |
235 | to the Makefile under the condition of your CONFIG_ | |
236 | option. This file will define a structure of type "ppc_md" | |
237 | containing the various callbacks that the generic code will | |
238 | use to get to your platform specific code | |
239 | ||
240 | c) Add a reference to your "ppc_md" structure in the | |
241 | "machines" table in arch/powerpc/kernel/setup_64.c if you are | |
242 | a 64-bit platform. | |
243 | ||
244 | d) request and get assigned a platform number (see PLATFORM_* | |
245 | constants in include/asm-powerpc/processor.h | |
246 | ||
247 | 32-bit embedded kernels: | |
248 | ||
249 | Currently, board support is essentially an exclusive config option. | |
250 | The kernel is configured for a single platform. Part of the reason | |
251 | for this is to keep kernels on embedded systems small and efficient; | |
252 | part of this is due to the fact the code is already that way. In the | |
253 | future, a kernel may support multiple platforms, but only if the | |
5dd60166 | 254 | platforms feature the same core architecture. A single kernel build |
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255 | cannot support both configurations with Book E and configurations |
256 | with classic Powerpc architectures. | |
257 | ||
258 | 32-bit embedded platforms that are moved into arch/powerpc using a | |
259 | flattened device tree should adopt the merged tree practice of | |
260 | setting ppc_md up dynamically, even though the kernel is currently | |
261 | built with support for only a single platform at a time. This allows | |
262 | unification of the setup code, and will make it easier to go to a | |
263 | multiple-platform-support model in the future. | |
264 | ||
265 | NOTE: I believe the above will be true once Ben's done with the merge | |
266 | of the boot sequences.... someone speak up if this is wrong! | |
267 | ||
268 | To add a 32-bit embedded platform support, follow the instructions | |
269 | for 64-bit platforms above, with the exception that the Kconfig | |
270 | option should be set up such that the kernel builds exclusively for | |
271 | the platform selected. The processor type for the platform should | |
272 | enable another config option to select the specific board | |
273 | supported. | |
274 | ||
5dd60166 | 275 | NOTE: If Ben doesn't merge the setup files, may need to change this to |
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276 | point to setup_32.c |
277 | ||
278 | ||
279 | I will describe later the boot process and various callbacks that | |
280 | your platform should implement. | |
281 | ||
282 | ||
283 | II - The DT block format | |
284 | ======================== | |
285 | ||
286 | ||
287 | This chapter defines the actual format of the flattened device-tree | |
288 | passed to the kernel. The actual content of it and kernel requirements | |
289 | are described later. You can find example of code manipulating that | |
290 | format in various places, including arch/powerpc/kernel/prom_init.c | |
291 | which will generate a flattened device-tree from the Open Firmware | |
292 | representation, or the fs2dt utility which is part of the kexec tools | |
293 | which will generate one from a filesystem representation. It is | |
294 | expected that a bootloader like uboot provides a bit more support, | |
295 | that will be discussed later as well. | |
296 | ||
297 | Note: The block has to be in main memory. It has to be accessible in | |
298 | both real mode and virtual mode with no mapping other than main | |
299 | memory. If you are writing a simple flash bootloader, it should copy | |
300 | the block to RAM before passing it to the kernel. | |
301 | ||
302 | ||
303 | 1) Header | |
304 | --------- | |
305 | ||
306 | The kernel is entered with r3 pointing to an area of memory that is | |
d6bc8ac9 | 307 | roughly described in include/asm-powerpc/prom.h by the structure |
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308 | boot_param_header: |
309 | ||
310 | struct boot_param_header { | |
311 | u32 magic; /* magic word OF_DT_HEADER */ | |
312 | u32 totalsize; /* total size of DT block */ | |
313 | u32 off_dt_struct; /* offset to structure */ | |
314 | u32 off_dt_strings; /* offset to strings */ | |
315 | u32 off_mem_rsvmap; /* offset to memory reserve map | |
5dd60166 | 316 | */ |
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317 | u32 version; /* format version */ |
318 | u32 last_comp_version; /* last compatible version */ | |
319 | ||
320 | /* version 2 fields below */ | |
321 | u32 boot_cpuid_phys; /* Which physical CPU id we're | |
322 | booting on */ | |
323 | /* version 3 fields below */ | |
324 | u32 size_dt_strings; /* size of the strings block */ | |
0e0293c8 DG |
325 | |
326 | /* version 17 fields below */ | |
327 | u32 size_dt_struct; /* size of the DT structure block */ | |
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328 | }; |
329 | ||
330 | Along with the constants: | |
331 | ||
332 | /* Definitions used by the flattened device tree */ | |
333 | #define OF_DT_HEADER 0xd00dfeed /* 4: version, | |
334 | 4: total size */ | |
335 | #define OF_DT_BEGIN_NODE 0x1 /* Start node: full name | |
5dd60166 | 336 | */ |
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337 | #define OF_DT_END_NODE 0x2 /* End node */ |
338 | #define OF_DT_PROP 0x3 /* Property: name off, | |
339 | size, content */ | |
340 | #define OF_DT_END 0x9 | |
341 | ||
342 | All values in this header are in big endian format, the various | |
343 | fields in this header are defined more precisely below. All | |
344 | "offset" values are in bytes from the start of the header; that is | |
345 | from the value of r3. | |
346 | ||
347 | - magic | |
348 | ||
349 | This is a magic value that "marks" the beginning of the | |
350 | device-tree block header. It contains the value 0xd00dfeed and is | |
351 | defined by the constant OF_DT_HEADER | |
352 | ||
353 | - totalsize | |
354 | ||
355 | This is the total size of the DT block including the header. The | |
356 | "DT" block should enclose all data structures defined in this | |
357 | chapter (who are pointed to by offsets in this header). That is, | |
358 | the device-tree structure, strings, and the memory reserve map. | |
359 | ||
360 | - off_dt_struct | |
361 | ||
362 | This is an offset from the beginning of the header to the start | |
363 | of the "structure" part the device tree. (see 2) device tree) | |
364 | ||
365 | - off_dt_strings | |
366 | ||
367 | This is an offset from the beginning of the header to the start | |
368 | of the "strings" part of the device-tree | |
369 | ||
370 | - off_mem_rsvmap | |
371 | ||
372 | This is an offset from the beginning of the header to the start | |
5dd60166 | 373 | of the reserved memory map. This map is a list of pairs of 64- |
c125a183 | 374 | bit integers. Each pair is a physical address and a size. The |
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375 | list is terminated by an entry of size 0. This map provides the |
376 | kernel with a list of physical memory areas that are "reserved" | |
377 | and thus not to be used for memory allocations, especially during | |
378 | early initialization. The kernel needs to allocate memory during | |
379 | boot for things like un-flattening the device-tree, allocating an | |
380 | MMU hash table, etc... Those allocations must be done in such a | |
381 | way to avoid overriding critical things like, on Open Firmware | |
382 | capable machines, the RTAS instance, or on some pSeries, the TCE | |
383 | tables used for the iommu. Typically, the reserve map should | |
384 | contain _at least_ this DT block itself (header,total_size). If | |
385 | you are passing an initrd to the kernel, you should reserve it as | |
386 | well. You do not need to reserve the kernel image itself. The map | |
5dd60166 | 387 | should be 64-bit aligned. |
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388 | |
389 | - version | |
390 | ||
391 | This is the version of this structure. Version 1 stops | |
392 | here. Version 2 adds an additional field boot_cpuid_phys. | |
393 | Version 3 adds the size of the strings block, allowing the kernel | |
394 | to reallocate it easily at boot and free up the unused flattened | |
395 | structure after expansion. Version 16 introduces a new more | |
396 | "compact" format for the tree itself that is however not backward | |
0e0293c8 DG |
397 | compatible. Version 17 adds an additional field, size_dt_struct, |
398 | allowing it to be reallocated or moved more easily (this is | |
399 | particularly useful for bootloaders which need to make | |
400 | adjustments to a device tree based on probed information). You | |
401 | should always generate a structure of the highest version defined | |
402 | at the time of your implementation. Currently that is version 17, | |
403 | unless you explicitly aim at being backward compatible. | |
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404 | |
405 | - last_comp_version | |
406 | ||
407 | Last compatible version. This indicates down to what version of | |
408 | the DT block you are backward compatible. For example, version 2 | |
409 | is backward compatible with version 1 (that is, a kernel build | |
410 | for version 1 will be able to boot with a version 2 format). You | |
411 | should put a 1 in this field if you generate a device tree of | |
0e0293c8 | 412 | version 1 to 3, or 16 if you generate a tree of version 16 or 17 |
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413 | using the new unit name format. |
414 | ||
415 | - boot_cpuid_phys | |
416 | ||
417 | This field only exist on version 2 headers. It indicate which | |
418 | physical CPU ID is calling the kernel entry point. This is used, | |
419 | among others, by kexec. If you are on an SMP system, this value | |
420 | should match the content of the "reg" property of the CPU node in | |
421 | the device-tree corresponding to the CPU calling the kernel entry | |
422 | point (see further chapters for more informations on the required | |
423 | device-tree contents) | |
424 | ||
0e0293c8 DG |
425 | - size_dt_strings |
426 | ||
427 | This field only exists on version 3 and later headers. It | |
428 | gives the size of the "strings" section of the device tree (which | |
429 | starts at the offset given by off_dt_strings). | |
430 | ||
431 | - size_dt_struct | |
432 | ||
433 | This field only exists on version 17 and later headers. It gives | |
434 | the size of the "structure" section of the device tree (which | |
435 | starts at the offset given by off_dt_struct). | |
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436 | |
437 | So the typical layout of a DT block (though the various parts don't | |
438 | need to be in that order) looks like this (addresses go from top to | |
439 | bottom): | |
440 | ||
441 | ||
442 | ------------------------------ | |
443 | r3 -> | struct boot_param_header | | |
444 | ------------------------------ | |
445 | | (alignment gap) (*) | | |
446 | ------------------------------ | |
447 | | memory reserve map | | |
448 | ------------------------------ | |
449 | | (alignment gap) | | |
450 | ------------------------------ | |
451 | | | | |
452 | | device-tree structure | | |
453 | | | | |
454 | ------------------------------ | |
455 | | (alignment gap) | | |
456 | ------------------------------ | |
457 | | | | |
458 | | device-tree strings | | |
459 | | | | |
460 | -----> ------------------------------ | |
461 | | | |
462 | | | |
463 | --- (r3 + totalsize) | |
464 | ||
465 | (*) The alignment gaps are not necessarily present; their presence | |
466 | and size are dependent on the various alignment requirements of | |
467 | the individual data blocks. | |
468 | ||
469 | ||
470 | 2) Device tree generalities | |
471 | --------------------------- | |
472 | ||
473 | This device-tree itself is separated in two different blocks, a | |
474 | structure block and a strings block. Both need to be aligned to a 4 | |
475 | byte boundary. | |
476 | ||
477 | First, let's quickly describe the device-tree concept before detailing | |
478 | the storage format. This chapter does _not_ describe the detail of the | |
479 | required types of nodes & properties for the kernel, this is done | |
480 | later in chapter III. | |
481 | ||
482 | The device-tree layout is strongly inherited from the definition of | |
483 | the Open Firmware IEEE 1275 device-tree. It's basically a tree of | |
484 | nodes, each node having two or more named properties. A property can | |
485 | have a value or not. | |
486 | ||
487 | It is a tree, so each node has one and only one parent except for the | |
488 | root node who has no parent. | |
489 | ||
490 | A node has 2 names. The actual node name is generally contained in a | |
491 | property of type "name" in the node property list whose value is a | |
492 | zero terminated string and is mandatory for version 1 to 3 of the | |
0e0293c8 | 493 | format definition (as it is in Open Firmware). Version 16 makes it |
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494 | optional as it can generate it from the unit name defined below. |
495 | ||
2fe0ae78 | 496 | There is also a "unit name" that is used to differentiate nodes with |
c125a183 | 497 | the same name at the same level, it is usually made of the node |
2fe0ae78 | 498 | names, the "@" sign, and a "unit address", which definition is |
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499 | specific to the bus type the node sits on. |
500 | ||
501 | The unit name doesn't exist as a property per-se but is included in | |
502 | the device-tree structure. It is typically used to represent "path" in | |
503 | the device-tree. More details about the actual format of these will be | |
504 | below. | |
505 | ||
506 | The kernel powerpc generic code does not make any formal use of the | |
507 | unit address (though some board support code may do) so the only real | |
508 | requirement here for the unit address is to ensure uniqueness of | |
509 | the node unit name at a given level of the tree. Nodes with no notion | |
510 | of address and no possible sibling of the same name (like /memory or | |
511 | /cpus) may omit the unit address in the context of this specification, | |
512 | or use the "@0" default unit address. The unit name is used to define | |
513 | a node "full path", which is the concatenation of all parent node | |
514 | unit names separated with "/". | |
515 | ||
516 | The root node doesn't have a defined name, and isn't required to have | |
517 | a name property either if you are using version 3 or earlier of the | |
518 | format. It also has no unit address (no @ symbol followed by a unit | |
519 | address). The root node unit name is thus an empty string. The full | |
520 | path to the root node is "/". | |
521 | ||
522 | Every node which actually represents an actual device (that is, a node | |
523 | which isn't only a virtual "container" for more nodes, like "/cpus" | |
524 | is) is also required to have a "device_type" property indicating the | |
525 | type of node . | |
526 | ||
527 | Finally, every node that can be referenced from a property in another | |
528 | node is required to have a "linux,phandle" property. Real open | |
529 | firmware implementations provide a unique "phandle" value for every | |
530 | node that the "prom_init()" trampoline code turns into | |
531 | "linux,phandle" properties. However, this is made optional if the | |
532 | flattened device tree is used directly. An example of a node | |
533 | referencing another node via "phandle" is when laying out the | |
534 | interrupt tree which will be described in a further version of this | |
535 | document. | |
536 | ||
5dd60166 | 537 | This "linux, phandle" property is a 32-bit value that uniquely |
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538 | identifies a node. You are free to use whatever values or system of |
539 | values, internal pointers, or whatever to generate these, the only | |
540 | requirement is that every node for which you provide that property has | |
541 | a unique value for it. | |
542 | ||
543 | Here is an example of a simple device-tree. In this example, an "o" | |
544 | designates a node followed by the node unit name. Properties are | |
545 | presented with their name followed by their content. "content" | |
546 | represents an ASCII string (zero terminated) value, while <content> | |
5dd60166 | 547 | represents a 32-bit hexadecimal value. The various nodes in this |
c125a183 DG |
548 | example will be discussed in a later chapter. At this point, it is |
549 | only meant to give you a idea of what a device-tree looks like. I have | |
550 | purposefully kept the "name" and "linux,phandle" properties which | |
551 | aren't necessary in order to give you a better idea of what the tree | |
552 | looks like in practice. | |
553 | ||
554 | / o device-tree | |
555 | |- name = "device-tree" | |
556 | |- model = "MyBoardName" | |
557 | |- compatible = "MyBoardFamilyName" | |
558 | |- #address-cells = <2> | |
559 | |- #size-cells = <2> | |
560 | |- linux,phandle = <0> | |
561 | | | |
562 | o cpus | |
563 | | | - name = "cpus" | |
564 | | | - linux,phandle = <1> | |
565 | | | - #address-cells = <1> | |
566 | | | - #size-cells = <0> | |
567 | | | | |
568 | | o PowerPC,970@0 | |
569 | | |- name = "PowerPC,970" | |
570 | | |- device_type = "cpu" | |
571 | | |- reg = <0> | |
572 | | |- clock-frequency = <5f5e1000> | |
32aed2a5 | 573 | | |- 64-bit |
c125a183 DG |
574 | | |- linux,phandle = <2> |
575 | | | |
576 | o memory@0 | |
577 | | |- name = "memory" | |
578 | | |- device_type = "memory" | |
579 | | |- reg = <00000000 00000000 00000000 20000000> | |
580 | | |- linux,phandle = <3> | |
581 | | | |
582 | o chosen | |
583 | |- name = "chosen" | |
584 | |- bootargs = "root=/dev/sda2" | |
c125a183 DG |
585 | |- linux,phandle = <4> |
586 | ||
587 | This tree is almost a minimal tree. It pretty much contains the | |
588 | minimal set of required nodes and properties to boot a linux kernel; | |
589 | that is, some basic model informations at the root, the CPUs, and the | |
590 | physical memory layout. It also includes misc information passed | |
591 | through /chosen, like in this example, the platform type (mandatory) | |
592 | and the kernel command line arguments (optional). | |
593 | ||
32aed2a5 | 594 | The /cpus/PowerPC,970@0/64-bit property is an example of a |
c125a183 DG |
595 | property without a value. All other properties have a value. The |
596 | significance of the #address-cells and #size-cells properties will be | |
597 | explained in chapter IV which defines precisely the required nodes and | |
598 | properties and their content. | |
599 | ||
600 | ||
601 | 3) Device tree "structure" block | |
602 | ||
603 | The structure of the device tree is a linearized tree structure. The | |
604 | "OF_DT_BEGIN_NODE" token starts a new node, and the "OF_DT_END_NODE" | |
605 | ends that node definition. Child nodes are simply defined before | |
606 | "OF_DT_END_NODE" (that is nodes within the node). A 'token' is a 32 | |
607 | bit value. The tree has to be "finished" with a OF_DT_END token | |
608 | ||
609 | Here's the basic structure of a single node: | |
610 | ||
611 | * token OF_DT_BEGIN_NODE (that is 0x00000001) | |
612 | * for version 1 to 3, this is the node full path as a zero | |
613 | terminated string, starting with "/". For version 16 and later, | |
614 | this is the node unit name only (or an empty string for the | |
615 | root node) | |
616 | * [align gap to next 4 bytes boundary] | |
617 | * for each property: | |
618 | * token OF_DT_PROP (that is 0x00000003) | |
5dd60166 DP |
619 | * 32-bit value of property value size in bytes (or 0 if no |
620 | value) | |
621 | * 32-bit value of offset in string block of property name | |
c125a183 DG |
622 | * property value data if any |
623 | * [align gap to next 4 bytes boundary] | |
624 | * [child nodes if any] | |
625 | * token OF_DT_END_NODE (that is 0x00000002) | |
626 | ||
5dd60166 | 627 | So the node content can be summarized as a start token, a full path, |
53cb4726 | 628 | a list of properties, a list of child nodes, and an end token. Every |
c125a183 DG |
629 | child node is a full node structure itself as defined above. |
630 | ||
eff2ebd2 DG |
631 | NOTE: The above definition requires that all property definitions for |
632 | a particular node MUST precede any subnode definitions for that node. | |
633 | Although the structure would not be ambiguous if properties and | |
634 | subnodes were intermingled, the kernel parser requires that the | |
635 | properties come first (up until at least 2.6.22). Any tools | |
636 | manipulating a flattened tree must take care to preserve this | |
637 | constraint. | |
638 | ||
53cb4726 | 639 | 4) Device tree "strings" block |
c125a183 DG |
640 | |
641 | In order to save space, property names, which are generally redundant, | |
642 | are stored separately in the "strings" block. This block is simply the | |
643 | whole bunch of zero terminated strings for all property names | |
644 | concatenated together. The device-tree property definitions in the | |
645 | structure block will contain offset values from the beginning of the | |
646 | strings block. | |
647 | ||
648 | ||
649 | III - Required content of the device tree | |
650 | ========================================= | |
651 | ||
652 | WARNING: All "linux,*" properties defined in this document apply only | |
653 | to a flattened device-tree. If your platform uses a real | |
654 | implementation of Open Firmware or an implementation compatible with | |
655 | the Open Firmware client interface, those properties will be created | |
656 | by the trampoline code in the kernel's prom_init() file. For example, | |
657 | that's where you'll have to add code to detect your board model and | |
a2ffd275 | 658 | set the platform number. However, when using the flattened device-tree |
c125a183 DG |
659 | entry point, there is no prom_init() pass, and thus you have to |
660 | provide those properties yourself. | |
661 | ||
662 | ||
663 | 1) Note about cells and address representation | |
664 | ---------------------------------------------- | |
665 | ||
666 | The general rule is documented in the various Open Firmware | |
5dd60166 | 667 | documentations. If you choose to describe a bus with the device-tree |
c125a183 DG |
668 | and there exist an OF bus binding, then you should follow the |
669 | specification. However, the kernel does not require every single | |
670 | device or bus to be described by the device tree. | |
671 | ||
672 | In general, the format of an address for a device is defined by the | |
673 | parent bus type, based on the #address-cells and #size-cells | |
674 | property. In the absence of such a property, the parent's parent | |
675 | values are used, etc... The kernel requires the root node to have | |
676 | those properties defining addresses format for devices directly mapped | |
677 | on the processor bus. | |
678 | ||
679 | Those 2 properties define 'cells' for representing an address and a | |
5dd60166 | 680 | size. A "cell" is a 32-bit number. For example, if both contain 2 |
c125a183 | 681 | like the example tree given above, then an address and a size are both |
5dd60166 | 682 | composed of 2 cells, and each is a 64-bit number (cells are |
c125a183 DG |
683 | concatenated and expected to be in big endian format). Another example |
684 | is the way Apple firmware defines them, with 2 cells for an address | |
685 | and one cell for a size. Most 32-bit implementations should define | |
686 | #address-cells and #size-cells to 1, which represents a 32-bit value. | |
687 | Some 32-bit processors allow for physical addresses greater than 32 | |
688 | bits; these processors should define #address-cells as 2. | |
689 | ||
690 | "reg" properties are always a tuple of the type "address size" where | |
691 | the number of cells of address and size is specified by the bus | |
692 | #address-cells and #size-cells. When a bus supports various address | |
693 | spaces and other flags relative to a given address allocation (like | |
694 | prefetchable, etc...) those flags are usually added to the top level | |
695 | bits of the physical address. For example, a PCI physical address is | |
696 | made of 3 cells, the bottom two containing the actual address itself | |
697 | while the top cell contains address space indication, flags, and pci | |
698 | bus & device numbers. | |
699 | ||
700 | For busses that support dynamic allocation, it's the accepted practice | |
701 | to then not provide the address in "reg" (keep it 0) though while | |
702 | providing a flag indicating the address is dynamically allocated, and | |
703 | then, to provide a separate "assigned-addresses" property that | |
704 | contains the fully allocated addresses. See the PCI OF bindings for | |
705 | details. | |
706 | ||
707 | In general, a simple bus with no address space bits and no dynamic | |
708 | allocation is preferred if it reflects your hardware, as the existing | |
709 | kernel address parsing functions will work out of the box. If you | |
710 | define a bus type with a more complex address format, including things | |
711 | like address space bits, you'll have to add a bus translator to the | |
712 | prom_parse.c file of the recent kernels for your bus type. | |
713 | ||
714 | The "reg" property only defines addresses and sizes (if #size-cells | |
992caacf | 715 | is non-0) within a given bus. In order to translate addresses upward |
5dd60166 | 716 | (that is into parent bus addresses, and possibly into CPU physical |
c125a183 DG |
717 | addresses), all busses must contain a "ranges" property. If the |
718 | "ranges" property is missing at a given level, it's assumed that | |
992caacf | 719 | translation isn't possible. The format of the "ranges" property for a |
c125a183 DG |
720 | bus is a list of: |
721 | ||
722 | bus address, parent bus address, size | |
723 | ||
724 | "bus address" is in the format of the bus this bus node is defining, | |
725 | that is, for a PCI bridge, it would be a PCI address. Thus, (bus | |
726 | address, size) defines a range of addresses for child devices. "parent | |
727 | bus address" is in the format of the parent bus of this bus. For | |
728 | example, for a PCI host controller, that would be a CPU address. For a | |
729 | PCI<->ISA bridge, that would be a PCI address. It defines the base | |
730 | address in the parent bus where the beginning of that range is mapped. | |
731 | ||
5dd60166 | 732 | For a new 64-bit powerpc board, I recommend either the 2/2 format or |
c125a183 | 733 | Apple's 2/1 format which is slightly more compact since sizes usually |
5dd60166 | 734 | fit in a single 32-bit word. New 32-bit powerpc boards should use a |
c125a183 DG |
735 | 1/1 format, unless the processor supports physical addresses greater |
736 | than 32-bits, in which case a 2/1 format is recommended. | |
737 | ||
738 | ||
739 | 2) Note about "compatible" properties | |
740 | ------------------------------------- | |
741 | ||
742 | These properties are optional, but recommended in devices and the root | |
743 | node. The format of a "compatible" property is a list of concatenated | |
744 | zero terminated strings. They allow a device to express its | |
745 | compatibility with a family of similar devices, in some cases, | |
746 | allowing a single driver to match against several devices regardless | |
747 | of their actual names. | |
748 | ||
749 | 3) Note about "name" properties | |
750 | ------------------------------- | |
751 | ||
752 | While earlier users of Open Firmware like OldWorld macintoshes tended | |
753 | to use the actual device name for the "name" property, it's nowadays | |
754 | considered a good practice to use a name that is closer to the device | |
755 | class (often equal to device_type). For example, nowadays, ethernet | |
756 | controllers are named "ethernet", an additional "model" property | |
757 | defining precisely the chip type/model, and "compatible" property | |
758 | defining the family in case a single driver can driver more than one | |
759 | of these chips. However, the kernel doesn't generally put any | |
760 | restriction on the "name" property; it is simply considered good | |
761 | practice to follow the standard and its evolutions as closely as | |
762 | possible. | |
763 | ||
764 | Note also that the new format version 16 makes the "name" property | |
765 | optional. If it's absent for a node, then the node's unit name is then | |
766 | used to reconstruct the name. That is, the part of the unit name | |
767 | before the "@" sign is used (or the entire unit name if no "@" sign | |
768 | is present). | |
769 | ||
770 | 4) Note about node and property names and character set | |
771 | ------------------------------------------------------- | |
772 | ||
a2ffd275 | 773 | While open firmware provides more flexible usage of 8859-1, this |
c125a183 DG |
774 | specification enforces more strict rules. Nodes and properties should |
775 | be comprised only of ASCII characters 'a' to 'z', '0' to | |
776 | '9', ',', '.', '_', '+', '#', '?', and '-'. Node names additionally | |
777 | allow uppercase characters 'A' to 'Z' (property names should be | |
778 | lowercase. The fact that vendors like Apple don't respect this rule is | |
779 | irrelevant here). Additionally, node and property names should always | |
780 | begin with a character in the range 'a' to 'z' (or 'A' to 'Z' for node | |
781 | names). | |
782 | ||
783 | The maximum number of characters for both nodes and property names | |
784 | is 31. In the case of node names, this is only the leftmost part of | |
785 | a unit name (the pure "name" property), it doesn't include the unit | |
786 | address which can extend beyond that limit. | |
787 | ||
788 | ||
789 | 5) Required nodes and properties | |
790 | -------------------------------- | |
791 | These are all that are currently required. However, it is strongly | |
792 | recommended that you expose PCI host bridges as documented in the | |
793 | PCI binding to open firmware, and your interrupt tree as documented | |
794 | in OF interrupt tree specification. | |
795 | ||
796 | a) The root node | |
797 | ||
798 | The root node requires some properties to be present: | |
799 | ||
800 | - model : this is your board name/model | |
801 | - #address-cells : address representation for "root" devices | |
802 | - #size-cells: the size representation for "root" devices | |
e8222502 BH |
803 | - device_type : This property shouldn't be necessary. However, if |
804 | you decide to create a device_type for your root node, make sure it | |
805 | is _not_ "chrp" unless your platform is a pSeries or PAPR compliant | |
806 | one for 64-bit, or a CHRP-type machine for 32-bit as this will | |
807 | matched by the kernel this way. | |
c125a183 DG |
808 | |
809 | Additionally, some recommended properties are: | |
810 | ||
811 | - compatible : the board "family" generally finds its way here, | |
812 | for example, if you have 2 board models with a similar layout, | |
813 | that typically get driven by the same platform code in the | |
814 | kernel, you would use a different "model" property but put a | |
815 | value in "compatible". The kernel doesn't directly use that | |
143a42d1 | 816 | value but it is generally useful. |
c125a183 DG |
817 | |
818 | The root node is also generally where you add additional properties | |
819 | specific to your board like the serial number if any, that sort of | |
6c28f2c0 | 820 | thing. It is recommended that if you add any "custom" property whose |
c125a183 DG |
821 | name may clash with standard defined ones, you prefix them with your |
822 | vendor name and a comma. | |
823 | ||
824 | b) The /cpus node | |
825 | ||
826 | This node is the parent of all individual CPU nodes. It doesn't | |
827 | have any specific requirements, though it's generally good practice | |
828 | to have at least: | |
829 | ||
830 | #address-cells = <00000001> | |
831 | #size-cells = <00000000> | |
832 | ||
833 | This defines that the "address" for a CPU is a single cell, and has | |
834 | no meaningful size. This is not necessary but the kernel will assume | |
835 | that format when reading the "reg" properties of a CPU node, see | |
836 | below | |
837 | ||
838 | c) The /cpus/* nodes | |
839 | ||
840 | So under /cpus, you are supposed to create a node for every CPU on | |
841 | the machine. There is no specific restriction on the name of the | |
842 | CPU, though It's common practice to call it PowerPC,<name>. For | |
843 | example, Apple uses PowerPC,G5 while IBM uses PowerPC,970FX. | |
844 | ||
845 | Required properties: | |
846 | ||
847 | - device_type : has to be "cpu" | |
5dd60166 | 848 | - reg : This is the physical CPU number, it's a single 32-bit cell |
c125a183 DG |
849 | and is also used as-is as the unit number for constructing the |
850 | unit name in the full path. For example, with 2 CPUs, you would | |
851 | have the full path: | |
852 | /cpus/PowerPC,970FX@0 | |
853 | /cpus/PowerPC,970FX@1 | |
854 | (unit addresses do not require leading zeroes) | |
20474abd BH |
855 | - d-cache-block-size : one cell, L1 data cache block size in bytes (*) |
856 | - i-cache-block-size : one cell, L1 instruction cache block size in | |
c125a183 DG |
857 | bytes |
858 | - d-cache-size : one cell, size of L1 data cache in bytes | |
859 | - i-cache-size : one cell, size of L1 instruction cache in bytes | |
c125a183 | 860 | |
20474abd BH |
861 | (*) The cache "block" size is the size on which the cache management |
862 | instructions operate. Historically, this document used the cache | |
863 | "line" size here which is incorrect. The kernel will prefer the cache | |
864 | block size and will fallback to cache line size for backward | |
865 | compatibility. | |
866 | ||
c125a183 DG |
867 | Recommended properties: |
868 | ||
869 | - timebase-frequency : a cell indicating the frequency of the | |
870 | timebase in Hz. This is not directly used by the generic code, | |
871 | but you are welcome to copy/paste the pSeries code for setting | |
872 | the kernel timebase/decrementer calibration based on this | |
873 | value. | |
874 | - clock-frequency : a cell indicating the CPU core clock frequency | |
5dd60166 | 875 | in Hz. A new property will be defined for 64-bit values, but if |
c125a183 DG |
876 | your frequency is < 4Ghz, one cell is enough. Here as well as |
877 | for the above, the common code doesn't use that property, but | |
878 | you are welcome to re-use the pSeries or Maple one. A future | |
879 | kernel version might provide a common function for this. | |
20474abd BH |
880 | - d-cache-line-size : one cell, L1 data cache line size in bytes |
881 | if different from the block size | |
882 | - i-cache-line-size : one cell, L1 instruction cache line size in | |
883 | bytes if different from the block size | |
c125a183 DG |
884 | |
885 | You are welcome to add any property you find relevant to your board, | |
886 | like some information about the mechanism used to soft-reset the | |
887 | CPUs. For example, Apple puts the GPIO number for CPU soft reset | |
888 | lines in there as a "soft-reset" property since they start secondary | |
889 | CPUs by soft-resetting them. | |
890 | ||
891 | ||
892 | d) the /memory node(s) | |
893 | ||
894 | To define the physical memory layout of your board, you should | |
895 | create one or more memory node(s). You can either create a single | |
896 | node with all memory ranges in its reg property, or you can create | |
897 | several nodes, as you wish. The unit address (@ part) used for the | |
898 | full path is the address of the first range of memory defined by a | |
899 | given node. If you use a single memory node, this will typically be | |
900 | @0. | |
901 | ||
902 | Required properties: | |
903 | ||
904 | - device_type : has to be "memory" | |
905 | - reg : This property contains all the physical memory ranges of | |
906 | your board. It's a list of addresses/sizes concatenated | |
907 | together, with the number of cells of each defined by the | |
908 | #address-cells and #size-cells of the root node. For example, | |
6c28f2c0 | 909 | with both of these properties being 2 like in the example given |
c125a183 DG |
910 | earlier, a 970 based machine with 6Gb of RAM could typically |
911 | have a "reg" property here that looks like: | |
912 | ||
913 | 00000000 00000000 00000000 80000000 | |
914 | 00000001 00000000 00000001 00000000 | |
915 | ||
916 | That is a range starting at 0 of 0x80000000 bytes and a range | |
917 | starting at 0x100000000 and of 0x100000000 bytes. You can see | |
918 | that there is no memory covering the IO hole between 2Gb and | |
919 | 4Gb. Some vendors prefer splitting those ranges into smaller | |
920 | segments, but the kernel doesn't care. | |
921 | ||
922 | e) The /chosen node | |
923 | ||
924 | This node is a bit "special". Normally, that's where open firmware | |
925 | puts some variable environment information, like the arguments, or | |
d1bff9ed | 926 | the default input/output devices. |
c125a183 DG |
927 | |
928 | This specification makes a few of these mandatory, but also defines | |
929 | some linux-specific properties that would be normally constructed by | |
930 | the prom_init() trampoline when booting with an OF client interface, | |
931 | but that you have to provide yourself when using the flattened format. | |
932 | ||
c125a183 DG |
933 | Recommended properties: |
934 | ||
935 | - bootargs : This zero-terminated string is passed as the kernel | |
936 | command line | |
937 | - linux,stdout-path : This is the full path to your standard | |
938 | console device if any. Typically, if you have serial devices on | |
939 | your board, you may want to put the full path to the one set as | |
940 | the default console in the firmware here, for the kernel to pick | |
5d3f083d | 941 | it up as its own default console. If you look at the function |
c125a183 DG |
942 | set_preferred_console() in arch/ppc64/kernel/setup.c, you'll see |
943 | that the kernel tries to find out the default console and has | |
944 | knowledge of various types like 8250 serial ports. You may want | |
945 | to extend this function to add your own. | |
c125a183 DG |
946 | |
947 | Note that u-boot creates and fills in the chosen node for platforms | |
948 | that use it. | |
949 | ||
d1bff9ed SY |
950 | (Note: a practice that is now obsolete was to include a property |
951 | under /chosen called interrupt-controller which had a phandle value | |
952 | that pointed to the main interrupt controller) | |
953 | ||
c125a183 DG |
954 | f) the /soc<SOCname> node |
955 | ||
956 | This node is used to represent a system-on-a-chip (SOC) and must be | |
957 | present if the processor is a SOC. The top-level soc node contains | |
958 | information that is global to all devices on the SOC. The node name | |
959 | should contain a unit address for the SOC, which is the base address | |
960 | of the memory-mapped register set for the SOC. The name of an soc | |
961 | node should start with "soc", and the remainder of the name should | |
962 | represent the part number for the soc. For example, the MPC8540's | |
963 | soc node would be called "soc8540". | |
964 | ||
965 | Required properties: | |
966 | ||
967 | - device_type : Should be "soc" | |
968 | - ranges : Should be defined as specified in 1) to describe the | |
969 | translation of SOC addresses for memory mapped SOC registers. | |
7d4b95ae BB |
970 | - bus-frequency: Contains the bus frequency for the SOC node. |
971 | Typically, the value of this field is filled in by the boot | |
972 | loader. | |
973 | ||
c125a183 DG |
974 | |
975 | Recommended properties: | |
976 | ||
977 | - reg : This property defines the address and size of the | |
978 | memory-mapped registers that are used for the SOC node itself. | |
979 | It does not include the child device registers - these will be | |
980 | defined inside each child node. The address specified in the | |
981 | "reg" property should match the unit address of the SOC node. | |
982 | - #address-cells : Address representation for "soc" devices. The | |
983 | format of this field may vary depending on whether or not the | |
984 | device registers are memory mapped. For memory mapped | |
985 | registers, this field represents the number of cells needed to | |
986 | represent the address of the registers. For SOCs that do not | |
987 | use MMIO, a special address format should be defined that | |
988 | contains enough cells to represent the required information. | |
989 | See 1) above for more details on defining #address-cells. | |
990 | - #size-cells : Size representation for "soc" devices | |
991 | - #interrupt-cells : Defines the width of cells used to represent | |
992 | interrupts. Typically this value is <2>, which includes a | |
993 | 32-bit number that represents the interrupt number, and a | |
994 | 32-bit number that represents the interrupt sense and level. | |
995 | This field is only needed if the SOC contains an interrupt | |
996 | controller. | |
997 | ||
998 | The SOC node may contain child nodes for each SOC device that the | |
999 | platform uses. Nodes should not be created for devices which exist | |
1000 | on the SOC but are not used by a particular platform. See chapter VI | |
5dd60166 | 1001 | for more information on how to specify devices that are part of a SOC. |
c125a183 DG |
1002 | |
1003 | Example SOC node for the MPC8540: | |
1004 | ||
1005 | soc8540@e0000000 { | |
1006 | #address-cells = <1>; | |
1007 | #size-cells = <1>; | |
1008 | #interrupt-cells = <2>; | |
1009 | device_type = "soc"; | |
1010 | ranges = <00000000 e0000000 00100000> | |
1011 | reg = <e0000000 00003000>; | |
7d4b95ae | 1012 | bus-frequency = <0>; |
c125a183 DG |
1013 | } |
1014 | ||
1015 | ||
1016 | ||
1017 | IV - "dtc", the device tree compiler | |
1018 | ==================================== | |
1019 | ||
1020 | ||
1021 | dtc source code can be found at | |
1022 | <http://ozlabs.org/~dgibson/dtc/dtc.tar.gz> | |
1023 | ||
1024 | WARNING: This version is still in early development stage; the | |
1025 | resulting device-tree "blobs" have not yet been validated with the | |
1026 | kernel. The current generated bloc lacks a useful reserve map (it will | |
1027 | be fixed to generate an empty one, it's up to the bootloader to fill | |
1028 | it up) among others. The error handling needs work, bugs are lurking, | |
1029 | etc... | |
1030 | ||
1031 | dtc basically takes a device-tree in a given format and outputs a | |
1032 | device-tree in another format. The currently supported formats are: | |
1033 | ||
1034 | Input formats: | |
1035 | ------------- | |
1036 | ||
1037 | - "dtb": "blob" format, that is a flattened device-tree block | |
1038 | with | |
1039 | header all in a binary blob. | |
1040 | - "dts": "source" format. This is a text file containing a | |
1041 | "source" for a device-tree. The format is defined later in this | |
1042 | chapter. | |
1043 | - "fs" format. This is a representation equivalent to the | |
1044 | output of /proc/device-tree, that is nodes are directories and | |
1045 | properties are files | |
1046 | ||
1047 | Output formats: | |
1048 | --------------- | |
1049 | ||
1050 | - "dtb": "blob" format | |
1051 | - "dts": "source" format | |
1052 | - "asm": assembly language file. This is a file that can be | |
1053 | sourced by gas to generate a device-tree "blob". That file can | |
1054 | then simply be added to your Makefile. Additionally, the | |
6c28f2c0 | 1055 | assembly file exports some symbols that can be used. |
c125a183 DG |
1056 | |
1057 | ||
1058 | The syntax of the dtc tool is | |
1059 | ||
1060 | dtc [-I <input-format>] [-O <output-format>] | |
1061 | [-o output-filename] [-V output_version] input_filename | |
1062 | ||
1063 | ||
5dd60166 | 1064 | The "output_version" defines what version of the "blob" format will be |
c125a183 DG |
1065 | generated. Supported versions are 1,2,3 and 16. The default is |
1066 | currently version 3 but that may change in the future to version 16. | |
1067 | ||
1068 | Additionally, dtc performs various sanity checks on the tree, like the | |
6c28f2c0 | 1069 | uniqueness of linux, phandle properties, validity of strings, etc... |
c125a183 DG |
1070 | |
1071 | The format of the .dts "source" file is "C" like, supports C and C++ | |
6c28f2c0 | 1072 | style comments. |
c125a183 DG |
1073 | |
1074 | / { | |
1075 | } | |
1076 | ||
1077 | The above is the "device-tree" definition. It's the only statement | |
1078 | supported currently at the toplevel. | |
1079 | ||
1080 | / { | |
1081 | property1 = "string_value"; /* define a property containing a 0 | |
1082 | * terminated string | |
1083 | */ | |
1084 | ||
1085 | property2 = <1234abcd>; /* define a property containing a | |
5dd60166 | 1086 | * numerical 32-bit value (hexadecimal) |
c125a183 DG |
1087 | */ |
1088 | ||
1089 | property3 = <12345678 12345678 deadbeef>; | |
1090 | /* define a property containing 3 | |
5dd60166 | 1091 | * numerical 32-bit values (cells) in |
c125a183 DG |
1092 | * hexadecimal |
1093 | */ | |
1094 | property4 = [0a 0b 0c 0d de ea ad be ef]; | |
1095 | /* define a property whose content is | |
1096 | * an arbitrary array of bytes | |
1097 | */ | |
1098 | ||
1099 | childnode@addresss { /* define a child node named "childnode" | |
1100 | * whose unit name is "childnode at | |
1101 | * address" | |
1102 | */ | |
1103 | ||
1104 | childprop = "hello\n"; /* define a property "childprop" of | |
1105 | * childnode (in this case, a string) | |
1106 | */ | |
1107 | }; | |
1108 | }; | |
1109 | ||
1110 | Nodes can contain other nodes etc... thus defining the hierarchical | |
1111 | structure of the tree. | |
1112 | ||
1113 | Strings support common escape sequences from C: "\n", "\t", "\r", | |
1114 | "\(octal value)", "\x(hex value)". | |
1115 | ||
1116 | It is also suggested that you pipe your source file through cpp (gcc | |
1117 | preprocessor) so you can use #include's, #define for constants, etc... | |
1118 | ||
1119 | Finally, various options are planned but not yet implemented, like | |
1120 | automatic generation of phandles, labels (exported to the asm file so | |
1121 | you can point to a property content and change it easily from whatever | |
1122 | you link the device-tree with), label or path instead of numeric value | |
1123 | in some cells to "point" to a node (replaced by a phandle at compile | |
1124 | time), export of reserve map address to the asm file, ability to | |
1125 | specify reserve map content at compile time, etc... | |
1126 | ||
1127 | We may provide a .h include file with common definitions of that | |
1128 | proves useful for some properties (like building PCI properties or | |
1129 | interrupt maps) though it may be better to add a notion of struct | |
1130 | definitions to the compiler... | |
1131 | ||
1132 | ||
1133 | V - Recommendations for a bootloader | |
1134 | ==================================== | |
1135 | ||
1136 | ||
1137 | Here are some various ideas/recommendations that have been proposed | |
1138 | while all this has been defined and implemented. | |
1139 | ||
1140 | - The bootloader may want to be able to use the device-tree itself | |
1141 | and may want to manipulate it (to add/edit some properties, | |
1142 | like physical memory size or kernel arguments). At this point, 2 | |
1143 | choices can be made. Either the bootloader works directly on the | |
1144 | flattened format, or the bootloader has its own internal tree | |
1145 | representation with pointers (similar to the kernel one) and | |
1146 | re-flattens the tree when booting the kernel. The former is a bit | |
1147 | more difficult to edit/modify, the later requires probably a bit | |
1148 | more code to handle the tree structure. Note that the structure | |
1149 | format has been designed so it's relatively easy to "insert" | |
1150 | properties or nodes or delete them by just memmoving things | |
1151 | around. It contains no internal offsets or pointers for this | |
1152 | purpose. | |
1153 | ||
d6bc8ac9 | 1154 | - An example of code for iterating nodes & retrieving properties |
c125a183 DG |
1155 | directly from the flattened tree format can be found in the kernel |
1156 | file arch/ppc64/kernel/prom.c, look at scan_flat_dt() function, | |
d6bc8ac9 | 1157 | its usage in early_init_devtree(), and the corresponding various |
c125a183 DG |
1158 | early_init_dt_scan_*() callbacks. That code can be re-used in a |
1159 | GPL bootloader, and as the author of that code, I would be happy | |
5dd60166 | 1160 | to discuss possible free licensing to any vendor who wishes to |
c125a183 DG |
1161 | integrate all or part of this code into a non-GPL bootloader. |
1162 | ||
1163 | ||
1164 | ||
1165 | VI - System-on-a-chip devices and nodes | |
1166 | ======================================= | |
1167 | ||
1168 | Many companies are now starting to develop system-on-a-chip | |
5dd60166 | 1169 | processors, where the processor core (CPU) and many peripheral devices |
c125a183 DG |
1170 | exist on a single piece of silicon. For these SOCs, an SOC node |
1171 | should be used that defines child nodes for the devices that make | |
1172 | up the SOC. While platforms are not required to use this model in | |
1173 | order to boot the kernel, it is highly encouraged that all SOC | |
1174 | implementations define as complete a flat-device-tree as possible to | |
1175 | describe the devices on the SOC. This will allow for the | |
1176 | genericization of much of the kernel code. | |
1177 | ||
1178 | ||
1179 | 1) Defining child nodes of an SOC | |
1180 | --------------------------------- | |
1181 | ||
1182 | Each device that is part of an SOC may have its own node entry inside | |
1183 | the SOC node. For each device that is included in the SOC, the unit | |
1184 | address property represents the address offset for this device's | |
1185 | memory-mapped registers in the parent's address space. The parent's | |
1186 | address space is defined by the "ranges" property in the top-level soc | |
1187 | node. The "reg" property for each node that exists directly under the | |
1188 | SOC node should contain the address mapping from the child address space | |
1189 | to the parent SOC address space and the size of the device's | |
1190 | memory-mapped register file. | |
1191 | ||
1192 | For many devices that may exist inside an SOC, there are predefined | |
1193 | specifications for the format of the device tree node. All SOC child | |
1194 | nodes should follow these specifications, except where noted in this | |
1195 | document. | |
1196 | ||
1197 | See appendix A for an example partial SOC node definition for the | |
1198 | MPC8540. | |
1199 | ||
1200 | ||
27565903 | 1201 | 2) Representing devices without a current OF specification |
c125a183 DG |
1202 | ---------------------------------------------------------- |
1203 | ||
1204 | Currently, there are many devices on SOCs that do not have a standard | |
1205 | representation pre-defined as part of the open firmware | |
1206 | specifications, mainly because the boards that contain these SOCs are | |
1207 | not currently booted using open firmware. This section contains | |
1208 | descriptions for the SOC devices for which new nodes have been | |
1209 | defined; this list will expand as more and more SOC-containing | |
1210 | platforms are moved over to use the flattened-device-tree model. | |
1211 | ||
1212 | a) MDIO IO device | |
1213 | ||
1214 | The MDIO is a bus to which the PHY devices are connected. For each | |
1215 | device that exists on this bus, a child node should be created. See | |
1216 | the definition of the PHY node below for an example of how to define | |
1217 | a PHY. | |
1218 | ||
1219 | Required properties: | |
1220 | - reg : Offset and length of the register set for the device | |
1221 | - device_type : Should be "mdio" | |
1222 | - compatible : Should define the compatible device type for the | |
1223 | mdio. Currently, this is most likely to be "gianfar" | |
1224 | ||
1225 | Example: | |
1226 | ||
1227 | mdio@24520 { | |
1228 | reg = <24520 20>; | |
7d4b95ae BB |
1229 | device_type = "mdio"; |
1230 | compatible = "gianfar"; | |
c125a183 DG |
1231 | |
1232 | ethernet-phy@0 { | |
1233 | ...... | |
1234 | }; | |
1235 | }; | |
1236 | ||
1237 | ||
1238 | b) Gianfar-compatible ethernet nodes | |
1239 | ||
1240 | Required properties: | |
1241 | ||
1242 | - device_type : Should be "network" | |
1243 | - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC" | |
1244 | - compatible : Should be "gianfar" | |
1245 | - reg : Offset and length of the register set for the device | |
f583165f | 1246 | - mac-address : List of bytes representing the ethernet address of |
c125a183 DG |
1247 | this controller |
1248 | - interrupts : <a b> where a is the interrupt number and b is a | |
1249 | field that represents an encoding of the sense and level | |
1250 | information for the interrupt. This should be encoded based on | |
1251 | the information in section 2) depending on the type of interrupt | |
1252 | controller you have. | |
1253 | - interrupt-parent : the phandle for the interrupt controller that | |
1254 | services interrupts for this device. | |
1255 | - phy-handle : The phandle for the PHY connected to this ethernet | |
1256 | controller. | |
1257 | ||
e0a2f28b SW |
1258 | Recommended properties: |
1259 | ||
1260 | - linux,network-index : This is the intended "index" of this | |
1261 | network device. This is used by the bootwrapper to interpret | |
1262 | MAC addresses passed by the firmware when no information other | |
1263 | than indices is available to associate an address with a device. | |
cc65185d AF |
1264 | - phy-connection-type : a string naming the controller/PHY interface type, |
1265 | i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii", | |
1266 | "tbi", or "rtbi". This property is only really needed if the connection | |
1267 | is of type "rgmii-id", as all other connection types are detected by | |
1268 | hardware. | |
1269 | ||
e0a2f28b | 1270 | |
c125a183 DG |
1271 | Example: |
1272 | ||
1273 | ethernet@24000 { | |
1274 | #size-cells = <0>; | |
1275 | device_type = "network"; | |
1276 | model = "TSEC"; | |
1277 | compatible = "gianfar"; | |
1278 | reg = <24000 1000>; | |
f583165f | 1279 | mac-address = [ 00 E0 0C 00 73 00 ]; |
c125a183 DG |
1280 | interrupts = <d 3 e 3 12 3>; |
1281 | interrupt-parent = <40000>; | |
1282 | phy-handle = <2452000> | |
1283 | }; | |
1284 | ||
1285 | ||
1286 | ||
1287 | c) PHY nodes | |
1288 | ||
1289 | Required properties: | |
1290 | ||
1291 | - device_type : Should be "ethernet-phy" | |
1292 | - interrupts : <a b> where a is the interrupt number and b is a | |
1293 | field that represents an encoding of the sense and level | |
1294 | information for the interrupt. This should be encoded based on | |
1295 | the information in section 2) depending on the type of interrupt | |
1296 | controller you have. | |
1297 | - interrupt-parent : the phandle for the interrupt controller that | |
1298 | services interrupts for this device. | |
1299 | - reg : The ID number for the phy, usually a small integer | |
1300 | - linux,phandle : phandle for this node; likely referenced by an | |
1301 | ethernet controller node. | |
1302 | ||
1303 | ||
1304 | Example: | |
1305 | ||
1306 | ethernet-phy@0 { | |
1307 | linux,phandle = <2452000> | |
1308 | interrupt-parent = <40000>; | |
1309 | interrupts = <35 1>; | |
1310 | reg = <0>; | |
1311 | device_type = "ethernet-phy"; | |
1312 | }; | |
1313 | ||
1314 | ||
1315 | d) Interrupt controllers | |
1316 | ||
1317 | Some SOC devices contain interrupt controllers that are different | |
1318 | from the standard Open PIC specification. The SOC device nodes for | |
1319 | these types of controllers should be specified just like a standard | |
1320 | OpenPIC controller. Sense and level information should be encoded | |
1321 | as specified in section 2) of this chapter for each device that | |
1322 | specifies an interrupt. | |
1323 | ||
1324 | Example : | |
1325 | ||
1326 | pic@40000 { | |
1327 | linux,phandle = <40000>; | |
1328 | clock-frequency = <0>; | |
1329 | interrupt-controller; | |
1330 | #address-cells = <0>; | |
1331 | reg = <40000 40000>; | |
1332 | built-in; | |
1333 | compatible = "chrp,open-pic"; | |
1334 | device_type = "open-pic"; | |
1335 | big-endian; | |
1336 | }; | |
1337 | ||
1338 | ||
1339 | e) I2C | |
1340 | ||
1341 | Required properties : | |
1342 | ||
1343 | - device_type : Should be "i2c" | |
1344 | - reg : Offset and length of the register set for the device | |
1345 | ||
1346 | Recommended properties : | |
1347 | ||
1348 | - compatible : Should be "fsl-i2c" for parts compatible with | |
1349 | Freescale I2C specifications. | |
1350 | - interrupts : <a b> where a is the interrupt number and b is a | |
1351 | field that represents an encoding of the sense and level | |
1352 | information for the interrupt. This should be encoded based on | |
1353 | the information in section 2) depending on the type of interrupt | |
1354 | controller you have. | |
1355 | - interrupt-parent : the phandle for the interrupt controller that | |
1356 | services interrupts for this device. | |
1357 | - dfsrr : boolean; if defined, indicates that this I2C device has | |
1358 | a digital filter sampling rate register | |
1359 | - fsl5200-clocking : boolean; if defined, indicated that this device | |
1360 | uses the FSL 5200 clocking mechanism. | |
1361 | ||
1362 | Example : | |
1363 | ||
1364 | i2c@3000 { | |
1365 | interrupt-parent = <40000>; | |
1366 | interrupts = <1b 3>; | |
1367 | reg = <3000 18>; | |
1368 | device_type = "i2c"; | |
1369 | compatible = "fsl-i2c"; | |
1370 | dfsrr; | |
1371 | }; | |
1372 | ||
1373 | ||
ad71f123 BB |
1374 | f) Freescale SOC USB controllers |
1375 | ||
1376 | The device node for a USB controller that is part of a Freescale | |
1377 | SOC is as described in the document "Open Firmware Recommended | |
1378 | Practice : Universal Serial Bus" with the following modifications | |
1379 | and additions : | |
1380 | ||
1381 | Required properties : | |
5dd60166 DP |
1382 | - compatible : Should be "fsl-usb2-mph" for multi port host USB |
1383 | controllers, or "fsl-usb2-dr" for dual role USB controllers | |
1384 | - phy_type : For multi port host USB controllers, should be one of | |
1385 | "ulpi", or "serial". For dual role USB controllers, should be | |
ad71f123 BB |
1386 | one of "ulpi", "utmi", "utmi_wide", or "serial". |
1387 | - reg : Offset and length of the register set for the device | |
1388 | - port0 : boolean; if defined, indicates port0 is connected for | |
1389 | fsl-usb2-mph compatible controllers. Either this property or | |
1390 | "port1" (or both) must be defined for "fsl-usb2-mph" compatible | |
1391 | controllers. | |
1392 | - port1 : boolean; if defined, indicates port1 is connected for | |
1393 | fsl-usb2-mph compatible controllers. Either this property or | |
1394 | "port0" (or both) must be defined for "fsl-usb2-mph" compatible | |
1395 | controllers. | |
ea5b7a61 LY |
1396 | - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible |
1397 | controllers. Can be "host", "peripheral", or "otg". Default to | |
1398 | "host" if not defined for backward compatibility. | |
ad71f123 BB |
1399 | |
1400 | Recommended properties : | |
1401 | - interrupts : <a b> where a is the interrupt number and b is a | |
1402 | field that represents an encoding of the sense and level | |
1403 | information for the interrupt. This should be encoded based on | |
1404 | the information in section 2) depending on the type of interrupt | |
1405 | controller you have. | |
1406 | - interrupt-parent : the phandle for the interrupt controller that | |
1407 | services interrupts for this device. | |
1408 | ||
5dd60166 | 1409 | Example multi port host USB controller device node : |
ad71f123 BB |
1410 | usb@22000 { |
1411 | device_type = "usb"; | |
1412 | compatible = "fsl-usb2-mph"; | |
1413 | reg = <22000 1000>; | |
1414 | #address-cells = <1>; | |
1415 | #size-cells = <0>; | |
1416 | interrupt-parent = <700>; | |
1417 | interrupts = <27 1>; | |
1418 | phy_type = "ulpi"; | |
1419 | port0; | |
1420 | port1; | |
1421 | }; | |
1422 | ||
5dd60166 | 1423 | Example dual role USB controller device node : |
ad71f123 BB |
1424 | usb@23000 { |
1425 | device_type = "usb"; | |
1426 | compatible = "fsl-usb2-dr"; | |
1427 | reg = <23000 1000>; | |
1428 | #address-cells = <1>; | |
1429 | #size-cells = <0>; | |
1430 | interrupt-parent = <700>; | |
1431 | interrupts = <26 1>; | |
ea5b7a61 | 1432 | dr_mode = "otg"; |
ad71f123 BB |
1433 | phy = "ulpi"; |
1434 | }; | |
1435 | ||
1436 | ||
b88a0b1d KP |
1437 | g) Freescale SOC SEC Security Engines |
1438 | ||
1439 | Required properties: | |
1440 | ||
1441 | - device_type : Should be "crypto" | |
1442 | - model : Model of the device. Should be "SEC1" or "SEC2" | |
1443 | - compatible : Should be "talitos" | |
1444 | - reg : Offset and length of the register set for the device | |
1445 | - interrupts : <a b> where a is the interrupt number and b is a | |
1446 | field that represents an encoding of the sense and level | |
1447 | information for the interrupt. This should be encoded based on | |
1448 | the information in section 2) depending on the type of interrupt | |
1449 | controller you have. | |
1450 | - interrupt-parent : the phandle for the interrupt controller that | |
1451 | services interrupts for this device. | |
1452 | - num-channels : An integer representing the number of channels | |
1453 | available. | |
1454 | - channel-fifo-len : An integer representing the number of | |
1455 | descriptor pointers each channel fetch fifo can hold. | |
1456 | - exec-units-mask : The bitmask representing what execution units | |
5dd60166 | 1457 | (EUs) are available. It's a single 32-bit cell. EU information |
b88a0b1d KP |
1458 | should be encoded following the SEC's Descriptor Header Dword |
1459 | EU_SEL0 field documentation, i.e. as follows: | |
1460 | ||
1461 | bit 0 = reserved - should be 0 | |
1462 | bit 1 = set if SEC has the ARC4 EU (AFEU) | |
1463 | bit 2 = set if SEC has the DES/3DES EU (DEU) | |
1464 | bit 3 = set if SEC has the message digest EU (MDEU) | |
1465 | bit 4 = set if SEC has the random number generator EU (RNG) | |
1466 | bit 5 = set if SEC has the public key EU (PKEU) | |
1467 | bit 6 = set if SEC has the AES EU (AESU) | |
1468 | bit 7 = set if SEC has the Kasumi EU (KEU) | |
1469 | ||
1470 | bits 8 through 31 are reserved for future SEC EUs. | |
1471 | ||
1472 | - descriptor-types-mask : The bitmask representing what descriptors | |
5dd60166 | 1473 | are available. It's a single 32-bit cell. Descriptor type |
b88a0b1d KP |
1474 | information should be encoded following the SEC's Descriptor |
1475 | Header Dword DESC_TYPE field documentation, i.e. as follows: | |
1476 | ||
1477 | bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type | |
1478 | bit 1 = set if SEC supports the ipsec_esp descriptor type | |
1479 | bit 2 = set if SEC supports the common_nonsnoop desc. type | |
1480 | bit 3 = set if SEC supports the 802.11i AES ccmp desc. type | |
1481 | bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type | |
1482 | bit 5 = set if SEC supports the srtp descriptor type | |
1483 | bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type | |
1484 | bit 7 = set if SEC supports the pkeu_assemble descriptor type | |
1485 | bit 8 = set if SEC supports the aesu_key_expand_output desc.type | |
1486 | bit 9 = set if SEC supports the pkeu_ptmul descriptor type | |
1487 | bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type | |
1488 | bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type | |
1489 | ||
1490 | ..and so on and so forth. | |
1491 | ||
1492 | Example: | |
1493 | ||
1494 | /* MPC8548E */ | |
1495 | crypto@30000 { | |
1496 | device_type = "crypto"; | |
1497 | model = "SEC2"; | |
1498 | compatible = "talitos"; | |
1499 | reg = <30000 10000>; | |
1500 | interrupts = <1d 3>; | |
1501 | interrupt-parent = <40000>; | |
1502 | num-channels = <4>; | |
cbdb54d3 | 1503 | channel-fifo-len = <18>; |
b88a0b1d | 1504 | exec-units-mask = <000000fe>; |
cbdb54d3 | 1505 | descriptor-types-mask = <012b0ebf>; |
b88a0b1d KP |
1506 | }; |
1507 | ||
9a1ab883 LY |
1508 | h) Board Control and Status (BCSR) |
1509 | ||
1510 | Required properties: | |
1511 | ||
1512 | - device_type : Should be "board-control" | |
1513 | - reg : Offset and length of the register set for the device | |
1514 | ||
1515 | Example: | |
1516 | ||
1517 | bcsr@f8000000 { | |
1518 | device_type = "board-control"; | |
1519 | reg = <f8000000 8000>; | |
1520 | }; | |
1521 | ||
1522 | i) Freescale QUICC Engine module (QE) | |
1523 | This represents qe module that is installed on PowerQUICC II Pro. | |
e631ae3b SW |
1524 | |
1525 | NOTE: This is an interim binding; it should be updated to fit | |
1526 | in with the CPM binding later in this document. | |
1527 | ||
9a1ab883 LY |
1528 | Basically, it is a bus of devices, that could act more or less |
1529 | as a complete entity (UCC, USB etc ). All of them should be siblings on | |
1530 | the "root" qe node, using the common properties from there. | |
59c51591 | 1531 | The description below applies to the qe of MPC8360 and |
9a1ab883 LY |
1532 | more nodes and properties would be extended in the future. |
1533 | ||
1534 | i) Root QE device | |
1535 | ||
1536 | Required properties: | |
1537 | - device_type : should be "qe"; | |
1538 | - model : precise model of the QE, Can be "QE", "CPM", or "CPM2" | |
1539 | - reg : offset and length of the device registers. | |
1540 | - bus-frequency : the clock frequency for QUICC Engine. | |
1541 | ||
1542 | Recommended properties | |
1543 | - brg-frequency : the internal clock source frequency for baud-rate | |
1544 | generators in Hz. | |
1545 | ||
1546 | Example: | |
1547 | qe@e0100000 { | |
1548 | #address-cells = <1>; | |
1549 | #size-cells = <1>; | |
1550 | #interrupt-cells = <2>; | |
1551 | device_type = "qe"; | |
1552 | model = "QE"; | |
1553 | ranges = <0 e0100000 00100000>; | |
1554 | reg = <e0100000 480>; | |
1555 | brg-frequency = <0>; | |
1556 | bus-frequency = <179A7B00>; | |
1557 | } | |
1558 | ||
1559 | ||
1560 | ii) SPI (Serial Peripheral Interface) | |
1561 | ||
1562 | Required properties: | |
1563 | - device_type : should be "spi". | |
1564 | - compatible : should be "fsl_spi". | |
f023dc76 | 1565 | - mode : the SPI operation mode, it can be "cpu" or "cpu-qe". |
9a1ab883 LY |
1566 | - reg : Offset and length of the register set for the device |
1567 | - interrupts : <a b> where a is the interrupt number and b is a | |
1568 | field that represents an encoding of the sense and level | |
1569 | information for the interrupt. This should be encoded based on | |
1570 | the information in section 2) depending on the type of interrupt | |
1571 | controller you have. | |
1572 | - interrupt-parent : the phandle for the interrupt controller that | |
1573 | services interrupts for this device. | |
1574 | ||
1575 | Example: | |
1576 | spi@4c0 { | |
1577 | device_type = "spi"; | |
1578 | compatible = "fsl_spi"; | |
1579 | reg = <4c0 40>; | |
1580 | interrupts = <82 0>; | |
1581 | interrupt-parent = <700>; | |
1582 | mode = "cpu"; | |
1583 | }; | |
1584 | ||
1585 | ||
1586 | iii) USB (Universal Serial Bus Controller) | |
1587 | ||
1588 | Required properties: | |
1589 | - device_type : should be "usb". | |
1590 | - compatible : could be "qe_udc" or "fhci-hcd". | |
1591 | - mode : the could be "host" or "slave". | |
1592 | - reg : Offset and length of the register set for the device | |
1593 | - interrupts : <a b> where a is the interrupt number and b is a | |
1594 | field that represents an encoding of the sense and level | |
1595 | information for the interrupt. This should be encoded based on | |
1596 | the information in section 2) depending on the type of interrupt | |
1597 | controller you have. | |
1598 | - interrupt-parent : the phandle for the interrupt controller that | |
1599 | services interrupts for this device. | |
1600 | ||
1601 | Example(slave): | |
1602 | usb@6c0 { | |
1603 | device_type = "usb"; | |
1604 | compatible = "qe_udc"; | |
1605 | reg = <6c0 40>; | |
1606 | interrupts = <8b 0>; | |
1607 | interrupt-parent = <700>; | |
1608 | mode = "slave"; | |
1609 | }; | |
1610 | ||
1611 | ||
1612 | iv) UCC (Unified Communications Controllers) | |
1613 | ||
1614 | Required properties: | |
1615 | - device_type : should be "network", "hldc", "uart", "transparent" | |
1616 | "bisync" or "atm". | |
1617 | - compatible : could be "ucc_geth" or "fsl_atm" and so on. | |
1618 | - model : should be "UCC". | |
1619 | - device-id : the ucc number(1-8), corresponding to UCCx in UM. | |
1620 | - reg : Offset and length of the register set for the device | |
1621 | - interrupts : <a b> where a is the interrupt number and b is a | |
1622 | field that represents an encoding of the sense and level | |
1623 | information for the interrupt. This should be encoded based on | |
1624 | the information in section 2) depending on the type of interrupt | |
1625 | controller you have. | |
1626 | - interrupt-parent : the phandle for the interrupt controller that | |
1627 | services interrupts for this device. | |
1628 | - pio-handle : The phandle for the Parallel I/O port configuration. | |
1629 | - rx-clock : represents the UCC receive clock source. | |
1630 | 0x00 : clock source is disabled; | |
1631 | 0x1~0x10 : clock source is BRG1~BRG16 respectively; | |
1632 | 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. | |
1633 | - tx-clock: represents the UCC transmit clock source; | |
1634 | 0x00 : clock source is disabled; | |
1635 | 0x1~0x10 : clock source is BRG1~BRG16 respectively; | |
1636 | 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively. | |
1637 | ||
1638 | Required properties for network device_type: | |
1639 | - mac-address : list of bytes representing the ethernet address. | |
1640 | - phy-handle : The phandle for the PHY connected to this controller. | |
1641 | ||
e0a2f28b SW |
1642 | Recommended properties: |
1643 | - linux,network-index : This is the intended "index" of this | |
1644 | network device. This is used by the bootwrapper to interpret | |
1645 | MAC addresses passed by the firmware when no information other | |
1646 | than indices is available to associate an address with a device. | |
60c1922c | 1647 | - phy-connection-type : a string naming the controller/PHY interface type, |
34be4561 KP |
1648 | i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal |
1649 | Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only), | |
1650 | "tbi", or "rtbi". | |
e0a2f28b | 1651 | |
9a1ab883 LY |
1652 | Example: |
1653 | ucc@2000 { | |
1654 | device_type = "network"; | |
1655 | compatible = "ucc_geth"; | |
1656 | model = "UCC"; | |
1657 | device-id = <1>; | |
1658 | reg = <2000 200>; | |
1659 | interrupts = <a0 0>; | |
1660 | interrupt-parent = <700>; | |
1661 | mac-address = [ 00 04 9f 00 23 23 ]; | |
1662 | rx-clock = "none"; | |
1663 | tx-clock = "clk9"; | |
1664 | phy-handle = <212000>; | |
60c1922c | 1665 | phy-connection-type = "gmii"; |
9a1ab883 LY |
1666 | pio-handle = <140001>; |
1667 | }; | |
1668 | ||
1669 | ||
1670 | v) Parallel I/O Ports | |
1671 | ||
1672 | This node configures Parallel I/O ports for CPUs with QE support. | |
1673 | The node should reside in the "soc" node of the tree. For each | |
1674 | device that using parallel I/O ports, a child node should be created. | |
1675 | See the definition of the Pin configuration nodes below for more | |
1676 | information. | |
1677 | ||
1678 | Required properties: | |
1679 | - device_type : should be "par_io". | |
1680 | - reg : offset to the register set and its length. | |
1681 | - num-ports : number of Parallel I/O ports | |
1682 | ||
1683 | Example: | |
1684 | par_io@1400 { | |
1685 | reg = <1400 100>; | |
1686 | #address-cells = <1>; | |
1687 | #size-cells = <0>; | |
1688 | device_type = "par_io"; | |
1689 | num-ports = <7>; | |
1690 | ucc_pin@01 { | |
1691 | ...... | |
1692 | }; | |
1693 | ||
1694 | ||
1695 | vi) Pin configuration nodes | |
1696 | ||
1697 | Required properties: | |
1698 | - linux,phandle : phandle of this node; likely referenced by a QE | |
1699 | device. | |
1700 | - pio-map : array of pin configurations. Each pin is defined by 6 | |
1701 | integers. The six numbers are respectively: port, pin, dir, | |
1702 | open_drain, assignment, has_irq. | |
1703 | - port : port number of the pin; 0-6 represent port A-G in UM. | |
1704 | - pin : pin number in the port. | |
1705 | - dir : direction of the pin, should encode as follows: | |
1706 | ||
1707 | 0 = The pin is disabled | |
1708 | 1 = The pin is an output | |
1709 | 2 = The pin is an input | |
1710 | 3 = The pin is I/O | |
1711 | ||
1712 | - open_drain : indicates the pin is normal or wired-OR: | |
1713 | ||
1714 | 0 = The pin is actively driven as an output | |
1715 | 1 = The pin is an open-drain driver. As an output, the pin is | |
1716 | driven active-low, otherwise it is three-stated. | |
1717 | ||
1718 | - assignment : function number of the pin according to the Pin Assignment | |
1719 | tables in User Manual. Each pin can have up to 4 possible functions in | |
1720 | QE and two options for CPM. | |
a982ac06 | 1721 | - has_irq : indicates if the pin is used as source of external |
9a1ab883 LY |
1722 | interrupts. |
1723 | ||
1724 | Example: | |
1725 | ucc_pin@01 { | |
1726 | linux,phandle = <140001>; | |
1727 | pio-map = < | |
1728 | /* port pin dir open_drain assignment has_irq */ | |
1729 | 0 3 1 0 1 0 /* TxD0 */ | |
1730 | 0 4 1 0 1 0 /* TxD1 */ | |
1731 | 0 5 1 0 1 0 /* TxD2 */ | |
1732 | 0 6 1 0 1 0 /* TxD3 */ | |
1733 | 1 6 1 0 3 0 /* TxD4 */ | |
1734 | 1 7 1 0 1 0 /* TxD5 */ | |
1735 | 1 9 1 0 2 0 /* TxD6 */ | |
1736 | 1 a 1 0 2 0 /* TxD7 */ | |
1737 | 0 9 2 0 1 0 /* RxD0 */ | |
1738 | 0 a 2 0 1 0 /* RxD1 */ | |
1739 | 0 b 2 0 1 0 /* RxD2 */ | |
1740 | 0 c 2 0 1 0 /* RxD3 */ | |
1741 | 0 d 2 0 1 0 /* RxD4 */ | |
1742 | 1 1 2 0 2 0 /* RxD5 */ | |
1743 | 1 0 2 0 2 0 /* RxD6 */ | |
1744 | 1 4 2 0 2 0 /* RxD7 */ | |
1745 | 0 7 1 0 1 0 /* TX_EN */ | |
1746 | 0 8 1 0 1 0 /* TX_ER */ | |
1747 | 0 f 2 0 1 0 /* RX_DV */ | |
1748 | 0 10 2 0 1 0 /* RX_ER */ | |
1749 | 0 0 2 0 1 0 /* RX_CLK */ | |
1750 | 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ | |
1751 | 2 8 2 0 1 0>; /* GTX125 - CLK9 */ | |
1752 | }; | |
1753 | ||
1754 | vii) Multi-User RAM (MURAM) | |
1755 | ||
1756 | Required properties: | |
1757 | - device_type : should be "muram". | |
1758 | - mode : the could be "host" or "slave". | |
1759 | - ranges : Should be defined as specified in 1) to describe the | |
1760 | translation of MURAM addresses. | |
1761 | - data-only : sub-node which defines the address area under MURAM | |
1762 | bus that can be allocated as data/parameter | |
1763 | ||
1764 | Example: | |
1765 | ||
1766 | muram@10000 { | |
1767 | device_type = "muram"; | |
1768 | ranges = <0 00010000 0000c000>; | |
1769 | ||
1770 | data-only@0{ | |
1771 | reg = <0 c000>; | |
1772 | }; | |
1773 | }; | |
b88a0b1d | 1774 | |
2099172d | 1775 | j) CFI or JEDEC memory-mapped NOR flash |
28f9ec34 VW |
1776 | |
1777 | Flash chips (Memory Technology Devices) are often used for solid state | |
1778 | file systems on embedded devices. | |
1779 | ||
2099172d DG |
1780 | - compatible : should contain the specific model of flash chip(s) |
1781 | used, if known, followed by either "cfi-flash" or "jedec-flash" | |
1782 | - reg : Address range of the flash chip | |
1783 | - bank-width : Width (in bytes) of the flash bank. Equal to the | |
1784 | device width times the number of interleaved chips. | |
1785 | - device-width : (optional) Width of a single flash chip. If | |
1786 | omitted, assumed to be equal to 'bank-width'. | |
1787 | - #address-cells, #size-cells : Must be present if the flash has | |
1788 | sub-nodes representing partitions (see below). In this case | |
1789 | both #address-cells and #size-cells must be equal to 1. | |
1790 | ||
1791 | For JEDEC compatible devices, the following additional properties | |
1792 | are defined: | |
1793 | ||
1794 | - vendor-id : Contains the flash chip's vendor id (1 byte). | |
1795 | - device-id : Contains the flash chip's device id (1 byte). | |
1796 | ||
1797 | In addition to the information on the flash bank itself, the | |
1798 | device tree may optionally contain additional information | |
1799 | describing partitions of the flash address space. This can be | |
1800 | used on platforms which have strong conventions about which | |
1801 | portions of the flash are used for what purposes, but which don't | |
1802 | use an on-flash partition table such as RedBoot. | |
1803 | ||
1804 | Each partition is represented as a sub-node of the flash device. | |
1805 | Each node's name represents the name of the corresponding | |
1806 | partition of the flash device. | |
1807 | ||
1808 | Flash partitions | |
1809 | - reg : The partition's offset and size within the flash bank. | |
1810 | - label : (optional) The label / name for this flash partition. | |
1811 | If omitted, the label is taken from the node name (excluding | |
1812 | the unit address). | |
1813 | - read-only : (optional) This parameter, if present, is a hint to | |
1814 | Linux that this flash partition should only be mounted | |
1815 | read-only. This is usually used for flash partitions | |
1816 | containing early-boot firmware images or data which should not | |
1817 | be clobbered. | |
28f9ec34 | 1818 | |
2099172d | 1819 | Example: |
28f9ec34 | 1820 | |
2099172d DG |
1821 | flash@ff000000 { |
1822 | compatible = "amd,am29lv128ml", "cfi-flash"; | |
1823 | reg = <ff000000 01000000>; | |
1824 | bank-width = <4>; | |
1825 | device-width = <1>; | |
1826 | #address-cells = <1>; | |
1827 | #size-cells = <1>; | |
1828 | fs@0 { | |
1829 | label = "fs"; | |
1830 | reg = <0 f80000>; | |
1831 | }; | |
1832 | firmware@f80000 { | |
1833 | label ="firmware"; | |
1834 | reg = <f80000 80000>; | |
1835 | read-only; | |
1836 | }; | |
1837 | }; | |
28f9ec34 | 1838 | |
3b824f85 RZ |
1839 | k) Global Utilities Block |
1840 | ||
1841 | The global utilities block controls power management, I/O device | |
1842 | enabling, power-on-reset configuration monitoring, general-purpose | |
1843 | I/O signal configuration, alternate function selection for multiplexed | |
1844 | signals, and clock control. | |
1845 | ||
1846 | Required properties: | |
1847 | ||
1848 | - compatible : Should define the compatible device type for | |
1849 | global-utilities. | |
1850 | - reg : Offset and length of the register set for the device. | |
1851 | ||
1852 | Recommended properties: | |
1853 | ||
1854 | - fsl,has-rstcr : Indicates that the global utilities register set | |
1855 | contains a functioning "reset control register" (i.e. the board | |
1856 | is wired to reset upon setting the HRESET_REQ bit in this register). | |
1857 | ||
1858 | Example: | |
1859 | ||
1860 | global-utilities@e0000 { /* global utilities block */ | |
1861 | compatible = "fsl,mpc8548-guts"; | |
1862 | reg = <e0000 1000>; | |
1863 | fsl,has-rstcr; | |
1864 | }; | |
1865 | ||
e631ae3b SW |
1866 | l) Freescale Communications Processor Module |
1867 | ||
1868 | NOTE: This is an interim binding, and will likely change slightly, | |
1869 | as more devices are supported. The QE bindings especially are | |
1870 | incomplete. | |
1871 | ||
1872 | i) Root CPM node | |
1873 | ||
1874 | Properties: | |
1875 | - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe". | |
15f8c604 | 1876 | - reg : A 48-byte region beginning with CPCR. |
e631ae3b SW |
1877 | |
1878 | Example: | |
1879 | cpm@119c0 { | |
1880 | #address-cells = <1>; | |
1881 | #size-cells = <1>; | |
1882 | #interrupt-cells = <2>; | |
1883 | compatible = "fsl,mpc8272-cpm", "fsl,cpm2"; | |
15f8c604 | 1884 | reg = <119c0 30>; |
e631ae3b SW |
1885 | } |
1886 | ||
1887 | ii) Properties common to mulitple CPM/QE devices | |
1888 | ||
1889 | - fsl,cpm-command : This value is ORed with the opcode and command flag | |
1890 | to specify the device on which a CPM command operates. | |
1891 | ||
1892 | - fsl,cpm-brg : Indicates which baud rate generator the device | |
1893 | is associated with. If absent, an unused BRG | |
1894 | should be dynamically allocated. If zero, the | |
1895 | device uses an external clock rather than a BRG. | |
1896 | ||
1897 | - reg : Unless otherwise specified, the first resource represents the | |
1898 | scc/fcc/ucc registers, and the second represents the device's | |
1899 | parameter RAM region (if it has one). | |
1900 | ||
1901 | iii) Serial | |
1902 | ||
1903 | Currently defined compatibles: | |
1904 | - fsl,cpm1-smc-uart | |
1905 | - fsl,cpm2-smc-uart | |
1906 | - fsl,cpm1-scc-uart | |
1907 | - fsl,cpm2-scc-uart | |
1908 | - fsl,qe-uart | |
1909 | ||
1910 | Example: | |
1911 | ||
1912 | serial@11a00 { | |
1913 | device_type = "serial"; | |
1914 | compatible = "fsl,mpc8272-scc-uart", | |
1915 | "fsl,cpm2-scc-uart"; | |
1916 | reg = <11a00 20 8000 100>; | |
1917 | interrupts = <28 8>; | |
1918 | interrupt-parent = <&PIC>; | |
1919 | fsl,cpm-brg = <1>; | |
1920 | fsl,cpm-command = <00800000>; | |
1921 | }; | |
1922 | ||
1923 | iii) Network | |
1924 | ||
1925 | Currently defined compatibles: | |
1926 | - fsl,cpm1-scc-enet | |
1927 | - fsl,cpm2-scc-enet | |
1928 | - fsl,cpm1-fec-enet | |
1929 | - fsl,cpm2-fcc-enet (third resource is GFEMR) | |
1930 | - fsl,qe-enet | |
1931 | ||
1932 | Example: | |
1933 | ||
1934 | ethernet@11300 { | |
1935 | device_type = "network"; | |
1936 | compatible = "fsl,mpc8272-fcc-enet", | |
1937 | "fsl,cpm2-fcc-enet"; | |
1938 | reg = <11300 20 8400 100 11390 1>; | |
1939 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
1940 | interrupts = <20 8>; | |
1941 | interrupt-parent = <&PIC>; | |
1942 | phy-handle = <&PHY0>; | |
1943 | linux,network-index = <0>; | |
1944 | fsl,cpm-command = <12000300>; | |
1945 | }; | |
1946 | ||
1947 | iv) MDIO | |
1948 | ||
1949 | Currently defined compatibles: | |
1950 | fsl,pq1-fec-mdio (reg is same as first resource of FEC device) | |
1951 | fsl,cpm2-mdio-bitbang (reg is port C registers) | |
1952 | ||
1953 | Properties for fsl,cpm2-mdio-bitbang: | |
1954 | fsl,mdio-pin : pin of port C controlling mdio data | |
1955 | fsl,mdc-pin : pin of port C controlling mdio clock | |
1956 | ||
1957 | Example: | |
1958 | ||
1959 | mdio@10d40 { | |
1960 | device_type = "mdio"; | |
1961 | compatible = "fsl,mpc8272ads-mdio-bitbang", | |
1962 | "fsl,mpc8272-mdio-bitbang", | |
1963 | "fsl,cpm2-mdio-bitbang"; | |
1964 | reg = <10d40 14>; | |
1965 | #address-cells = <1>; | |
1966 | #size-cells = <0>; | |
1967 | fsl,mdio-pin = <12>; | |
1968 | fsl,mdc-pin = <13>; | |
1969 | }; | |
1970 | ||
1971 | v) Baud Rate Generators | |
1972 | ||
1973 | Currently defined compatibles: | |
1974 | fsl,cpm-brg | |
1975 | fsl,cpm1-brg | |
1976 | fsl,cpm2-brg | |
1977 | ||
1978 | Properties: | |
1979 | - reg : There may be an arbitrary number of reg resources; BRG | |
1980 | numbers are assigned to these in order. | |
1981 | - clock-frequency : Specifies the base frequency driving | |
1982 | the BRG. | |
1983 | ||
1984 | Example: | |
1985 | ||
1986 | brg@119f0 { | |
1987 | compatible = "fsl,mpc8272-brg", | |
1988 | "fsl,cpm2-brg", | |
1989 | "fsl,cpm-brg"; | |
1990 | reg = <119f0 10 115f0 10>; | |
1991 | clock-frequency = <d#25000000>; | |
1992 | }; | |
1993 | ||
1994 | vi) Interrupt Controllers | |
1995 | ||
1996 | Currently defined compatibles: | |
1997 | - fsl,cpm1-pic | |
1998 | - only one interrupt cell | |
1999 | - fsl,pq1-pic | |
2000 | - fsl,cpm2-pic | |
2001 | - second interrupt cell is level/sense: | |
2002 | - 2 is falling edge | |
2003 | - 8 is active low | |
2004 | ||
2005 | Example: | |
2006 | ||
2007 | interrupt-controller@10c00 { | |
2008 | #interrupt-cells = <2>; | |
2009 | interrupt-controller; | |
2010 | reg = <10c00 80>; | |
2011 | compatible = "mpc8272-pic", "fsl,cpm2-pic"; | |
2012 | }; | |
2013 | ||
2014 | vii) USB (Universal Serial Bus Controller) | |
2015 | ||
2016 | Properties: | |
2017 | - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb" | |
2018 | ||
2019 | Example: | |
2020 | usb@11bc0 { | |
2021 | #address-cells = <1>; | |
2022 | #size-cells = <0>; | |
2023 | compatible = "fsl,cpm2-usb"; | |
2024 | reg = <11b60 18 8b00 100>; | |
2025 | interrupts = <b 8>; | |
2026 | interrupt-parent = <&PIC>; | |
2027 | fsl,cpm-command = <2e600000>; | |
2028 | }; | |
2029 | ||
15f8c604 SW |
2030 | viii) Multi-User RAM (MURAM) |
2031 | ||
2032 | The multi-user/dual-ported RAM is expressed as a bus under the CPM node. | |
2033 | ||
2034 | Ranges must be set up subject to the following restrictions: | |
2035 | ||
2036 | - Children's reg nodes must be offsets from the start of all muram, even | |
2037 | if the user-data area does not begin at zero. | |
2038 | - If multiple range entries are used, the difference between the parent | |
2039 | address and the child address must be the same in all, so that a single | |
2040 | mapping can cover them all while maintaining the ability to determine | |
2041 | CPM-side offsets with pointer subtraction. It is recommended that | |
2042 | multiple range entries not be used. | |
2043 | - A child address of zero must be translatable, even if no reg resources | |
2044 | contain it. | |
2045 | ||
2046 | A child "data" node must exist, compatible with "fsl,cpm-muram-data", to | |
2047 | indicate the portion of muram that is usable by the OS for arbitrary | |
2048 | purposes. The data node may have an arbitrary number of reg resources, | |
2049 | all of which contribute to the allocatable muram pool. | |
2050 | ||
2051 | Example, based on mpc8272: | |
2052 | ||
2053 | muram@0 { | |
2054 | #address-cells = <1>; | |
2055 | #size-cells = <1>; | |
2056 | ranges = <0 0 10000>; | |
2057 | ||
2058 | data@0 { | |
2059 | compatible = "fsl,cpm-muram-data"; | |
2060 | reg = <0 2000 9800 800>; | |
2061 | }; | |
2062 | }; | |
2063 | ||
96fca1de SW |
2064 | m) Chipselect/Local Bus |
2065 | ||
2066 | Properties: | |
2067 | - name : Should be localbus | |
2068 | - #address-cells : Should be either two or three. The first cell is the | |
2069 | chipselect number, and the remaining cells are the | |
2070 | offset into the chipselect. | |
2071 | - #size-cells : Either one or two, depending on how large each chipselect | |
2072 | can be. | |
2073 | - ranges : Each range corresponds to a single chipselect, and cover | |
2074 | the entire access window as configured. | |
2075 | ||
2076 | Example: | |
2077 | localbus@f0010100 { | |
2078 | compatible = "fsl,mpc8272ads-localbus", | |
2079 | "fsl,mpc8272-localbus", | |
2080 | "fsl,pq2-localbus"; | |
2081 | #address-cells = <2>; | |
2082 | #size-cells = <1>; | |
2083 | reg = <f0010100 40>; | |
2084 | ||
2085 | ranges = <0 0 fe000000 02000000 | |
2086 | 1 0 f4500000 00008000>; | |
2087 | ||
2088 | flash@0,0 { | |
2089 | compatible = "jedec-flash"; | |
2090 | reg = <0 0 2000000>; | |
2091 | bank-width = <4>; | |
2092 | device-width = <1>; | |
2093 | }; | |
2094 | ||
2095 | board-control@1,0 { | |
2096 | reg = <1 0 20>; | |
2097 | compatible = "fsl,mpc8272ads-bcsr"; | |
2098 | }; | |
2099 | }; | |
2100 | ||
1d3bb996 | 2101 | |
e8690861 | 2102 | n) 4xx/Axon EMAC ethernet nodes |
1d3bb996 DG |
2103 | |
2104 | The EMAC ethernet controller in IBM and AMCC 4xx chips, and also | |
2105 | the Axon bridge. To operate this needs to interact with a ths | |
2106 | special McMAL DMA controller, and sometimes an RGMII or ZMII | |
2107 | interface. In addition to the nodes and properties described | |
2108 | below, the node for the OPB bus on which the EMAC sits must have a | |
2109 | correct clock-frequency property. | |
2110 | ||
2111 | i) The EMAC node itself | |
2112 | ||
2113 | Required properties: | |
2114 | - device_type : "network" | |
2115 | ||
2116 | - compatible : compatible list, contains 2 entries, first is | |
2117 | "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, | |
2118 | 405gp, Axon) and second is either "ibm,emac" or | |
2119 | "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", | |
2120 | "ibm,emac4" | |
2121 | - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> | |
2122 | - interrupt-parent : optional, if needed for interrupt mapping | |
2123 | - reg : <registers mapping> | |
2124 | - local-mac-address : 6 bytes, MAC address | |
2125 | - mal-device : phandle of the associated McMAL node | |
2126 | - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated | |
2127 | with this EMAC | |
2128 | - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated | |
2129 | with this EMAC | |
2130 | - cell-index : 1 cell, hardware index of the EMAC cell on a given | |
2131 | ASIC (typically 0x0 and 0x1 for EMAC0 and EMAC1 on | |
2132 | each Axon chip) | |
2133 | - max-frame-size : 1 cell, maximum frame size supported in bytes | |
2134 | - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec | |
2135 | operations. | |
2136 | For Axon, 2048 | |
2137 | - tx-fifo-size : 1 cell, Tx fifo size in bytes for 10 and 100 Mb/sec | |
2138 | operations. | |
2139 | For Axon, 2048. | |
2140 | - fifo-entry-size : 1 cell, size of a fifo entry (used to calculate | |
2141 | thresholds). | |
2142 | For Axon, 0x00000010 | |
2143 | - mal-burst-size : 1 cell, MAL burst size (used to calculate thresholds) | |
2144 | in bytes. | |
2145 | For Axon, 0x00000100 (I think ...) | |
2146 | - phy-mode : string, mode of operations of the PHY interface. | |
2147 | Supported values are: "mii", "rmii", "smii", "rgmii", | |
2148 | "tbi", "gmii", rtbi", "sgmii". | |
2149 | For Axon on CAB, it is "rgmii" | |
2150 | - mdio-device : 1 cell, required iff using shared MDIO registers | |
2151 | (440EP). phandle of the EMAC to use to drive the | |
2152 | MDIO lines for the PHY used by this EMAC. | |
2153 | - zmii-device : 1 cell, required iff connected to a ZMII. phandle of | |
2154 | the ZMII device node | |
2155 | - zmii-channel : 1 cell, required iff connected to a ZMII. Which ZMII | |
2156 | channel or 0xffffffff if ZMII is only used for MDIO. | |
2157 | - rgmii-device : 1 cell, required iff connected to an RGMII. phandle | |
2158 | of the RGMII device node. | |
2159 | For Axon: phandle of plb5/plb4/opb/rgmii | |
2160 | - rgmii-channel : 1 cell, required iff connected to an RGMII. Which | |
2161 | RGMII channel is used by this EMAC. | |
2162 | Fox Axon: present, whatever value is appropriate for each | |
2163 | EMAC, that is the content of the current (bogus) "phy-port" | |
2164 | property. | |
2165 | ||
2166 | Recommended properties: | |
2167 | - linux,network-index : This is the intended "index" of this | |
2168 | network device. This is used by the bootwrapper to interpret | |
2169 | MAC addresses passed by the firmware when no information other | |
2170 | than indices is available to associate an address with a device. | |
2171 | ||
2172 | Optional properties: | |
2173 | - phy-address : 1 cell, optional, MDIO address of the PHY. If absent, | |
2174 | a search is performed. | |
2175 | - phy-map : 1 cell, optional, bitmap of addresses to probe the PHY | |
2176 | for, used if phy-address is absent. bit 0x00000001 is | |
2177 | MDIO address 0. | |
2178 | For Axon it can be absent, thouugh my current driver | |
2179 | doesn't handle phy-address yet so for now, keep | |
2180 | 0x00ffffff in it. | |
2181 | - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec | |
2182 | operations (if absent the value is the same as | |
2183 | rx-fifo-size). For Axon, either absent or 2048. | |
2184 | - tx-fifo-size-gige : 1 cell, Tx fifo size in bytes for 1000 Mb/sec | |
2185 | operations (if absent the value is the same as | |
2186 | tx-fifo-size). For Axon, either absent or 2048. | |
2187 | - tah-device : 1 cell, optional. If connected to a TAH engine for | |
2188 | offload, phandle of the TAH device node. | |
2189 | - tah-channel : 1 cell, optional. If appropriate, channel used on the | |
2190 | TAH engine. | |
2191 | ||
2192 | Example: | |
2193 | ||
2194 | EMAC0: ethernet@40000800 { | |
2195 | linux,network-index = <0>; | |
2196 | device_type = "network"; | |
2197 | compatible = "ibm,emac-440gp", "ibm,emac"; | |
2198 | interrupt-parent = <&UIC1>; | |
2199 | interrupts = <1c 4 1d 4>; | |
2200 | reg = <40000800 70>; | |
2201 | local-mac-address = [00 04 AC E3 1B 1E]; | |
2202 | mal-device = <&MAL0>; | |
2203 | mal-tx-channel = <0 1>; | |
2204 | mal-rx-channel = <0>; | |
2205 | cell-index = <0>; | |
2206 | max-frame-size = <5dc>; | |
2207 | rx-fifo-size = <1000>; | |
2208 | tx-fifo-size = <800>; | |
2209 | phy-mode = "rmii"; | |
2210 | phy-map = <00000001>; | |
2211 | zmii-device = <&ZMII0>; | |
2212 | zmii-channel = <0>; | |
2213 | }; | |
2214 | ||
2215 | ii) McMAL node | |
2216 | ||
2217 | Required properties: | |
2218 | - device_type : "dma-controller" | |
2219 | - compatible : compatible list, containing 2 entries, first is | |
2220 | "ibm,mcmal-CHIP" where CHIP is the host ASIC (like | |
2221 | emac) and the second is either "ibm,mcmal" or | |
2222 | "ibm,mcmal2". | |
2223 | For Axon, "ibm,mcmal-axon","ibm,mcmal2" | |
2224 | - interrupts : <interrupt mapping for the MAL interrupts sources: | |
2225 | 5 sources: tx_eob, rx_eob, serr, txde, rxde>. | |
2226 | For Axon: This is _different_ from the current | |
2227 | firmware. We use the "delayed" interrupts for txeob | |
2228 | and rxeob. Thus we end up with mapping those 5 MPIC | |
2229 | interrupts, all level positive sensitive: 10, 11, 32, | |
2230 | 33, 34 (in decimal) | |
2231 | - dcr-reg : < DCR registers range > | |
2232 | - dcr-parent : if needed for dcr-reg | |
2233 | - num-tx-chans : 1 cell, number of Tx channels | |
2234 | - num-rx-chans : 1 cell, number of Rx channels | |
2235 | ||
2236 | iii) ZMII node | |
2237 | ||
2238 | Required properties: | |
2239 | - compatible : compatible list, containing 2 entries, first is | |
2240 | "ibm,zmii-CHIP" where CHIP is the host ASIC (like | |
2241 | EMAC) and the second is "ibm,zmii". | |
2242 | For Axon, there is no ZMII node. | |
2243 | - reg : <registers mapping> | |
2244 | ||
2245 | iv) RGMII node | |
2246 | ||
2247 | Required properties: | |
2248 | - compatible : compatible list, containing 2 entries, first is | |
2249 | "ibm,rgmii-CHIP" where CHIP is the host ASIC (like | |
2250 | EMAC) and the second is "ibm,rgmii". | |
2251 | For Axon, "ibm,rgmii-axon","ibm,rgmii" | |
2252 | - reg : <registers mapping> | |
2253 | - revision : as provided by the RGMII new version register if | |
2254 | available. | |
2255 | For Axon: 0x0000012a | |
2256 | ||
7ae0fa49 GL |
2257 | l) Xilinx IP cores |
2258 | ||
2259 | The Xilinx EDK toolchain ships with a set of IP cores (devices) for use | |
2260 | in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range | |
2261 | of standard device types (network, serial, etc.) and miscellanious | |
2262 | devices (gpio, LCD, spi, etc). Also, since these devices are | |
2263 | implemented within the fpga fabric every instance of the device can be | |
2264 | synthesised with different options that change the behaviour. | |
2265 | ||
2266 | Each IP-core has a set of parameters which the FPGA designer can use to | |
2267 | control how the core is synthesized. Historically, the EDK tool would | |
2268 | extract the device parameters relevant to device drivers and copy them | |
2269 | into an 'xparameters.h' in the form of #define symbols. This tells the | |
2270 | device drivers how the IP cores are configured, but it requres the kernel | |
2271 | to be recompiled every time the FPGA bitstream is resynthesized. | |
2272 | ||
2273 | The new approach is to export the parameters into the device tree and | |
2274 | generate a new device tree each time the FPGA bitstream changes. The | |
2275 | parameters which used to be exported as #defines will now become | |
2276 | properties of the device node. In general, device nodes for IP-cores | |
2277 | will take the following form: | |
2278 | ||
2279 | (name)@(base-address) { | |
2280 | compatible = "xlnx,(ip-core-name)-(HW_VER)" | |
2281 | [, (list of compatible devices), ...]; | |
2282 | reg = <(baseaddr) (size)>; | |
2283 | interrupt-parent = <&interrupt-controller-phandle>; | |
2284 | interrupts = < ... >; | |
2285 | xlnx,(parameter1) = "(string-value)"; | |
2286 | xlnx,(parameter2) = <(int-value)>; | |
2287 | }; | |
2288 | ||
2289 | (ip-core-name): the name of the ip block (given after the BEGIN | |
2290 | directive in system.mhs). Should be in lowercase | |
2291 | and all underscores '_' converted to dashes '-'. | |
2292 | (name): is derived from the "PARAMETER INSTANCE" value. | |
2293 | (parameter#): C_* parameters from system.mhs. The C_ prefix is | |
2294 | dropped from the parameter name, the name is converted | |
2295 | to lowercase and all underscore '_' characters are | |
2296 | converted to dashes '-'. | |
2297 | (baseaddr): the C_BASEADDR parameter. | |
2298 | (HW_VER): from the HW_VER parameter. | |
2299 | (size): equals C_HIGHADDR - C_BASEADDR + 1 | |
2300 | ||
2301 | Typically, the compatible list will include the exact IP core version | |
2302 | followed by an older IP core version which implements the same | |
2303 | interface or any other device with the same interface. | |
2304 | ||
2305 | 'reg', 'interrupt-parent' and 'interrupts' are all optional properties. | |
2306 | ||
2307 | For example, the following block from system.mhs: | |
2308 | ||
2309 | BEGIN opb_uartlite | |
2310 | PARAMETER INSTANCE = opb_uartlite_0 | |
2311 | PARAMETER HW_VER = 1.00.b | |
2312 | PARAMETER C_BAUDRATE = 115200 | |
2313 | PARAMETER C_DATA_BITS = 8 | |
2314 | PARAMETER C_ODD_PARITY = 0 | |
2315 | PARAMETER C_USE_PARITY = 0 | |
2316 | PARAMETER C_CLK_FREQ = 50000000 | |
2317 | PARAMETER C_BASEADDR = 0xEC100000 | |
2318 | PARAMETER C_HIGHADDR = 0xEC10FFFF | |
2319 | BUS_INTERFACE SOPB = opb_7 | |
2320 | PORT OPB_Clk = CLK_50MHz | |
2321 | PORT Interrupt = opb_uartlite_0_Interrupt | |
2322 | PORT RX = opb_uartlite_0_RX | |
2323 | PORT TX = opb_uartlite_0_TX | |
2324 | PORT OPB_Rst = sys_bus_reset_0 | |
2325 | END | |
2326 | ||
2327 | becomes the following device tree node: | |
2328 | ||
2329 | opb-uartlite-0@ec100000 { | |
2330 | device_type = "serial"; | |
2331 | compatible = "xlnx,opb-uartlite-1.00.b"; | |
2332 | reg = <ec100000 10000>; | |
2333 | interrupt-parent = <&opb-intc>; | |
2334 | interrupts = <1 0>; // got this from the opb_intc parameters | |
2335 | current-speed = <d#115200>; // standard serial device prop | |
2336 | clock-frequency = <d#50000000>; // standard serial device prop | |
2337 | xlnx,data-bits = <8>; | |
2338 | xlnx,odd-parity = <0>; | |
2339 | xlnx,use-parity = <0>; | |
2340 | }; | |
2341 | ||
2342 | Some IP cores actually implement 2 or more logical devices. In this case, | |
2343 | the device should still describe the whole IP core with a single node | |
2344 | and add a child node for each logical device. The ranges property can | |
2345 | be used to translate from parent IP-core to the registers of each device. | |
2346 | (Note: this makes the assumption that both logical devices have the same | |
2347 | bus binding. If this is not true, then separate nodes should be used for | |
2348 | each logical device). The 'cell-index' property can be used to enumerate | |
2349 | logical devices within an IP core. For example, the following is the | |
2350 | system.mhs entry for the dual ps2 controller found on the ml403 reference | |
2351 | design. | |
2352 | ||
2353 | BEGIN opb_ps2_dual_ref | |
2354 | PARAMETER INSTANCE = opb_ps2_dual_ref_0 | |
2355 | PARAMETER HW_VER = 1.00.a | |
2356 | PARAMETER C_BASEADDR = 0xA9000000 | |
2357 | PARAMETER C_HIGHADDR = 0xA9001FFF | |
2358 | BUS_INTERFACE SOPB = opb_v20_0 | |
2359 | PORT Sys_Intr1 = ps2_1_intr | |
2360 | PORT Sys_Intr2 = ps2_2_intr | |
2361 | PORT Clkin1 = ps2_clk_rx_1 | |
2362 | PORT Clkin2 = ps2_clk_rx_2 | |
2363 | PORT Clkpd1 = ps2_clk_tx_1 | |
2364 | PORT Clkpd2 = ps2_clk_tx_2 | |
2365 | PORT Rx1 = ps2_d_rx_1 | |
2366 | PORT Rx2 = ps2_d_rx_2 | |
2367 | PORT Txpd1 = ps2_d_tx_1 | |
2368 | PORT Txpd2 = ps2_d_tx_2 | |
2369 | END | |
2370 | ||
2371 | It would result in the following device tree nodes: | |
2372 | ||
2373 | opb_ps2_dual_ref_0@a9000000 { | |
2374 | ranges = <0 a9000000 2000>; | |
2375 | // If this device had extra parameters, then they would | |
2376 | // go here. | |
2377 | ps2@0 { | |
2378 | compatible = "xlnx,opb-ps2-dual-ref-1.00.a"; | |
2379 | reg = <0 40>; | |
2380 | interrupt-parent = <&opb-intc>; | |
2381 | interrupts = <3 0>; | |
2382 | cell-index = <0>; | |
2383 | }; | |
2384 | ps2@1000 { | |
2385 | compatible = "xlnx,opb-ps2-dual-ref-1.00.a"; | |
2386 | reg = <1000 40>; | |
2387 | interrupt-parent = <&opb-intc>; | |
2388 | interrupts = <3 0>; | |
2389 | cell-index = <0>; | |
2390 | }; | |
2391 | }; | |
2392 | ||
2393 | Also, the system.mhs file defines bus attachments from the processor | |
2394 | to the devices. The device tree structure should reflect the bus | |
2395 | attachments. Again an example; this system.mhs fragment: | |
2396 | ||
2397 | BEGIN ppc405_virtex4 | |
2398 | PARAMETER INSTANCE = ppc405_0 | |
2399 | PARAMETER HW_VER = 1.01.a | |
2400 | BUS_INTERFACE DPLB = plb_v34_0 | |
2401 | BUS_INTERFACE IPLB = plb_v34_0 | |
2402 | END | |
2403 | ||
2404 | BEGIN opb_intc | |
2405 | PARAMETER INSTANCE = opb_intc_0 | |
2406 | PARAMETER HW_VER = 1.00.c | |
2407 | PARAMETER C_BASEADDR = 0xD1000FC0 | |
2408 | PARAMETER C_HIGHADDR = 0xD1000FDF | |
2409 | BUS_INTERFACE SOPB = opb_v20_0 | |
2410 | END | |
2411 | ||
2412 | BEGIN opb_uart16550 | |
2413 | PARAMETER INSTANCE = opb_uart16550_0 | |
2414 | PARAMETER HW_VER = 1.00.d | |
2415 | PARAMETER C_BASEADDR = 0xa0000000 | |
2416 | PARAMETER C_HIGHADDR = 0xa0001FFF | |
2417 | BUS_INTERFACE SOPB = opb_v20_0 | |
2418 | END | |
2419 | ||
2420 | BEGIN plb_v34 | |
2421 | PARAMETER INSTANCE = plb_v34_0 | |
2422 | PARAMETER HW_VER = 1.02.a | |
2423 | END | |
2424 | ||
2425 | BEGIN plb_bram_if_cntlr | |
2426 | PARAMETER INSTANCE = plb_bram_if_cntlr_0 | |
2427 | PARAMETER HW_VER = 1.00.b | |
2428 | PARAMETER C_BASEADDR = 0xFFFF0000 | |
2429 | PARAMETER C_HIGHADDR = 0xFFFFFFFF | |
2430 | BUS_INTERFACE SPLB = plb_v34_0 | |
2431 | END | |
2432 | ||
2433 | BEGIN plb2opb_bridge | |
2434 | PARAMETER INSTANCE = plb2opb_bridge_0 | |
2435 | PARAMETER HW_VER = 1.01.a | |
2436 | PARAMETER C_RNG0_BASEADDR = 0x20000000 | |
2437 | PARAMETER C_RNG0_HIGHADDR = 0x3FFFFFFF | |
2438 | PARAMETER C_RNG1_BASEADDR = 0x60000000 | |
2439 | PARAMETER C_RNG1_HIGHADDR = 0x7FFFFFFF | |
2440 | PARAMETER C_RNG2_BASEADDR = 0x80000000 | |
2441 | PARAMETER C_RNG2_HIGHADDR = 0xBFFFFFFF | |
2442 | PARAMETER C_RNG3_BASEADDR = 0xC0000000 | |
2443 | PARAMETER C_RNG3_HIGHADDR = 0xDFFFFFFF | |
2444 | BUS_INTERFACE SPLB = plb_v34_0 | |
2445 | BUS_INTERFACE MOPB = opb_v20_0 | |
2446 | END | |
2447 | ||
2448 | Gives this device tree (some properties removed for clarity): | |
2449 | ||
2450 | plb-v34-0 { | |
2451 | #address-cells = <1>; | |
2452 | #size-cells = <1>; | |
2453 | device_type = "ibm,plb"; | |
2454 | ranges; // 1:1 translation | |
2455 | ||
2456 | plb-bram-if-cntrl-0@ffff0000 { | |
2457 | reg = <ffff0000 10000>; | |
2458 | } | |
2459 | ||
2460 | opb-v20-0 { | |
2461 | #address-cells = <1>; | |
2462 | #size-cells = <1>; | |
2463 | ranges = <20000000 20000000 20000000 | |
2464 | 60000000 60000000 20000000 | |
2465 | 80000000 80000000 40000000 | |
2466 | c0000000 c0000000 20000000>; | |
2467 | ||
2468 | opb-uart16550-0@a0000000 { | |
2469 | reg = <a00000000 2000>; | |
2470 | }; | |
2471 | ||
2472 | opb-intc-0@d1000fc0 { | |
2473 | reg = <d1000fc0 20>; | |
2474 | }; | |
2475 | }; | |
2476 | }; | |
2477 | ||
2478 | That covers the general approach to binding xilinx IP cores into the | |
2479 | device tree. The following are bindings for specific devices: | |
2480 | ||
2481 | i) Xilinx ML300 Framebuffer | |
2482 | ||
2483 | Simple framebuffer device from the ML300 reference design (also on the | |
2484 | ML403 reference design as well as others). | |
2485 | ||
2486 | Optional properties: | |
2487 | - resolution = <xres yres> : pixel resolution of framebuffer. Some | |
2488 | implementations use a different resolution. | |
2489 | Default is <d#640 d#480> | |
2490 | - virt-resolution = <xvirt yvirt> : Size of framebuffer in memory. | |
2491 | Default is <d#1024 d#480>. | |
2492 | - rotate-display (empty) : rotate display 180 degrees. | |
2493 | ||
2494 | ii) Xilinx SystemACE | |
2495 | ||
2496 | The Xilinx SystemACE device is used to program FPGAs from an FPGA | |
2497 | bitstream stored on a CF card. It can also be used as a generic CF | |
2498 | interface device. | |
2499 | ||
2500 | Optional properties: | |
2501 | - 8-bit (empty) : Set this property for SystemACE in 8 bit mode | |
2502 | ||
2503 | iii) Xilinx EMAC and Xilinx TEMAC | |
2504 | ||
2505 | Xilinx Ethernet devices. In addition to general xilinx properties | |
2506 | listed above, nodes for these devices should include a phy-handle | |
2507 | property, and may include other common network device properties | |
2508 | like local-mac-address. | |
2509 | ||
2510 | iv) Xilinx Uartlite | |
2511 | ||
2512 | Xilinx uartlite devices are simple fixed speed serial ports. | |
2513 | ||
2514 | Requred properties: | |
2515 | - current-speed : Baud rate of uartlite | |
2516 | ||
c125a183 DG |
2517 | More devices will be defined as this spec matures. |
2518 | ||
27565903 SY |
2519 | VII - Specifying interrupt information for devices |
2520 | =================================================== | |
2521 | ||
2522 | The device tree represents the busses and devices of a hardware | |
2523 | system in a form similar to the physical bus topology of the | |
2524 | hardware. | |
2525 | ||
2526 | In addition, a logical 'interrupt tree' exists which represents the | |
2527 | hierarchy and routing of interrupts in the hardware. | |
2528 | ||
2529 | The interrupt tree model is fully described in the | |
2530 | document "Open Firmware Recommended Practice: Interrupt | |
2531 | Mapping Version 0.9". The document is available at: | |
2532 | <http://playground.sun.com/1275/practice>. | |
2533 | ||
2534 | 1) interrupts property | |
2535 | ---------------------- | |
2536 | ||
2537 | Devices that generate interrupts to a single interrupt controller | |
2538 | should use the conventional OF representation described in the | |
2539 | OF interrupt mapping documentation. | |
2540 | ||
2541 | Each device which generates interrupts must have an 'interrupt' | |
2542 | property. The interrupt property value is an arbitrary number of | |
2543 | of 'interrupt specifier' values which describe the interrupt or | |
2544 | interrupts for the device. | |
2545 | ||
2546 | The encoding of an interrupt specifier is determined by the | |
2547 | interrupt domain in which the device is located in the | |
2548 | interrupt tree. The root of an interrupt domain specifies in | |
2549 | its #interrupt-cells property the number of 32-bit cells | |
2550 | required to encode an interrupt specifier. See the OF interrupt | |
2551 | mapping documentation for a detailed description of domains. | |
2552 | ||
2553 | For example, the binding for the OpenPIC interrupt controller | |
2554 | specifies an #interrupt-cells value of 2 to encode the interrupt | |
2555 | number and level/sense information. All interrupt children in an | |
2556 | OpenPIC interrupt domain use 2 cells per interrupt in their interrupts | |
2557 | property. | |
2558 | ||
2559 | The PCI bus binding specifies a #interrupt-cell value of 1 to encode | |
2560 | which interrupt pin (INTA,INTB,INTC,INTD) is used. | |
2561 | ||
2562 | 2) interrupt-parent property | |
2563 | ---------------------------- | |
2564 | ||
2565 | The interrupt-parent property is specified to define an explicit | |
2566 | link between a device node and its interrupt parent in | |
2567 | the interrupt tree. The value of interrupt-parent is the | |
2568 | phandle of the parent node. | |
2569 | ||
2570 | If the interrupt-parent property is not defined for a node, it's | |
2571 | interrupt parent is assumed to be an ancestor in the node's | |
2572 | _device tree_ hierarchy. | |
2573 | ||
2574 | 3) OpenPIC Interrupt Controllers | |
2575 | -------------------------------- | |
2576 | ||
2577 | OpenPIC interrupt controllers require 2 cells to encode | |
2578 | interrupt information. The first cell defines the interrupt | |
2579 | number. The second cell defines the sense and level | |
2580 | information. | |
2581 | ||
2582 | Sense and level information should be encoded as follows: | |
2583 | ||
2584 | 0 = low to high edge sensitive type enabled | |
2585 | 1 = active low level sensitive type enabled | |
2586 | 2 = active high level sensitive type enabled | |
2587 | 3 = high to low edge sensitive type enabled | |
2588 | ||
2589 | 4) ISA Interrupt Controllers | |
2590 | ---------------------------- | |
2591 | ||
2592 | ISA PIC interrupt controllers require 2 cells to encode | |
2593 | interrupt information. The first cell defines the interrupt | |
2594 | number. The second cell defines the sense and level | |
2595 | information. | |
2596 | ||
2597 | ISA PIC interrupt controllers should adhere to the ISA PIC | |
2598 | encodings listed below: | |
2599 | ||
2600 | 0 = active low level sensitive type enabled | |
2601 | 1 = active high level sensitive type enabled | |
2602 | 2 = high to low edge sensitive type enabled | |
2603 | 3 = low to high edge sensitive type enabled | |
2604 | ||
c125a183 DG |
2605 | |
2606 | Appendix A - Sample SOC node for MPC8540 | |
2607 | ======================================== | |
2608 | ||
2609 | Note that the #address-cells and #size-cells for the SoC node | |
2610 | in this example have been explicitly listed; these are likely | |
2611 | not necessary as they are usually the same as the root node. | |
2612 | ||
2613 | soc8540@e0000000 { | |
2614 | #address-cells = <1>; | |
2615 | #size-cells = <1>; | |
2616 | #interrupt-cells = <2>; | |
2617 | device_type = "soc"; | |
2618 | ranges = <00000000 e0000000 00100000> | |
2619 | reg = <e0000000 00003000>; | |
7d4b95ae | 2620 | bus-frequency = <0>; |
c125a183 DG |
2621 | |
2622 | mdio@24520 { | |
2623 | reg = <24520 20>; | |
2624 | device_type = "mdio"; | |
2625 | compatible = "gianfar"; | |
2626 | ||
2627 | ethernet-phy@0 { | |
2628 | linux,phandle = <2452000> | |
2629 | interrupt-parent = <40000>; | |
2630 | interrupts = <35 1>; | |
2631 | reg = <0>; | |
2632 | device_type = "ethernet-phy"; | |
2633 | }; | |
2634 | ||
2635 | ethernet-phy@1 { | |
2636 | linux,phandle = <2452001> | |
2637 | interrupt-parent = <40000>; | |
2638 | interrupts = <35 1>; | |
2639 | reg = <1>; | |
2640 | device_type = "ethernet-phy"; | |
2641 | }; | |
2642 | ||
2643 | ethernet-phy@3 { | |
2644 | linux,phandle = <2452002> | |
2645 | interrupt-parent = <40000>; | |
2646 | interrupts = <35 1>; | |
2647 | reg = <3>; | |
2648 | device_type = "ethernet-phy"; | |
2649 | }; | |
2650 | ||
2651 | }; | |
2652 | ||
2653 | ethernet@24000 { | |
2654 | #size-cells = <0>; | |
2655 | device_type = "network"; | |
2656 | model = "TSEC"; | |
2657 | compatible = "gianfar"; | |
2658 | reg = <24000 1000>; | |
f583165f | 2659 | mac-address = [ 00 E0 0C 00 73 00 ]; |
c125a183 DG |
2660 | interrupts = <d 3 e 3 12 3>; |
2661 | interrupt-parent = <40000>; | |
2662 | phy-handle = <2452000>; | |
2663 | }; | |
2664 | ||
2665 | ethernet@25000 { | |
2666 | #address-cells = <1>; | |
2667 | #size-cells = <0>; | |
2668 | device_type = "network"; | |
2669 | model = "TSEC"; | |
2670 | compatible = "gianfar"; | |
2671 | reg = <25000 1000>; | |
f583165f | 2672 | mac-address = [ 00 E0 0C 00 73 01 ]; |
c125a183 DG |
2673 | interrupts = <13 3 14 3 18 3>; |
2674 | interrupt-parent = <40000>; | |
2675 | phy-handle = <2452001>; | |
2676 | }; | |
2677 | ||
2678 | ethernet@26000 { | |
2679 | #address-cells = <1>; | |
2680 | #size-cells = <0>; | |
2681 | device_type = "network"; | |
2682 | model = "FEC"; | |
2683 | compatible = "gianfar"; | |
2684 | reg = <26000 1000>; | |
f583165f | 2685 | mac-address = [ 00 E0 0C 00 73 02 ]; |
c125a183 DG |
2686 | interrupts = <19 3>; |
2687 | interrupt-parent = <40000>; | |
2688 | phy-handle = <2452002>; | |
2689 | }; | |
2690 | ||
2691 | serial@4500 { | |
2692 | device_type = "serial"; | |
2693 | compatible = "ns16550"; | |
2694 | reg = <4500 100>; | |
2695 | clock-frequency = <0>; | |
2696 | interrupts = <1a 3>; | |
2697 | interrupt-parent = <40000>; | |
2698 | }; | |
2699 | ||
2700 | pic@40000 { | |
2701 | linux,phandle = <40000>; | |
2702 | clock-frequency = <0>; | |
2703 | interrupt-controller; | |
2704 | #address-cells = <0>; | |
2705 | reg = <40000 40000>; | |
2706 | built-in; | |
2707 | compatible = "chrp,open-pic"; | |
2708 | device_type = "open-pic"; | |
2709 | big-endian; | |
2710 | }; | |
2711 | ||
2712 | i2c@3000 { | |
2713 | interrupt-parent = <40000>; | |
2714 | interrupts = <1b 3>; | |
2715 | reg = <3000 18>; | |
2716 | device_type = "i2c"; | |
2717 | compatible = "fsl-i2c"; | |
2718 | dfsrr; | |
2719 | }; | |
2720 | ||
2721 | }; |