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1da177e4 LT |
1 | General Description |
2 | =================== | |
3 | ||
4 | This driver supports the 53c700 and 53c700-66 chips. It also supports | |
5 | the 53c710 but only in 53c700 emulation mode. It is full featured and | |
6 | does sync (-66 and 710 only), disconnects and tag command queueing. | |
7 | ||
8 | Since the 53c700 must be interfaced to a bus, you need to wrapper the | |
9 | card detector around this driver. For an example, see the | |
10 | NCR_D700.[ch] or lasi700.[ch] files. | |
11 | ||
12 | The comments in the 53c700.[ch] files tell you which parts you need to | |
13 | fill in to get the driver working. | |
14 | ||
15 | ||
16 | Compile Time Flags | |
17 | ================== | |
18 | ||
830d7f5e | 19 | A compile time flag is: |
1da177e4 LT |
20 | |
21 | CONFIG_53C700_LE_ON_BE | |
22 | ||
23 | define if the chipset must be supported in little endian mode on a big | |
24 | endian architecture (used for the 700 on parisc). | |
25 | ||
1da177e4 LT |
26 | |
27 | Using the Chip Core Driver | |
28 | ========================== | |
29 | ||
30 | In order to plumb the 53c700 chip core driver into a working SCSI | |
31 | driver, you need to know three things about the way the chip is wired | |
32 | into your system (or expansion card). | |
33 | ||
34 | 1. The clock speed of the SCSI core | |
35 | 2. The interrupt line used | |
36 | 3. The memory (or io space) location of the 53c700 registers. | |
37 | ||
38 | Optionally, you may also need to know other things, like how to read | |
39 | the SCSI Id from the card bios or whether the chip is wired for | |
40 | differential operation. | |
41 | ||
42 | Usually you can find items 2. and 3. from general spec. documents or | |
43 | even by examining the configuration of a working driver under another | |
44 | operating system. | |
45 | ||
46 | The clock speed is usually buried deep in the technical literature. | |
47 | It is required because it is used to set up both the synchronous and | |
48 | asynchronous dividers for the chip. As a general rule of thumb, | |
49 | manufacturers set the clock speed at the lowest possible setting | |
50 | consistent with the best operation of the chip (although some choose | |
51 | to drive it off the CPU or bus clock rather than going to the expense | |
52 | of an extra clock chip). The best operation clock speeds are: | |
53 | ||
54 | 53c700 - 25MHz | |
55 | 53c700-66 - 50MHz | |
56 | 53c710 - 40Mhz | |
57 | ||
58 | Writing Your Glue Driver | |
59 | ======================== | |
60 | ||
61 | This will be a standard SCSI driver (I don't know of a good document | |
62 | describing this, just copy from some other driver) with at least a | |
63 | detect and release entry. | |
64 | ||
65 | In the detect routine, you need to allocate a struct | |
66 | NCR_700_Host_Parameters sized memory area and clear it (so that the | |
67 | default values for everything are 0). Then you must fill in the | |
68 | parameters that matter to you (see below), plumb the NCR_700_intr | |
69 | routine into the interrupt line and call NCR_700_detect with the host | |
70 | template and the new parameters as arguments. You should also call | |
71 | the relevant request_*_region function and place the register base | |
72 | address into the `base' pointer of the host parameters. | |
73 | ||
74 | In the release routine, you must free the NCR_700_Host_Parameters that | |
75 | you allocated, call the corresponding release_*_region and free the | |
76 | interrupt. | |
77 | ||
78 | Handling Interrupts | |
79 | ------------------- | |
80 | ||
81 | In general, you should just plumb the card's interrupt line in with | |
82 | ||
83 | request_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host); | |
84 | ||
85 | where host is the return from the relevant NCR_700_detect() routine. | |
86 | ||
87 | You may also write your own interrupt handling routine which calls | |
88 | NCR_700_intr() directly. However, you should only really do this if | |
89 | you have a card with more than one chip on it and you can read a | |
90 | register to tell which set of chips wants the interrupt. | |
91 | ||
92 | Settable NCR_700_Host_Parameters | |
93 | -------------------------------- | |
94 | ||
95 | The following are a list of the user settable parameters: | |
96 | ||
97 | clock: (MANDATORY) | |
98 | ||
99 | Set to the clock speed of the chip in MHz. | |
100 | ||
101 | base: (MANDATORY) | |
102 | ||
103 | set to the base of the io or mem region for the register set. On 64 | |
104 | bit architectures this is only 32 bits wide, so the registers must be | |
105 | mapped into the low 32 bits of memory. | |
106 | ||
107 | pci_dev: (OPTIONAL) | |
108 | ||
109 | set to the PCI board device. Leave NULL for a non-pci board. This is | |
110 | used for the pci_alloc_consistent() and pci_map_*() functions. | |
111 | ||
112 | dmode_extra: (OPTIONAL, 53c710 only) | |
113 | ||
114 | extra flags for the DMODE register. These are used to control bus | |
115 | output pins on the 710. The settings should be a combination of | |
116 | DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up | |
117 | to the board designer. Usually it is safe to ignore this setting. | |
118 | ||
119 | differential: (OPTIONAL) | |
120 | ||
121 | set to 1 if the chip drives a differential bus. | |
122 | ||
123 | force_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) | |
124 | ||
125 | set to 1 if the chip is operating in little endian mode on a big | |
126 | endian architecture. | |
127 | ||
128 | chip710: (OPTIONAL) | |
129 | ||
130 | set to 1 if the chip is a 53c710. | |
131 | ||
132 | burst_disable: (OPTIONAL, 53c710 only) | |
133 | ||
134 | disable 8 byte bursting for DMA transfers. | |
135 |