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1da177e4 LT |
1 | /* |
2 | * linux/arch/alpha/kernel/irq.c | |
3 | * | |
4 | * Copyright (C) 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the code used by various IRQ handling routines: | |
7 | * asking for different IRQ's should be done through these routines | |
8 | * instead of just grabbing them. Thus setups with different IRQ numbers | |
9 | * shouldn't result in any weird surprises, and installing new handlers | |
10 | * should be easier. | |
11 | */ | |
12 | ||
1da177e4 LT |
13 | #include <linux/kernel.h> |
14 | #include <linux/module.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/kernel_stat.h> | |
17 | #include <linux/signal.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/ptrace.h> | |
20 | #include <linux/interrupt.h> | |
1da177e4 LT |
21 | #include <linux/random.h> |
22 | #include <linux/init.h> | |
23 | #include <linux/irq.h> | |
24 | #include <linux/proc_fs.h> | |
25 | #include <linux/seq_file.h> | |
26 | #include <linux/profile.h> | |
27 | #include <linux/bitops.h> | |
28 | ||
29 | #include <asm/system.h> | |
30 | #include <asm/io.h> | |
31 | #include <asm/uaccess.h> | |
32 | ||
1da177e4 | 33 | volatile unsigned long irq_err_count; |
65d92064 | 34 | DEFINE_PER_CPU(unsigned long, irq_pmi_count); |
1da177e4 | 35 | |
0595bf3b | 36 | void ack_bad_irq(unsigned int irq) |
1da177e4 LT |
37 | { |
38 | irq_err_count++; | |
39 | printk(KERN_CRIT "Unexpected IRQ trap at vector %u\n", irq); | |
40 | } | |
41 | ||
1da177e4 | 42 | #ifdef CONFIG_SMP |
1da177e4 | 43 | static char irq_user_affinity[NR_IRQS]; |
1da177e4 | 44 | |
18404756 | 45 | int irq_select_affinity(unsigned int irq) |
1da177e4 LT |
46 | { |
47 | static int last_cpu; | |
48 | int cpu = last_cpu + 1; | |
49 | ||
d1bef4ed | 50 | if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq]) |
0595bf3b | 51 | return 1; |
1da177e4 | 52 | |
d036e67b RR |
53 | while (!cpu_possible(cpu) || |
54 | !cpumask_test_cpu(cpu, irq_default_affinity)) | |
1da177e4 LT |
55 | cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0); |
56 | last_cpu = cpu; | |
57 | ||
e65e49d0 | 58 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); |
0de26520 | 59 | irq_desc[irq].chip->set_affinity(irq, cpumask_of(cpu)); |
0595bf3b | 60 | return 0; |
1da177e4 | 61 | } |
1da177e4 LT |
62 | #endif /* CONFIG_SMP */ |
63 | ||
1da177e4 LT |
64 | int |
65 | show_interrupts(struct seq_file *p, void *v) | |
66 | { | |
1da177e4 | 67 | int j; |
c5e3d98c | 68 | int irq = *(loff_t *) v; |
1da177e4 LT |
69 | struct irqaction * action; |
70 | unsigned long flags; | |
71 | ||
72 | #ifdef CONFIG_SMP | |
c5e3d98c | 73 | if (irq == 0) { |
1da177e4 | 74 | seq_puts(p, " "); |
c5e3d98c ES |
75 | for_each_online_cpu(j) |
76 | seq_printf(p, "CPU%d ", j); | |
1da177e4 LT |
77 | seq_putc(p, '\n'); |
78 | } | |
79 | #endif | |
80 | ||
c5e3d98c | 81 | if (irq < ACTUAL_NR_IRQS) { |
239007b8 | 82 | raw_spin_lock_irqsave(&irq_desc[irq].lock, flags); |
c5e3d98c | 83 | action = irq_desc[irq].action; |
1da177e4 LT |
84 | if (!action) |
85 | goto unlock; | |
c5e3d98c | 86 | seq_printf(p, "%3d: ", irq); |
1da177e4 | 87 | #ifndef CONFIG_SMP |
c5e3d98c | 88 | seq_printf(p, "%10u ", kstat_irqs(irq)); |
1da177e4 | 89 | #else |
c5e3d98c | 90 | for_each_online_cpu(j) |
4d87c5be | 91 | seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); |
1da177e4 | 92 | #endif |
8ab1221c | 93 | seq_printf(p, " %14s", irq_desc[irq].chip->name); |
1da177e4 | 94 | seq_printf(p, " %c%s", |
d18ecedc | 95 | (action->flags & IRQF_DISABLED)?'+':' ', |
1da177e4 LT |
96 | action->name); |
97 | ||
98 | for (action=action->next; action; action = action->next) { | |
99 | seq_printf(p, ", %c%s", | |
d18ecedc | 100 | (action->flags & IRQF_DISABLED)?'+':' ', |
1da177e4 LT |
101 | action->name); |
102 | } | |
103 | ||
104 | seq_putc(p, '\n'); | |
105 | unlock: | |
239007b8 | 106 | raw_spin_unlock_irqrestore(&irq_desc[irq].lock, flags); |
c5e3d98c | 107 | } else if (irq == ACTUAL_NR_IRQS) { |
1da177e4 LT |
108 | #ifdef CONFIG_SMP |
109 | seq_puts(p, "IPI: "); | |
c5e3d98c ES |
110 | for_each_online_cpu(j) |
111 | seq_printf(p, "%10lu ", cpu_data[j].ipi_count); | |
1da177e4 LT |
112 | seq_putc(p, '\n'); |
113 | #endif | |
65d92064 MC |
114 | seq_puts(p, "PMI: "); |
115 | for_each_online_cpu(j) | |
116 | seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); | |
117 | seq_puts(p, " Performance Monitoring\n"); | |
1da177e4 LT |
118 | seq_printf(p, "ERR: %10lu\n", irq_err_count); |
119 | } | |
120 | return 0; | |
121 | } | |
122 | ||
1da177e4 LT |
123 | /* |
124 | * handle_irq handles all normal device IRQ's (the special | |
125 | * SMP cross-CPU interrupts have their own specific | |
126 | * handlers). | |
127 | */ | |
128 | ||
129 | #define MAX_ILLEGAL_IRQS 16 | |
130 | ||
131 | void | |
3dbb8c62 | 132 | handle_irq(int irq) |
1da177e4 LT |
133 | { |
134 | /* | |
135 | * We ack quickly, we don't want the irq controller | |
136 | * thinking we're snobs just because some other CPU has | |
137 | * disabled global interrupts (we have already done the | |
138 | * INT_ACK cycles, it's too late to try to pretend to the | |
139 | * controller that we aren't taking the interrupt). | |
140 | * | |
141 | * 0 return value means that this irq is already being | |
142 | * handled by some other CPU. (or is disabled) | |
143 | */ | |
1da177e4 LT |
144 | static unsigned int illegal_count=0; |
145 | ||
146 | if ((unsigned) irq > ACTUAL_NR_IRQS && illegal_count < MAX_ILLEGAL_IRQS ) { | |
147 | irq_err_count++; | |
148 | illegal_count++; | |
149 | printk(KERN_CRIT "device_interrupt: invalid interrupt %d\n", | |
150 | irq); | |
151 | return; | |
152 | } | |
153 | ||
154 | irq_enter(); | |
eff2c2f6 IK |
155 | /* |
156 | * __do_IRQ() must be called with IPL_MAX. Note that we do not | |
157 | * explicitly enable interrupts afterwards - some MILO PALcode | |
158 | * (namely LX164 one) seems to have severe problems with RTI | |
159 | * at IPL 0. | |
160 | */ | |
0595bf3b | 161 | local_irq_disable(); |
8774cb81 | 162 | __do_IRQ(irq); |
1da177e4 LT |
163 | irq_exit(); |
164 | } |