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1da177e4 LT |
1 | /* ptrace.c */ |
2 | /* By Ross Biro 1/23/92 */ | |
3 | /* edited by Linus Torvalds */ | |
4 | /* mangled further by Bob Manson (manson@santafe.edu) */ | |
5 | /* more mutilation by David Mosberger (davidm@azstarnet.com) */ | |
6 | ||
7 | #include <linux/kernel.h> | |
8 | #include <linux/sched.h> | |
9 | #include <linux/mm.h> | |
10 | #include <linux/smp.h> | |
1da177e4 LT |
11 | #include <linux/errno.h> |
12 | #include <linux/ptrace.h> | |
13 | #include <linux/user.h> | |
1da177e4 | 14 | #include <linux/security.h> |
7ed20e1a | 15 | #include <linux/signal.h> |
12f79be9 | 16 | #include <linux/tracehook.h> |
a9302e84 | 17 | #include <linux/audit.h> |
1da177e4 LT |
18 | |
19 | #include <asm/uaccess.h> | |
20 | #include <asm/pgtable.h> | |
1da177e4 LT |
21 | #include <asm/fpu.h> |
22 | ||
23 | #include "proto.h" | |
24 | ||
25 | #define DEBUG DBG_MEM | |
26 | #undef DEBUG | |
27 | ||
28 | #ifdef DEBUG | |
29 | enum { | |
30 | DBG_MEM = (1<<0), | |
31 | DBG_BPT = (1<<1), | |
32 | DBG_MEM_ALL = (1<<2) | |
33 | }; | |
34 | #define DBG(fac,args) {if ((fac) & DEBUG) printk args;} | |
35 | #else | |
36 | #define DBG(fac,args) | |
37 | #endif | |
38 | ||
39 | #define BREAKINST 0x00000080 /* call_pal bpt */ | |
40 | ||
41 | /* | |
42 | * does not yet catch signals sent when the child dies. | |
43 | * in exit.c or in signal.c. | |
44 | */ | |
45 | ||
46 | /* | |
47 | * Processes always block with the following stack-layout: | |
48 | * | |
49 | * +================================+ <---- task + 2*PAGE_SIZE | |
50 | * | PALcode saved frame (ps, pc, | ^ | |
51 | * | gp, a0, a1, a2) | | | |
52 | * +================================+ | struct pt_regs | |
53 | * | | | | |
54 | * | frame generated by SAVE_ALL | | | |
55 | * | | v | |
56 | * +================================+ | |
57 | * | | ^ | |
58 | * | frame saved by do_switch_stack | | struct switch_stack | |
59 | * | | v | |
60 | * +================================+ | |
61 | */ | |
62 | ||
63 | /* | |
64 | * The following table maps a register index into the stack offset at | |
65 | * which the register is saved. Register indices are 0-31 for integer | |
66 | * regs, 32-63 for fp regs, and 64 for the pc. Notice that sp and | |
67 | * zero have no stack-slot and need to be treated specially (see | |
68 | * get_reg/put_reg below). | |
69 | */ | |
70 | enum { | |
71 | REG_R0 = 0, REG_F0 = 32, REG_FPCR = 63, REG_PC = 64 | |
72 | }; | |
73 | ||
e52f4ca2 | 74 | #define PT_REG(reg) \ |
75 | (PAGE_SIZE*2 - sizeof(struct pt_regs) + offsetof(struct pt_regs, reg)) | |
76 | ||
77 | #define SW_REG(reg) \ | |
78 | (PAGE_SIZE*2 - sizeof(struct pt_regs) - sizeof(struct switch_stack) \ | |
79 | + offsetof(struct switch_stack, reg)) | |
80 | ||
1da177e4 LT |
81 | static int regoff[] = { |
82 | PT_REG( r0), PT_REG( r1), PT_REG( r2), PT_REG( r3), | |
83 | PT_REG( r4), PT_REG( r5), PT_REG( r6), PT_REG( r7), | |
84 | PT_REG( r8), SW_REG( r9), SW_REG( r10), SW_REG( r11), | |
85 | SW_REG( r12), SW_REG( r13), SW_REG( r14), SW_REG( r15), | |
86 | PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19), | |
87 | PT_REG( r20), PT_REG( r21), PT_REG( r22), PT_REG( r23), | |
88 | PT_REG( r24), PT_REG( r25), PT_REG( r26), PT_REG( r27), | |
89 | PT_REG( r28), PT_REG( gp), -1, -1, | |
90 | SW_REG(fp[ 0]), SW_REG(fp[ 1]), SW_REG(fp[ 2]), SW_REG(fp[ 3]), | |
91 | SW_REG(fp[ 4]), SW_REG(fp[ 5]), SW_REG(fp[ 6]), SW_REG(fp[ 7]), | |
92 | SW_REG(fp[ 8]), SW_REG(fp[ 9]), SW_REG(fp[10]), SW_REG(fp[11]), | |
93 | SW_REG(fp[12]), SW_REG(fp[13]), SW_REG(fp[14]), SW_REG(fp[15]), | |
94 | SW_REG(fp[16]), SW_REG(fp[17]), SW_REG(fp[18]), SW_REG(fp[19]), | |
95 | SW_REG(fp[20]), SW_REG(fp[21]), SW_REG(fp[22]), SW_REG(fp[23]), | |
96 | SW_REG(fp[24]), SW_REG(fp[25]), SW_REG(fp[26]), SW_REG(fp[27]), | |
97 | SW_REG(fp[28]), SW_REG(fp[29]), SW_REG(fp[30]), SW_REG(fp[31]), | |
98 | PT_REG( pc) | |
99 | }; | |
100 | ||
101 | static unsigned long zero; | |
102 | ||
103 | /* | |
104 | * Get address of register REGNO in task TASK. | |
105 | */ | |
106 | static unsigned long * | |
107 | get_reg_addr(struct task_struct * task, unsigned long regno) | |
108 | { | |
109 | unsigned long *addr; | |
110 | ||
111 | if (regno == 30) { | |
37bfbaf9 | 112 | addr = &task_thread_info(task)->pcb.usp; |
1da177e4 | 113 | } else if (regno == 65) { |
37bfbaf9 | 114 | addr = &task_thread_info(task)->pcb.unique; |
1da177e4 LT |
115 | } else if (regno == 31 || regno > 65) { |
116 | zero = 0; | |
117 | addr = &zero; | |
118 | } else { | |
27f45130 | 119 | addr = task_stack_page(task) + regoff[regno]; |
1da177e4 LT |
120 | } |
121 | return addr; | |
122 | } | |
123 | ||
124 | /* | |
125 | * Get contents of register REGNO in task TASK. | |
126 | */ | |
127 | static unsigned long | |
128 | get_reg(struct task_struct * task, unsigned long regno) | |
129 | { | |
130 | /* Special hack for fpcr -- combine hardware and software bits. */ | |
131 | if (regno == 63) { | |
132 | unsigned long fpcr = *get_reg_addr(task, regno); | |
133 | unsigned long swcr | |
37bfbaf9 | 134 | = task_thread_info(task)->ieee_state & IEEE_SW_MASK; |
1da177e4 LT |
135 | swcr = swcr_update_status(swcr, fpcr); |
136 | return fpcr | swcr; | |
137 | } | |
138 | return *get_reg_addr(task, regno); | |
139 | } | |
140 | ||
141 | /* | |
142 | * Write contents of register REGNO in task TASK. | |
143 | */ | |
144 | static int | |
145 | put_reg(struct task_struct *task, unsigned long regno, unsigned long data) | |
146 | { | |
147 | if (regno == 63) { | |
37bfbaf9 AV |
148 | task_thread_info(task)->ieee_state |
149 | = ((task_thread_info(task)->ieee_state & ~IEEE_SW_MASK) | |
1da177e4 LT |
150 | | (data & IEEE_SW_MASK)); |
151 | data = (data & FPCR_DYN_MASK) | ieee_swcr_to_fpcr(data); | |
152 | } | |
153 | *get_reg_addr(task, regno) = data; | |
154 | return 0; | |
155 | } | |
156 | ||
157 | static inline int | |
158 | read_int(struct task_struct *task, unsigned long addr, int * data) | |
159 | { | |
160 | int copied = access_process_vm(task, addr, data, sizeof(int), 0); | |
161 | return (copied == sizeof(int)) ? 0 : -EIO; | |
162 | } | |
163 | ||
164 | static inline int | |
165 | write_int(struct task_struct *task, unsigned long addr, int data) | |
166 | { | |
167 | int copied = access_process_vm(task, addr, &data, sizeof(int), 1); | |
168 | return (copied == sizeof(int)) ? 0 : -EIO; | |
169 | } | |
170 | ||
171 | /* | |
172 | * Set breakpoint. | |
173 | */ | |
174 | int | |
175 | ptrace_set_bpt(struct task_struct * child) | |
176 | { | |
177 | int displ, i, res, reg_b, nsaved = 0; | |
178 | unsigned int insn, op_code; | |
179 | unsigned long pc; | |
180 | ||
181 | pc = get_reg(child, REG_PC); | |
182 | res = read_int(child, pc, (int *) &insn); | |
183 | if (res < 0) | |
184 | return res; | |
185 | ||
186 | op_code = insn >> 26; | |
187 | if (op_code >= 0x30) { | |
188 | /* | |
189 | * It's a branch: instead of trying to figure out | |
190 | * whether the branch will be taken or not, we'll put | |
191 | * a breakpoint at either location. This is simpler, | |
192 | * more reliable, and probably not a whole lot slower | |
193 | * than the alternative approach of emulating the | |
194 | * branch (emulation can be tricky for fp branches). | |
195 | */ | |
196 | displ = ((s32)(insn << 11)) >> 9; | |
37bfbaf9 | 197 | task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; |
1da177e4 | 198 | if (displ) /* guard against unoptimized code */ |
37bfbaf9 | 199 | task_thread_info(child)->bpt_addr[nsaved++] |
1da177e4 LT |
200 | = pc + 4 + displ; |
201 | DBG(DBG_BPT, ("execing branch\n")); | |
202 | } else if (op_code == 0x1a) { | |
203 | reg_b = (insn >> 16) & 0x1f; | |
37bfbaf9 | 204 | task_thread_info(child)->bpt_addr[nsaved++] = get_reg(child, reg_b); |
1da177e4 LT |
205 | DBG(DBG_BPT, ("execing jump\n")); |
206 | } else { | |
37bfbaf9 | 207 | task_thread_info(child)->bpt_addr[nsaved++] = pc + 4; |
1da177e4 LT |
208 | DBG(DBG_BPT, ("execing normal insn\n")); |
209 | } | |
210 | ||
211 | /* install breakpoints: */ | |
212 | for (i = 0; i < nsaved; ++i) { | |
37bfbaf9 | 213 | res = read_int(child, task_thread_info(child)->bpt_addr[i], |
1da177e4 LT |
214 | (int *) &insn); |
215 | if (res < 0) | |
216 | return res; | |
37bfbaf9 | 217 | task_thread_info(child)->bpt_insn[i] = insn; |
1da177e4 | 218 | DBG(DBG_BPT, (" -> next_pc=%lx\n", |
37bfbaf9 AV |
219 | task_thread_info(child)->bpt_addr[i])); |
220 | res = write_int(child, task_thread_info(child)->bpt_addr[i], | |
1da177e4 LT |
221 | BREAKINST); |
222 | if (res < 0) | |
223 | return res; | |
224 | } | |
37bfbaf9 | 225 | task_thread_info(child)->bpt_nsaved = nsaved; |
1da177e4 LT |
226 | return 0; |
227 | } | |
228 | ||
229 | /* | |
230 | * Ensure no single-step breakpoint is pending. Returns non-zero | |
231 | * value if child was being single-stepped. | |
232 | */ | |
233 | int | |
234 | ptrace_cancel_bpt(struct task_struct * child) | |
235 | { | |
37bfbaf9 | 236 | int i, nsaved = task_thread_info(child)->bpt_nsaved; |
1da177e4 | 237 | |
37bfbaf9 | 238 | task_thread_info(child)->bpt_nsaved = 0; |
1da177e4 LT |
239 | |
240 | if (nsaved > 2) { | |
241 | printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); | |
242 | nsaved = 2; | |
243 | } | |
244 | ||
245 | for (i = 0; i < nsaved; ++i) { | |
37bfbaf9 AV |
246 | write_int(child, task_thread_info(child)->bpt_addr[i], |
247 | task_thread_info(child)->bpt_insn[i]); | |
1da177e4 LT |
248 | } |
249 | return (nsaved != 0); | |
250 | } | |
251 | ||
fd341abb CH |
252 | void user_enable_single_step(struct task_struct *child) |
253 | { | |
254 | /* Mark single stepping. */ | |
255 | task_thread_info(child)->bpt_nsaved = -1; | |
256 | } | |
257 | ||
258 | void user_disable_single_step(struct task_struct *child) | |
259 | { | |
260 | ptrace_cancel_bpt(child); | |
261 | } | |
262 | ||
1da177e4 LT |
263 | /* |
264 | * Called by kernel/ptrace.c when detaching.. | |
265 | * | |
266 | * Make sure the single step bit is not set. | |
267 | */ | |
268 | void ptrace_disable(struct task_struct *child) | |
269 | { | |
fd341abb | 270 | user_disable_single_step(child); |
1da177e4 LT |
271 | } |
272 | ||
9b05a69e NK |
273 | long arch_ptrace(struct task_struct *child, long request, |
274 | unsigned long addr, unsigned long data) | |
1da177e4 | 275 | { |
1da177e4 LT |
276 | unsigned long tmp; |
277 | size_t copied; | |
278 | long ret; | |
279 | ||
1da177e4 LT |
280 | switch (request) { |
281 | /* When I and D space are separate, these will need to be fixed. */ | |
282 | case PTRACE_PEEKTEXT: /* read word at location addr. */ | |
283 | case PTRACE_PEEKDATA: | |
284 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
285 | ret = -EIO; | |
286 | if (copied != sizeof(tmp)) | |
287 | break; | |
288 | ||
a5f833f3 | 289 | force_successful_syscall_return(); |
1da177e4 LT |
290 | ret = tmp; |
291 | break; | |
292 | ||
293 | /* Read register number ADDR. */ | |
294 | case PTRACE_PEEKUSR: | |
a5f833f3 | 295 | force_successful_syscall_return(); |
1da177e4 | 296 | ret = get_reg(child, addr); |
9b05a69e | 297 | DBG(DBG_MEM, ("peek $%lu->%#lx\n", addr, ret)); |
1da177e4 LT |
298 | break; |
299 | ||
300 | /* When I and D space are separate, this will have to be fixed. */ | |
301 | case PTRACE_POKETEXT: /* write the word at location addr. */ | |
302 | case PTRACE_POKEDATA: | |
f284ce72 | 303 | ret = generic_ptrace_pokedata(child, addr, data); |
1da177e4 LT |
304 | break; |
305 | ||
306 | case PTRACE_POKEUSR: /* write the specified register */ | |
9b05a69e | 307 | DBG(DBG_MEM, ("poke $%lu<-%#lx\n", addr, data)); |
1da177e4 LT |
308 | ret = put_reg(child, addr, data); |
309 | break; | |
1da177e4 LT |
310 | default: |
311 | ret = ptrace_request(child, request, addr, data); | |
a5f833f3 | 312 | break; |
1da177e4 | 313 | } |
1da177e4 LT |
314 | return ret; |
315 | } | |
316 | ||
12f79be9 AV |
317 | asmlinkage unsigned long syscall_trace_enter(void) |
318 | { | |
319 | unsigned long ret = 0; | |
a9302e84 | 320 | struct pt_regs *regs = current_pt_regs(); |
12f79be9 AV |
321 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
322 | tracehook_report_syscall_entry(current_pt_regs())) | |
323 | ret = -1UL; | |
91397401 | 324 | audit_syscall_entry(regs->r0, regs->r16, regs->r17, regs->r18, regs->r19); |
12f79be9 AV |
325 | return ret ?: current_pt_regs()->r0; |
326 | } | |
327 | ||
1da177e4 | 328 | asmlinkage void |
12f79be9 | 329 | syscall_trace_leave(void) |
1da177e4 | 330 | { |
a9302e84 | 331 | audit_syscall_exit(current_pt_regs()); |
12f79be9 AV |
332 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
333 | tracehook_report_syscall_exit(current_pt_regs(), 0); | |
1da177e4 | 334 | } |