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1da177e4 LT |
1 | /* |
2 | * linux/arch/alpha/kernel/sys_sx164.c | |
3 | * | |
4 | * Copyright (C) 1995 David A Rusling | |
5 | * Copyright (C) 1996 Jay A Estabrook | |
6 | * Copyright (C) 1998, 1999, 2000 Richard Henderson | |
7 | * | |
8 | * Code supporting the SX164 (PCA56+PYXIS). | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/types.h> | |
13 | #include <linux/mm.h> | |
14 | #include <linux/sched.h> | |
15 | #include <linux/pci.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/bitops.h> | |
18 | ||
19 | #include <asm/ptrace.h> | |
1da177e4 LT |
20 | #include <asm/dma.h> |
21 | #include <asm/irq.h> | |
22 | #include <asm/mmu_context.h> | |
23 | #include <asm/io.h> | |
24 | #include <asm/pgtable.h> | |
25 | #include <asm/core_cia.h> | |
26 | #include <asm/hwrpb.h> | |
27 | #include <asm/tlbflush.h> | |
ec221208 | 28 | #include <asm/special_insns.h> |
1da177e4 LT |
29 | |
30 | #include "proto.h" | |
31 | #include "irq_impl.h" | |
32 | #include "pci_impl.h" | |
33 | #include "machvec_impl.h" | |
34 | ||
35 | ||
36 | static void __init | |
37 | sx164_init_irq(void) | |
38 | { | |
39 | outb(0, DMA1_RESET_REG); | |
40 | outb(0, DMA2_RESET_REG); | |
41 | outb(DMA_MODE_CASCADE, DMA2_MODE_REG); | |
42 | outb(0, DMA2_MASK_REG); | |
43 | ||
44 | if (alpha_using_srm) | |
45 | alpha_mv.device_interrupt = srm_device_interrupt; | |
46 | ||
47 | init_i8259a_irqs(); | |
48 | ||
49 | /* Not interested in the bogus interrupts (0,3,4,5,40-47), | |
50 | NMI (1), or HALT (2). */ | |
51 | if (alpha_using_srm) | |
52 | init_srm_irqs(40, 0x3f0000); | |
53 | else | |
54 | init_pyxis_irqs(0xff00003f0000UL); | |
55 | ||
56 | setup_irq(16+6, &timer_cascade_irqaction); | |
57 | } | |
58 | ||
59 | /* | |
60 | * PCI Fixup configuration. | |
61 | * | |
62 | * Summary @ PYXIS_INT_REQ: | |
63 | * Bit Meaning | |
64 | * 0 RSVD | |
65 | * 1 NMI | |
66 | * 2 Halt/Reset switch | |
67 | * 3 MBZ | |
68 | * 4 RAZ | |
69 | * 5 RAZ | |
70 | * 6 Interval timer (RTC) | |
71 | * 7 PCI-ISA Bridge | |
72 | * 8 Interrupt Line A from slot 3 | |
73 | * 9 Interrupt Line A from slot 2 | |
74 | *10 Interrupt Line A from slot 1 | |
75 | *11 Interrupt Line A from slot 0 | |
76 | *12 Interrupt Line B from slot 3 | |
77 | *13 Interrupt Line B from slot 2 | |
78 | *14 Interrupt Line B from slot 1 | |
79 | *15 Interrupt line B from slot 0 | |
80 | *16 Interrupt Line C from slot 3 | |
81 | *17 Interrupt Line C from slot 2 | |
82 | *18 Interrupt Line C from slot 1 | |
83 | *19 Interrupt Line C from slot 0 | |
84 | *20 Interrupt Line D from slot 3 | |
85 | *21 Interrupt Line D from slot 2 | |
86 | *22 Interrupt Line D from slot 1 | |
87 | *23 Interrupt Line D from slot 0 | |
88 | * | |
89 | * IdSel | |
90 | * 5 32 bit PCI option slot 2 | |
91 | * 6 64 bit PCI option slot 0 | |
92 | * 7 64 bit PCI option slot 1 | |
93 | * 8 Cypress I/O | |
94 | * 9 32 bit PCI option slot 3 | |
95 | */ | |
96 | ||
97 | static int __init | |
d5341942 | 98 | sx164_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
1da177e4 LT |
99 | { |
100 | static char irq_tab[5][5] __initdata = { | |
101 | /*INT INTA INTB INTC INTD */ | |
102 | { 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */ | |
103 | { 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */ | |
104 | { 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */ | |
105 | { -1, -1, -1, -1, -1}, /* IdSel 8 SIO */ | |
106 | { 16+ 8, 16+ 8, 16+12, 16+16, 16+20} /* IdSel 9 slot 3 J15 */ | |
107 | }; | |
108 | const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5; | |
109 | return COMMON_TABLE_LOOKUP; | |
110 | } | |
111 | ||
112 | static void __init | |
113 | sx164_init_pci(void) | |
114 | { | |
115 | cia_init_pci(); | |
116 | SMC669_Init(0); | |
117 | } | |
118 | ||
119 | static void __init | |
120 | sx164_init_arch(void) | |
121 | { | |
122 | /* | |
123 | * OSF palcode v1.23 forgets to enable PCA56 Motion Video | |
124 | * Instructions. Let's enable it. | |
125 | * We have to check palcode revision because CSERVE interface | |
126 | * is subject to change without notice. For example, it | |
127 | * has been changed completely since v1.16 (found in MILO | |
128 | * distribution). -ink | |
129 | */ | |
130 | struct percpu_struct *cpu = (struct percpu_struct*) | |
131 | ((char*)hwrpb + hwrpb->processor_offset); | |
132 | ||
133 | if (amask(AMASK_MAX) != 0 | |
134 | && alpha_using_srm | |
7fc1a1ab | 135 | && (cpu->pal_revision & 0xffff) <= 0x117) { |
1da177e4 LT |
136 | __asm__ __volatile__( |
137 | "lda $16,8($31)\n" | |
138 | "call_pal 9\n" /* Allow PALRES insns in kernel mode */ | |
139 | ".long 0x64000118\n\n" /* hw_mfpr $0,icsr */ | |
140 | "ldah $16,(1<<(19-16))($31)\n" | |
141 | "or $0,$16,$0\n" /* set MVE bit */ | |
142 | ".long 0x74000118\n" /* hw_mtpr $0,icsr */ | |
143 | "lda $16,9($31)\n" | |
144 | "call_pal 9" /* Disable PALRES insns */ | |
145 | : : : "$0", "$16"); | |
146 | printk("PCA56 MVI set enabled\n"); | |
147 | } | |
148 | ||
149 | pyxis_init_arch(); | |
150 | } | |
151 | ||
152 | /* | |
153 | * The System Vector | |
154 | */ | |
155 | ||
156 | struct alpha_machine_vector sx164_mv __initmv = { | |
157 | .vector_name = "SX164", | |
158 | DO_EV5_MMU, | |
159 | DO_DEFAULT_RTC, | |
160 | DO_PYXIS_IO, | |
161 | .machine_check = cia_machine_check, | |
162 | .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS, | |
163 | .min_io_address = DEFAULT_IO_BASE, | |
164 | .min_mem_address = DEFAULT_MEM_BASE, | |
165 | .pci_dac_offset = PYXIS_DAC_OFFSET, | |
166 | ||
167 | .nr_irqs = 48, | |
168 | .device_interrupt = pyxis_device_interrupt, | |
169 | ||
170 | .init_arch = sx164_init_arch, | |
171 | .init_irq = sx164_init_irq, | |
172 | .init_rtc = common_init_rtc, | |
173 | .init_pci = sx164_init_pci, | |
174 | .kill_arch = cia_kill_arch, | |
175 | .pci_map_irq = sx164_map_irq, | |
176 | .pci_swizzle = common_swizzle, | |
177 | }; | |
178 | ALIAS_MV(sx164) |