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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
4adeefe1 | 11 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
12 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
13 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
14 | select GENERIC_ATOMIC64 | |
15 | select GENERIC_CLOCKEVENTS | |
16 | select GENERIC_FIND_FIRST_BIT | |
17 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
18 | select GENERIC_IRQ_SHOW | |
19 | select GENERIC_PENDING_IRQ if SMP | |
20 | select GENERIC_SMP_IDLE_THREAD | |
f46121bd | 21 | select HAVE_ARCH_KGDB |
547f1125 | 22 | select HAVE_ARCH_TRACEHOOK |
4368902b | 23 | select HAVE_IOREMAP_PROT |
4d86dfbb VG |
24 | select HAVE_KPROBES |
25 | select HAVE_KRETPROBES | |
c121c506 | 26 | select HAVE_MEMBLOCK |
854a0d95 | 27 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 28 | select HAVE_OPROFILE |
9c57564e | 29 | select HAVE_PERF_EVENTS |
999159a5 | 30 | select IRQ_DOMAIN |
cfdbc2e1 | 31 | select MODULES_USE_ELF_RELA |
c121c506 | 32 | select NO_BOOTMEM |
999159a5 VG |
33 | select OF |
34 | select OF_EARLY_FLATTREE | |
9c57564e | 35 | select PERF_USE_VMALLOC |
d1a1dc0b | 36 | select HAVE_DEBUG_STACKOVERFLOW |
cfdbc2e1 | 37 | |
0dafafc3 VG |
38 | config TRACE_IRQFLAGS_SUPPORT |
39 | def_bool y | |
40 | ||
41 | config LOCKDEP_SUPPORT | |
42 | def_bool y | |
43 | ||
cfdbc2e1 VG |
44 | config SCHED_OMIT_FRAME_POINTER |
45 | def_bool y | |
46 | ||
47 | config GENERIC_CSUM | |
48 | def_bool y | |
49 | ||
50 | config RWSEM_GENERIC_SPINLOCK | |
51 | def_bool y | |
52 | ||
53 | config ARCH_FLATMEM_ENABLE | |
54 | def_bool y | |
55 | ||
56 | config MMU | |
57 | def_bool y | |
58 | ||
59 | config NO_IOPORT | |
60 | def_bool y | |
61 | ||
62 | config GENERIC_CALIBRATE_DELAY | |
63 | def_bool y | |
64 | ||
65 | config GENERIC_HWEIGHT | |
66 | def_bool y | |
67 | ||
44c8bb91 VG |
68 | config STACKTRACE_SUPPORT |
69 | def_bool y | |
70 | select STACKTRACE | |
71 | ||
cfdbc2e1 VG |
72 | config HAVE_LATENCYTOP_SUPPORT |
73 | def_bool y | |
74 | ||
75 | config NO_DMA | |
76 | def_bool n | |
77 | ||
78 | source "init/Kconfig" | |
79 | source "kernel/Kconfig.freezer" | |
80 | ||
81 | menu "ARC Architecture Configuration" | |
82 | ||
93ad700d | 83 | menu "ARC Platform/SoC/Board" |
cfdbc2e1 | 84 | |
93ad700d | 85 | source "arch/arc/plat-arcfpga/Kconfig" |
072eb693 | 86 | source "arch/arc/plat-tb10x/Kconfig" |
cfdbc2e1 | 87 | #New platform adds here |
93ad700d | 88 | |
53d98958 | 89 | endmenu |
cfdbc2e1 VG |
90 | |
91 | menu "ARC CPU Configuration" | |
92 | ||
93 | choice | |
94 | prompt "ARC Core" | |
95 | default ARC_CPU_770 | |
96 | ||
97 | config ARC_CPU_750D | |
98 | bool "ARC750D" | |
99 | help | |
100 | Support for ARC750 core | |
101 | ||
102 | config ARC_CPU_770 | |
103 | bool "ARC770" | |
104 | select ARC_CPU_REL_4_10 | |
105 | help | |
106 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
107 | This core has a bunch of cool new features: | |
108 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
109 | Shared Address Spaces (for sharing TLB entires in MMU) | |
110 | -Caches: New Prog Model, Region Flush | |
111 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
112 | ||
113 | endchoice | |
114 | ||
115 | config CPU_BIG_ENDIAN | |
116 | bool "Enable Big Endian Mode" | |
117 | default n | |
118 | help | |
119 | Build kernel for Big Endian Mode of ARC CPU | |
120 | ||
fc7943d2 VG |
121 | # If a platform can't work with 0x8000_0000 based dma_addr_t |
122 | config ARC_PLAT_NEEDS_CPU_TO_DMA | |
123 | bool | |
124 | ||
41195d23 VG |
125 | config SMP |
126 | bool "Symmetric Multi-Processing (Incomplete)" | |
127 | default n | |
128 | select USE_GENERIC_SMP_HELPERS | |
129 | help | |
130 | This enables support for systems with more than one CPU. If you have | |
131 | a system with only one CPU, like most personal computers, say N. If | |
132 | you have a system with more than one CPU, say Y. | |
133 | ||
134 | if SMP | |
135 | ||
136 | config ARC_HAS_COH_CACHES | |
137 | def_bool n | |
138 | ||
41195d23 VG |
139 | config ARC_HAS_COH_RTSC |
140 | def_bool n | |
141 | ||
142 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
143 | def_bool n | |
144 | ||
145 | endif | |
146 | ||
147 | config NR_CPUS | |
148 | int "Maximum number of CPUs (2-32)" | |
149 | range 2 32 | |
150 | depends on SMP | |
151 | default "2" | |
152 | ||
cfdbc2e1 VG |
153 | menuconfig ARC_CACHE |
154 | bool "Enable Cache Support" | |
155 | default y | |
41195d23 VG |
156 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
157 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
158 | |
159 | if ARC_CACHE | |
160 | ||
161 | config ARC_CACHE_LINE_SHIFT | |
162 | int "Cache Line Length (as power of 2)" | |
163 | range 5 7 | |
164 | default "6" | |
165 | help | |
166 | Starting with ARC700 4.9, Cache line length is configurable, | |
167 | This option specifies "N", with Line-len = 2 power N | |
168 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
169 | Linux only supports same line lengths for I and D caches. | |
170 | ||
171 | config ARC_HAS_ICACHE | |
172 | bool "Use Instruction Cache" | |
173 | default y | |
174 | ||
175 | config ARC_HAS_DCACHE | |
176 | bool "Use Data Cache" | |
177 | default y | |
178 | ||
179 | config ARC_CACHE_PAGES | |
180 | bool "Per Page Cache Control" | |
181 | default y | |
182 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
183 | help | |
184 | This can be used to over-ride the global I/D Cache Enable on a | |
185 | per-page basis (but only for pages accessed via MMU such as | |
186 | Kernel Virtual address or User Virtual Address) | |
187 | TLB entries have a per-page Cache Enable Bit. | |
188 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
189 | Global DISABLE + Per Page ENABLE won't work | |
190 | ||
4102b533 VG |
191 | config ARC_CACHE_VIPT_ALIASING |
192 | bool "Support VIPT Aliasing D$" | |
2f9e9961 | 193 | depends on ARC_HAS_DCACHE |
4102b533 VG |
194 | default n |
195 | ||
cfdbc2e1 VG |
196 | endif #ARC_CACHE |
197 | ||
8b5850f8 VG |
198 | config ARC_HAS_ICCM |
199 | bool "Use ICCM" | |
200 | help | |
201 | Single Cycle RAMS to store Fast Path Code | |
202 | default n | |
203 | ||
204 | config ARC_ICCM_SZ | |
205 | int "ICCM Size in KB" | |
206 | default "64" | |
207 | depends on ARC_HAS_ICCM | |
208 | ||
209 | config ARC_HAS_DCCM | |
210 | bool "Use DCCM" | |
211 | help | |
212 | Single Cycle RAMS to store Fast Path Data | |
213 | default n | |
214 | ||
215 | config ARC_DCCM_SZ | |
216 | int "DCCM Size in KB" | |
217 | default "64" | |
218 | depends on ARC_HAS_DCCM | |
219 | ||
220 | config ARC_DCCM_BASE | |
221 | hex "DCCM map address" | |
222 | default "0xA0000000" | |
223 | depends on ARC_HAS_DCCM | |
224 | ||
cfdbc2e1 VG |
225 | config ARC_HAS_HW_MPY |
226 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
227 | default y | |
228 | help | |
229 | Influences how gcc generates code for MPY operations. | |
230 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
231 | Multipler. Otherwise software multipy lib is used | |
232 | ||
233 | choice | |
234 | prompt "ARC700 MMU Version" | |
235 | default ARC_MMU_V3 if ARC_CPU_770 | |
236 | default ARC_MMU_V2 if ARC_CPU_750D | |
237 | ||
238 | config ARC_MMU_V1 | |
239 | bool "MMU v1" | |
240 | help | |
241 | Orig ARC700 MMU | |
242 | ||
243 | config ARC_MMU_V2 | |
244 | bool "MMU v2" | |
245 | help | |
246 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
247 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
248 | ||
249 | config ARC_MMU_V3 | |
250 | bool "MMU v3" | |
251 | depends on ARC_CPU_770 | |
252 | help | |
253 | Introduced with ARC700 4.10: New Features | |
254 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
255 | Shared Address Spaces (SASID) | |
256 | ||
257 | endchoice | |
258 | ||
259 | ||
260 | choice | |
261 | prompt "MMU Page Size" | |
262 | default ARC_PAGE_SIZE_8K | |
263 | ||
264 | config ARC_PAGE_SIZE_8K | |
265 | bool "8KB" | |
266 | help | |
267 | Choose between 8k vs 16k | |
268 | ||
269 | config ARC_PAGE_SIZE_16K | |
270 | bool "16KB" | |
271 | depends on ARC_MMU_V3 | |
272 | ||
273 | config ARC_PAGE_SIZE_4K | |
274 | bool "4KB" | |
275 | depends on ARC_MMU_V3 | |
276 | ||
277 | endchoice | |
278 | ||
4788a594 VG |
279 | config ARC_COMPACT_IRQ_LEVELS |
280 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
281 | default n | |
282 | # Timer HAS to be high priority, for any other high priority config | |
283 | select ARC_IRQ3_LV2 | |
41195d23 VG |
284 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
285 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
286 | |
287 | if ARC_COMPACT_IRQ_LEVELS | |
288 | ||
289 | config ARC_IRQ3_LV2 | |
290 | bool | |
291 | ||
292 | config ARC_IRQ5_LV2 | |
293 | bool | |
294 | ||
295 | config ARC_IRQ6_LV2 | |
296 | bool | |
297 | ||
298 | endif | |
299 | ||
cfdbc2e1 VG |
300 | config ARC_FPU_SAVE_RESTORE |
301 | bool "Enable FPU state persistence across context switch" | |
302 | default n | |
303 | help | |
304 | Double Precision Floating Point unit had dedictaed regs which | |
305 | need to be saved/restored across context-switch. | |
306 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
307 | hardware pieces to allow software to conditionally save/restore, | |
308 | based on actual usage of FPU by a task. Thus our implemn does | |
309 | this for all tasks in system. | |
310 | ||
fbf8e13d VG |
311 | config ARC_CANT_LLSC |
312 | def_bool n | |
313 | ||
cfdbc2e1 VG |
314 | menuconfig ARC_CPU_REL_4_10 |
315 | bool "Enable support for Rel 4.10 features" | |
316 | default n | |
317 | help | |
318 | -ARC770 (and dependent features) enabled | |
319 | -ARC750 also shares some of the new features with 770 | |
320 | ||
321 | config ARC_HAS_LLSC | |
322 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
323 | default y | |
fbf8e13d | 324 | depends on ARC_CPU_770 && !ARC_CANT_LLSC |
cfdbc2e1 VG |
325 | |
326 | config ARC_HAS_SWAPE | |
327 | bool "Insn: SWAPE (endian-swap)" | |
328 | default y | |
329 | depends on ARC_CPU_REL_4_10 | |
330 | ||
331 | config ARC_HAS_RTSC | |
332 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
333 | default y | |
334 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
335 | # if SMP, enable RTSC only if counter is coherent across cores |
336 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
337 | |
338 | endmenu # "ARC CPU Configuration" | |
339 | ||
cfdbc2e1 VG |
340 | config LINUX_LINK_BASE |
341 | hex "Linux Link Address" | |
342 | default "0x80000000" | |
343 | help | |
344 | ARC700 divides the 32 bit phy address space into two equal halves | |
345 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
346 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
347 | Typically Linux kernel is linked at the start of untransalted addr, | |
348 | hence the default value of 0x8zs. | |
349 | However some customers have peripherals mapped at this addr, so | |
350 | Linux needs to be scooted a bit. | |
351 | If you don't know what the above means, leave this setting alone. | |
352 | ||
080c3747 VG |
353 | config ARC_CURR_IN_REG |
354 | bool "Dedicate Register r25 for current_task pointer" | |
355 | default y | |
356 | help | |
357 | This reserved Register R25 to point to Current Task in | |
358 | kernel mode. This saves memory access for each such access | |
359 | ||
2e651ea1 VG |
360 | |
361 | config ARC_MISALIGN_ACCESS | |
362 | bool "Emulate unaligned memory access (userspace only)" | |
363 | default N | |
364 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
365 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
366 | help | |
367 | This enables misaligned 16 & 32 bit memory access from user space. | |
368 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
369 | potential bugs in code | |
370 | ||
cfdbc2e1 VG |
371 | config HZ |
372 | int "Timer Frequency" | |
373 | default 100 | |
374 | ||
cbe056f7 VG |
375 | config ARC_METAWARE_HLINK |
376 | bool "Support for Metaware debugger assisted Host access" | |
377 | default n | |
378 | help | |
379 | This options allows a Linux userland apps to directly access | |
380 | host file system (open/creat/read/write etc) with help from | |
381 | Metaware Debugger. This can come in handy for Linux-host communication | |
382 | when there is no real usable peripheral such as EMAC. | |
383 | ||
cfdbc2e1 VG |
384 | menuconfig ARC_DBG |
385 | bool "ARC debugging" | |
386 | default y | |
387 | ||
854a0d95 VG |
388 | config ARC_DW2_UNWIND |
389 | bool "Enable DWARF specific kernel stack unwind" | |
390 | depends on ARC_DBG | |
391 | default y | |
392 | select KALLSYMS | |
393 | help | |
394 | Compiles the kernel with DWARF unwind information and can be used | |
395 | to get stack backtraces. | |
396 | ||
397 | If you say Y here the resulting kernel image will be slightly larger | |
398 | but not slower, and it will give very useful debugging information. | |
399 | If you don't debug the kernel, you can say N, but we may not be able | |
400 | to solve problems without frame unwind information | |
401 | ||
cfdbc2e1 VG |
402 | config ARC_DBG_TLB_PARANOIA |
403 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 404 | depends on ARC_DBG |
cfdbc2e1 VG |
405 | default n |
406 | ||
407 | config ARC_DBG_TLB_MISS_COUNT | |
408 | bool "Profile TLB Misses" | |
409 | default n | |
410 | select DEBUG_FS | |
411 | depends on ARC_DBG | |
412 | help | |
413 | Counts number of I and D TLB Misses and exports them via Debugfs | |
414 | The counters can be cleared via Debugfs as well | |
415 | ||
cfdbc2e1 VG |
416 | config CMDLINE_UBOOT |
417 | bool "Support U-boot kernel command line passing" | |
418 | default n | |
419 | help | |
420 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
421 | command line from the U-boot environment to the Linux kernel then | |
422 | switch this option on. | |
423 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
6971881f VG |
424 | to it. kernel startup code will append this to DeviceTree |
425 | /bootargs provided cmdline args. | |
cfdbc2e1 | 426 | |
999159a5 VG |
427 | config ARC_BUILTIN_DTB_NAME |
428 | string "Built in DTB" | |
429 | help | |
430 | Set the name of the DTB to embed in the vmlinux binary | |
431 | Leaving it blank selects the minimal "skeleton" dtb | |
432 | ||
cfdbc2e1 VG |
433 | source "kernel/Kconfig.preempt" |
434 | ||
5628832f VG |
435 | menu "Executable file formats" |
436 | source "fs/Kconfig.binfmt" | |
437 | endmenu | |
438 | ||
cfdbc2e1 VG |
439 | endmenu # "ARC Architecture Configuration" |
440 | ||
441 | source "mm/Kconfig" | |
442 | source "net/Kconfig" | |
443 | source "drivers/Kconfig" | |
444 | source "fs/Kconfig" | |
445 | source "arch/arc/Kconfig.debug" | |
446 | source "security/Kconfig" | |
447 | source "crypto/Kconfig" | |
448 | source "lib/Kconfig" |