Linux 3.18-rc3
[deliverable/linux.git] / arch / arc / Kconfig
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1#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
f06d19e4 11 select BUILDTIME_EXTABLE_SORT
d7f8a085 12 select COMMON_CLK
4adeefe1 13 select CLONE_BACKWARDS
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14 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
15 select DEVTMPFS if !INITRAMFS_SOURCE=""
16 select GENERIC_ATOMIC64
17 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
21 select GENERIC_PENDING_IRQ if SMP
22 select GENERIC_SMP_IDLE_THREAD
f46121bd 23 select HAVE_ARCH_KGDB
547f1125 24 select HAVE_ARCH_TRACEHOOK
4368902b 25 select HAVE_IOREMAP_PROT
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26 select HAVE_KPROBES
27 select HAVE_KRETPROBES
c121c506 28 select HAVE_MEMBLOCK
854a0d95 29 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
769bc1fd 30 select HAVE_OPROFILE
9c57564e 31 select HAVE_PERF_EVENTS
999159a5 32 select IRQ_DOMAIN
cfdbc2e1 33 select MODULES_USE_ELF_RELA
c121c506 34 select NO_BOOTMEM
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35 select OF
36 select OF_EARLY_FLATTREE
9c57564e 37 select PERF_USE_VMALLOC
d1a1dc0b 38 select HAVE_DEBUG_STACKOVERFLOW
cfdbc2e1 39
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40config TRACE_IRQFLAGS_SUPPORT
41 def_bool y
42
43config LOCKDEP_SUPPORT
44 def_bool y
45
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46config SCHED_OMIT_FRAME_POINTER
47 def_bool y
48
49config GENERIC_CSUM
50 def_bool y
51
52config RWSEM_GENERIC_SPINLOCK
53 def_bool y
54
55config ARCH_FLATMEM_ENABLE
56 def_bool y
57
58config MMU
59 def_bool y
60
ce816fa8 61config NO_IOPORT_MAP
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62 def_bool y
63
64config GENERIC_CALIBRATE_DELAY
65 def_bool y
66
67config GENERIC_HWEIGHT
68 def_bool y
69
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70config STACKTRACE_SUPPORT
71 def_bool y
72 select STACKTRACE
73
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74config HAVE_LATENCYTOP_SUPPORT
75 def_bool y
76
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77source "init/Kconfig"
78source "kernel/Kconfig.freezer"
79
80menu "ARC Architecture Configuration"
81
93ad700d 82menu "ARC Platform/SoC/Board"
cfdbc2e1 83
93ad700d 84source "arch/arc/plat-arcfpga/Kconfig"
072eb693 85source "arch/arc/plat-tb10x/Kconfig"
cfdbc2e1 86#New platform adds here
93ad700d 87
53d98958 88endmenu
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89
90menu "ARC CPU Configuration"
91
92choice
93 prompt "ARC Core"
94 default ARC_CPU_770
95
96config ARC_CPU_750D
97 bool "ARC750D"
98 help
99 Support for ARC750 core
100
101config ARC_CPU_770
102 bool "ARC770"
103 select ARC_CPU_REL_4_10
104 help
105 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
106 This core has a bunch of cool new features:
107 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
108 Shared Address Spaces (for sharing TLB entires in MMU)
109 -Caches: New Prog Model, Region Flush
110 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
111
112endchoice
113
114config CPU_BIG_ENDIAN
115 bool "Enable Big Endian Mode"
116 default n
117 help
118 Build kernel for Big Endian Mode of ARC CPU
119
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120# If a platform can't work with 0x8000_0000 based dma_addr_t
121config ARC_PLAT_NEEDS_CPU_TO_DMA
122 bool
123
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124config SMP
125 bool "Symmetric Multi-Processing (Incomplete)"
126 default n
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127 help
128 This enables support for systems with more than one CPU. If you have
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129 a system with only one CPU, say N. If you have a system with more
130 than one CPU, say Y.
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131
132if SMP
133
134config ARC_HAS_COH_CACHES
135 def_bool n
136
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137config ARC_HAS_REENTRANT_IRQ_LV2
138 def_bool n
139
140endif
141
142config NR_CPUS
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143 int "Maximum number of CPUs (2-4096)"
144 range 2 4096
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145 depends on SMP
146 default "2"
147
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148menuconfig ARC_CACHE
149 bool "Enable Cache Support"
150 default y
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151 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
152 depends on !SMP || ARC_HAS_COH_CACHES
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153
154if ARC_CACHE
155
156config ARC_CACHE_LINE_SHIFT
157 int "Cache Line Length (as power of 2)"
158 range 5 7
159 default "6"
160 help
161 Starting with ARC700 4.9, Cache line length is configurable,
162 This option specifies "N", with Line-len = 2 power N
163 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
164 Linux only supports same line lengths for I and D caches.
165
166config ARC_HAS_ICACHE
167 bool "Use Instruction Cache"
168 default y
169
170config ARC_HAS_DCACHE
171 bool "Use Data Cache"
172 default y
173
174config ARC_CACHE_PAGES
175 bool "Per Page Cache Control"
176 default y
177 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
178 help
179 This can be used to over-ride the global I/D Cache Enable on a
180 per-page basis (but only for pages accessed via MMU such as
181 Kernel Virtual address or User Virtual Address)
182 TLB entries have a per-page Cache Enable Bit.
183 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
184 Global DISABLE + Per Page ENABLE won't work
185
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186config ARC_CACHE_VIPT_ALIASING
187 bool "Support VIPT Aliasing D$"
2f9e9961 188 depends on ARC_HAS_DCACHE
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189 default n
190
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191endif #ARC_CACHE
192
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193config ARC_HAS_ICCM
194 bool "Use ICCM"
195 help
196 Single Cycle RAMS to store Fast Path Code
197 default n
198
199config ARC_ICCM_SZ
200 int "ICCM Size in KB"
201 default "64"
202 depends on ARC_HAS_ICCM
203
204config ARC_HAS_DCCM
205 bool "Use DCCM"
206 help
207 Single Cycle RAMS to store Fast Path Data
208 default n
209
210config ARC_DCCM_SZ
211 int "DCCM Size in KB"
212 default "64"
213 depends on ARC_HAS_DCCM
214
215config ARC_DCCM_BASE
216 hex "DCCM map address"
217 default "0xA0000000"
218 depends on ARC_HAS_DCCM
219
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220config ARC_HAS_HW_MPY
221 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
222 default y
223 help
224 Influences how gcc generates code for MPY operations.
225 If enabled, MPYxx insns are generated, provided by Standard/XMAC
226 Multipler. Otherwise software multipy lib is used
227
228choice
229 prompt "ARC700 MMU Version"
230 default ARC_MMU_V3 if ARC_CPU_770
231 default ARC_MMU_V2 if ARC_CPU_750D
232
233config ARC_MMU_V1
234 bool "MMU v1"
235 help
236 Orig ARC700 MMU
237
238config ARC_MMU_V2
239 bool "MMU v2"
240 help
241 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
242 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
243
244config ARC_MMU_V3
245 bool "MMU v3"
246 depends on ARC_CPU_770
247 help
248 Introduced with ARC700 4.10: New Features
249 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
250 Shared Address Spaces (SASID)
251
252endchoice
253
254
255choice
256 prompt "MMU Page Size"
257 default ARC_PAGE_SIZE_8K
258
259config ARC_PAGE_SIZE_8K
260 bool "8KB"
261 help
262 Choose between 8k vs 16k
263
264config ARC_PAGE_SIZE_16K
265 bool "16KB"
266 depends on ARC_MMU_V3
267
268config ARC_PAGE_SIZE_4K
269 bool "4KB"
270 depends on ARC_MMU_V3
271
272endchoice
273
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274config ARC_COMPACT_IRQ_LEVELS
275 bool "ARCompact IRQ Priorities: High(2)/Low(1)"
276 default n
277 # Timer HAS to be high priority, for any other high priority config
278 select ARC_IRQ3_LV2
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279 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
280 depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
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281
282if ARC_COMPACT_IRQ_LEVELS
283
284config ARC_IRQ3_LV2
285 bool
286
287config ARC_IRQ5_LV2
288 bool
289
290config ARC_IRQ6_LV2
291 bool
292
293endif
294
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295config ARC_FPU_SAVE_RESTORE
296 bool "Enable FPU state persistence across context switch"
297 default n
298 help
299 Double Precision Floating Point unit had dedictaed regs which
300 need to be saved/restored across context-switch.
301 Note that ARC FPU is overly simplistic, unlike say x86, which has
302 hardware pieces to allow software to conditionally save/restore,
303 based on actual usage of FPU by a task. Thus our implemn does
304 this for all tasks in system.
305
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306config ARC_CANT_LLSC
307 def_bool n
308
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309menuconfig ARC_CPU_REL_4_10
310 bool "Enable support for Rel 4.10 features"
311 default n
312 help
313 -ARC770 (and dependent features) enabled
314 -ARC750 also shares some of the new features with 770
315
316config ARC_HAS_LLSC
317 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
318 default y
fbf8e13d 319 depends on ARC_CPU_770 && !ARC_CANT_LLSC
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320
321config ARC_HAS_SWAPE
322 bool "Insn: SWAPE (endian-swap)"
323 default y
324 depends on ARC_CPU_REL_4_10
325
326config ARC_HAS_RTSC
327 bool "Insn: RTSC (64-bit r/o cycle counter)"
328 default y
329 depends on ARC_CPU_REL_4_10
7d0857a5 330 depends on !SMP
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331
332endmenu # "ARC CPU Configuration"
333
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334config LINUX_LINK_BASE
335 hex "Linux Link Address"
336 default "0x80000000"
337 help
338 ARC700 divides the 32 bit phy address space into two equal halves
339 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
340 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
341 Typically Linux kernel is linked at the start of untransalted addr,
342 hence the default value of 0x8zs.
343 However some customers have peripherals mapped at this addr, so
344 Linux needs to be scooted a bit.
345 If you don't know what the above means, leave this setting alone.
346
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347config ARC_CURR_IN_REG
348 bool "Dedicate Register r25 for current_task pointer"
349 default y
350 help
351 This reserved Register R25 to point to Current Task in
352 kernel mode. This saves memory access for each such access
353
2e651ea1 354
1736a56f 355config ARC_EMUL_UNALIGNED
2e651ea1 356 bool "Emulate unaligned memory access (userspace only)"
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357 select SYSCTL_ARCH_UNALIGN_NO_WARN
358 select SYSCTL_ARCH_UNALIGN_ALLOW
359 help
360 This enables misaligned 16 & 32 bit memory access from user space.
361 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
362 potential bugs in code
363
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364config HZ
365 int "Timer Frequency"
366 default 100
367
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368config ARC_METAWARE_HLINK
369 bool "Support for Metaware debugger assisted Host access"
370 default n
371 help
372 This options allows a Linux userland apps to directly access
373 host file system (open/creat/read/write etc) with help from
374 Metaware Debugger. This can come in handy for Linux-host communication
375 when there is no real usable peripheral such as EMAC.
376
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377menuconfig ARC_DBG
378 bool "ARC debugging"
379 default y
380
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381config ARC_DW2_UNWIND
382 bool "Enable DWARF specific kernel stack unwind"
383 depends on ARC_DBG
384 default y
385 select KALLSYMS
386 help
387 Compiles the kernel with DWARF unwind information and can be used
388 to get stack backtraces.
389
390 If you say Y here the resulting kernel image will be slightly larger
391 but not slower, and it will give very useful debugging information.
392 If you don't debug the kernel, you can say N, but we may not be able
393 to solve problems without frame unwind information
394
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395config ARC_DBG_TLB_PARANOIA
396 bool "Paranoia Checks in Low Level TLB Handlers"
f46121bd 397 depends on ARC_DBG
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398 default n
399
400config ARC_DBG_TLB_MISS_COUNT
401 bool "Profile TLB Misses"
402 default n
403 select DEBUG_FS
404 depends on ARC_DBG
405 help
406 Counts number of I and D TLB Misses and exports them via Debugfs
407 The counters can be cleared via Debugfs as well
408
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409config ARC_BUILTIN_DTB_NAME
410 string "Built in DTB"
411 help
412 Set the name of the DTB to embed in the vmlinux binary
413 Leaving it blank selects the minimal "skeleton" dtb
414
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415source "kernel/Kconfig.preempt"
416
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417menu "Executable file formats"
418source "fs/Kconfig.binfmt"
419endmenu
420
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421endmenu # "ARC Architecture Configuration"
422
423source "mm/Kconfig"
424source "net/Kconfig"
425source "drivers/Kconfig"
426source "fs/Kconfig"
427source "arch/arc/Kconfig.debug"
428source "security/Kconfig"
429source "crypto/Kconfig"
430source "lib/Kconfig"
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