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cfdbc2e1 VG |
1 | # |
2 | # Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) | |
3 | # | |
4 | # This program is free software; you can redistribute it and/or modify | |
5 | # it under the terms of the GNU General Public License version 2 as | |
6 | # published by the Free Software Foundation. | |
7 | # | |
8 | ||
9 | config ARC | |
10 | def_bool y | |
11 | select ARCH_NO_VIRT_TO_BUS | |
4adeefe1 | 12 | select CLONE_BACKWARDS |
cfdbc2e1 VG |
13 | # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev |
14 | select DEVTMPFS if !INITRAMFS_SOURCE="" | |
15 | select GENERIC_ATOMIC64 | |
16 | select GENERIC_CLOCKEVENTS | |
17 | select GENERIC_FIND_FIRST_BIT | |
18 | # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP | |
19 | select GENERIC_IRQ_SHOW | |
bf90e1ea VG |
20 | select GENERIC_KERNEL_EXECVE |
21 | select GENERIC_KERNEL_THREAD | |
cfdbc2e1 | 22 | select GENERIC_PENDING_IRQ if SMP |
c3581039 | 23 | select GENERIC_SIGALTSTACK |
cfdbc2e1 | 24 | select GENERIC_SMP_IDLE_THREAD |
f46121bd | 25 | select HAVE_ARCH_KGDB |
547f1125 | 26 | select HAVE_ARCH_TRACEHOOK |
cfdbc2e1 | 27 | select HAVE_GENERIC_HARDIRQS |
4368902b | 28 | select HAVE_IOREMAP_PROT |
9c57564e | 29 | select HAVE_IRQ_WORK |
4d86dfbb VG |
30 | select HAVE_KPROBES |
31 | select HAVE_KRETPROBES | |
c121c506 | 32 | select HAVE_MEMBLOCK |
854a0d95 | 33 | select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND |
769bc1fd | 34 | select HAVE_OPROFILE |
9c57564e | 35 | select HAVE_PERF_EVENTS |
999159a5 | 36 | select IRQ_DOMAIN |
cfdbc2e1 | 37 | select MODULES_USE_ELF_RELA |
c121c506 | 38 | select NO_BOOTMEM |
999159a5 VG |
39 | select OF |
40 | select OF_EARLY_FLATTREE | |
9c57564e | 41 | select PERF_USE_VMALLOC |
cfdbc2e1 VG |
42 | |
43 | config SCHED_OMIT_FRAME_POINTER | |
44 | def_bool y | |
45 | ||
46 | config GENERIC_CSUM | |
47 | def_bool y | |
48 | ||
49 | config RWSEM_GENERIC_SPINLOCK | |
50 | def_bool y | |
51 | ||
52 | config ARCH_FLATMEM_ENABLE | |
53 | def_bool y | |
54 | ||
55 | config MMU | |
56 | def_bool y | |
57 | ||
58 | config NO_IOPORT | |
59 | def_bool y | |
60 | ||
61 | config GENERIC_CALIBRATE_DELAY | |
62 | def_bool y | |
63 | ||
64 | config GENERIC_HWEIGHT | |
65 | def_bool y | |
66 | ||
67 | config BINFMT_ELF | |
68 | def_bool y | |
69 | ||
44c8bb91 VG |
70 | config STACKTRACE_SUPPORT |
71 | def_bool y | |
72 | select STACKTRACE | |
73 | ||
cfdbc2e1 VG |
74 | config HAVE_LATENCYTOP_SUPPORT |
75 | def_bool y | |
76 | ||
77 | config NO_DMA | |
78 | def_bool n | |
79 | ||
80 | source "init/Kconfig" | |
81 | source "kernel/Kconfig.freezer" | |
82 | ||
83 | menu "ARC Architecture Configuration" | |
84 | ||
53d98958 | 85 | menu "ARC Platform/SoC" |
cfdbc2e1 VG |
86 | |
87 | config ARC_PLAT_FPGA_LEGACY | |
88 | bool "\"Legacy\" ARC FPGA dev platform" | |
89 | help | |
90 | Support for ARC development platforms, provided by Synopsys. | |
91 | These are based on FPGA or ISS. e.g. | |
92 | - ARCAngel4 | |
93 | - ML509 | |
94 | - MetaWare ISS | |
95 | ||
96 | #New platform adds here | |
53d98958 | 97 | endmenu |
cfdbc2e1 VG |
98 | |
99 | menu "ARC CPU Configuration" | |
100 | ||
101 | choice | |
102 | prompt "ARC Core" | |
103 | default ARC_CPU_770 | |
104 | ||
105 | config ARC_CPU_750D | |
106 | bool "ARC750D" | |
107 | help | |
108 | Support for ARC750 core | |
109 | ||
110 | config ARC_CPU_770 | |
111 | bool "ARC770" | |
112 | select ARC_CPU_REL_4_10 | |
113 | help | |
114 | Support for ARC770 core introduced with Rel 4.10 (Summer 2011) | |
115 | This core has a bunch of cool new features: | |
116 | -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4) | |
117 | Shared Address Spaces (for sharing TLB entires in MMU) | |
118 | -Caches: New Prog Model, Region Flush | |
119 | -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr | |
120 | ||
121 | endchoice | |
122 | ||
123 | config CPU_BIG_ENDIAN | |
124 | bool "Enable Big Endian Mode" | |
125 | default n | |
126 | help | |
127 | Build kernel for Big Endian Mode of ARC CPU | |
128 | ||
41195d23 VG |
129 | config SMP |
130 | bool "Symmetric Multi-Processing (Incomplete)" | |
131 | default n | |
132 | select USE_GENERIC_SMP_HELPERS | |
133 | help | |
134 | This enables support for systems with more than one CPU. If you have | |
135 | a system with only one CPU, like most personal computers, say N. If | |
136 | you have a system with more than one CPU, say Y. | |
137 | ||
138 | if SMP | |
139 | ||
140 | config ARC_HAS_COH_CACHES | |
141 | def_bool n | |
142 | ||
143 | config ARC_HAS_COH_LLSC | |
144 | def_bool n | |
145 | ||
146 | config ARC_HAS_COH_RTSC | |
147 | def_bool n | |
148 | ||
149 | config ARC_HAS_REENTRANT_IRQ_LV2 | |
150 | def_bool n | |
151 | ||
152 | endif | |
153 | ||
154 | config NR_CPUS | |
155 | int "Maximum number of CPUs (2-32)" | |
156 | range 2 32 | |
157 | depends on SMP | |
158 | default "2" | |
159 | ||
cfdbc2e1 VG |
160 | menuconfig ARC_CACHE |
161 | bool "Enable Cache Support" | |
162 | default y | |
41195d23 VG |
163 | # if SMP, cache enabled ONLY if ARC implementation has cache coherency |
164 | depends on !SMP || ARC_HAS_COH_CACHES | |
cfdbc2e1 VG |
165 | |
166 | if ARC_CACHE | |
167 | ||
168 | config ARC_CACHE_LINE_SHIFT | |
169 | int "Cache Line Length (as power of 2)" | |
170 | range 5 7 | |
171 | default "6" | |
172 | help | |
173 | Starting with ARC700 4.9, Cache line length is configurable, | |
174 | This option specifies "N", with Line-len = 2 power N | |
175 | So line lengths of 32, 64, 128 are specified by 5,6,7, respectively | |
176 | Linux only supports same line lengths for I and D caches. | |
177 | ||
178 | config ARC_HAS_ICACHE | |
179 | bool "Use Instruction Cache" | |
180 | default y | |
181 | ||
182 | config ARC_HAS_DCACHE | |
183 | bool "Use Data Cache" | |
184 | default y | |
185 | ||
186 | config ARC_CACHE_PAGES | |
187 | bool "Per Page Cache Control" | |
188 | default y | |
189 | depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE | |
190 | help | |
191 | This can be used to over-ride the global I/D Cache Enable on a | |
192 | per-page basis (but only for pages accessed via MMU such as | |
193 | Kernel Virtual address or User Virtual Address) | |
194 | TLB entries have a per-page Cache Enable Bit. | |
195 | Note that Global I/D ENABLE + Per Page DISABLE works but corollary | |
196 | Global DISABLE + Per Page ENABLE won't work | |
197 | ||
198 | endif #ARC_CACHE | |
199 | ||
8b5850f8 VG |
200 | config ARC_HAS_ICCM |
201 | bool "Use ICCM" | |
202 | help | |
203 | Single Cycle RAMS to store Fast Path Code | |
204 | default n | |
205 | ||
206 | config ARC_ICCM_SZ | |
207 | int "ICCM Size in KB" | |
208 | default "64" | |
209 | depends on ARC_HAS_ICCM | |
210 | ||
211 | config ARC_HAS_DCCM | |
212 | bool "Use DCCM" | |
213 | help | |
214 | Single Cycle RAMS to store Fast Path Data | |
215 | default n | |
216 | ||
217 | config ARC_DCCM_SZ | |
218 | int "DCCM Size in KB" | |
219 | default "64" | |
220 | depends on ARC_HAS_DCCM | |
221 | ||
222 | config ARC_DCCM_BASE | |
223 | hex "DCCM map address" | |
224 | default "0xA0000000" | |
225 | depends on ARC_HAS_DCCM | |
226 | ||
cfdbc2e1 VG |
227 | config ARC_HAS_HW_MPY |
228 | bool "Use Hardware Multiplier (Normal or Faster XMAC)" | |
229 | default y | |
230 | help | |
231 | Influences how gcc generates code for MPY operations. | |
232 | If enabled, MPYxx insns are generated, provided by Standard/XMAC | |
233 | Multipler. Otherwise software multipy lib is used | |
234 | ||
235 | choice | |
236 | prompt "ARC700 MMU Version" | |
237 | default ARC_MMU_V3 if ARC_CPU_770 | |
238 | default ARC_MMU_V2 if ARC_CPU_750D | |
239 | ||
240 | config ARC_MMU_V1 | |
241 | bool "MMU v1" | |
242 | help | |
243 | Orig ARC700 MMU | |
244 | ||
245 | config ARC_MMU_V2 | |
246 | bool "MMU v2" | |
247 | help | |
248 | Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio | |
249 | when 2 D-TLB and 1 I-TLB entries index into same 2way set. | |
250 | ||
251 | config ARC_MMU_V3 | |
252 | bool "MMU v3" | |
253 | depends on ARC_CPU_770 | |
254 | help | |
255 | Introduced with ARC700 4.10: New Features | |
256 | Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) | |
257 | Shared Address Spaces (SASID) | |
258 | ||
259 | endchoice | |
260 | ||
261 | ||
262 | choice | |
263 | prompt "MMU Page Size" | |
264 | default ARC_PAGE_SIZE_8K | |
265 | ||
266 | config ARC_PAGE_SIZE_8K | |
267 | bool "8KB" | |
268 | help | |
269 | Choose between 8k vs 16k | |
270 | ||
271 | config ARC_PAGE_SIZE_16K | |
272 | bool "16KB" | |
273 | depends on ARC_MMU_V3 | |
274 | ||
275 | config ARC_PAGE_SIZE_4K | |
276 | bool "4KB" | |
277 | depends on ARC_MMU_V3 | |
278 | ||
279 | endchoice | |
280 | ||
4788a594 VG |
281 | config ARC_COMPACT_IRQ_LEVELS |
282 | bool "ARCompact IRQ Priorities: High(2)/Low(1)" | |
283 | default n | |
284 | # Timer HAS to be high priority, for any other high priority config | |
285 | select ARC_IRQ3_LV2 | |
41195d23 VG |
286 | # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy |
287 | depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2 | |
4788a594 VG |
288 | |
289 | if ARC_COMPACT_IRQ_LEVELS | |
290 | ||
291 | config ARC_IRQ3_LV2 | |
292 | bool | |
293 | ||
294 | config ARC_IRQ5_LV2 | |
295 | bool | |
296 | ||
297 | config ARC_IRQ6_LV2 | |
298 | bool | |
299 | ||
300 | endif | |
301 | ||
cfdbc2e1 VG |
302 | config ARC_FPU_SAVE_RESTORE |
303 | bool "Enable FPU state persistence across context switch" | |
304 | default n | |
305 | help | |
306 | Double Precision Floating Point unit had dedictaed regs which | |
307 | need to be saved/restored across context-switch. | |
308 | Note that ARC FPU is overly simplistic, unlike say x86, which has | |
309 | hardware pieces to allow software to conditionally save/restore, | |
310 | based on actual usage of FPU by a task. Thus our implemn does | |
311 | this for all tasks in system. | |
312 | ||
313 | menuconfig ARC_CPU_REL_4_10 | |
314 | bool "Enable support for Rel 4.10 features" | |
315 | default n | |
316 | help | |
317 | -ARC770 (and dependent features) enabled | |
318 | -ARC750 also shares some of the new features with 770 | |
319 | ||
320 | config ARC_HAS_LLSC | |
321 | bool "Insn: LLOCK/SCOND (efficient atomic ops)" | |
322 | default y | |
323 | depends on ARC_CPU_770 | |
324 | # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics | |
325 | depends on !SMP || ARC_HAS_COH_LLSC | |
326 | ||
327 | config ARC_HAS_SWAPE | |
328 | bool "Insn: SWAPE (endian-swap)" | |
329 | default y | |
330 | depends on ARC_CPU_REL_4_10 | |
331 | ||
332 | config ARC_HAS_RTSC | |
333 | bool "Insn: RTSC (64-bit r/o cycle counter)" | |
334 | default y | |
335 | depends on ARC_CPU_REL_4_10 | |
41195d23 VG |
336 | # if SMP, enable RTSC only if counter is coherent across cores |
337 | depends on !SMP || ARC_HAS_COH_RTSC | |
cfdbc2e1 VG |
338 | |
339 | endmenu # "ARC CPU Configuration" | |
340 | ||
341 | menu "Platform Board Configuration" | |
342 | ||
343 | source "arch/arc/plat-arcfpga/Kconfig" | |
344 | ||
345 | #New platform adds here | |
346 | ||
cfdbc2e1 VG |
347 | config LINUX_LINK_BASE |
348 | hex "Linux Link Address" | |
349 | default "0x80000000" | |
350 | help | |
351 | ARC700 divides the 32 bit phy address space into two equal halves | |
352 | -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU | |
353 | -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel | |
354 | Typically Linux kernel is linked at the start of untransalted addr, | |
355 | hence the default value of 0x8zs. | |
356 | However some customers have peripherals mapped at this addr, so | |
357 | Linux needs to be scooted a bit. | |
358 | If you don't know what the above means, leave this setting alone. | |
359 | ||
cfdbc2e1 VG |
360 | endmenu # "Platform Board Configuration" |
361 | ||
080c3747 VG |
362 | config ARC_CURR_IN_REG |
363 | bool "Dedicate Register r25 for current_task pointer" | |
364 | default y | |
365 | help | |
366 | This reserved Register R25 to point to Current Task in | |
367 | kernel mode. This saves memory access for each such access | |
368 | ||
2e651ea1 VG |
369 | |
370 | config ARC_MISALIGN_ACCESS | |
371 | bool "Emulate unaligned memory access (userspace only)" | |
372 | default N | |
373 | select SYSCTL_ARCH_UNALIGN_NO_WARN | |
374 | select SYSCTL_ARCH_UNALIGN_ALLOW | |
375 | help | |
376 | This enables misaligned 16 & 32 bit memory access from user space. | |
377 | Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide | |
378 | potential bugs in code | |
379 | ||
cfdbc2e1 VG |
380 | config ARC_STACK_NONEXEC |
381 | bool "Make stack non-executable" | |
382 | default n | |
383 | help | |
384 | To disable the execute permissions of stack/heap of processes | |
385 | which are enabled by default. | |
386 | ||
387 | config HZ | |
388 | int "Timer Frequency" | |
389 | default 100 | |
390 | ||
cbe056f7 VG |
391 | config ARC_METAWARE_HLINK |
392 | bool "Support for Metaware debugger assisted Host access" | |
393 | default n | |
394 | help | |
395 | This options allows a Linux userland apps to directly access | |
396 | host file system (open/creat/read/write etc) with help from | |
397 | Metaware Debugger. This can come in handy for Linux-host communication | |
398 | when there is no real usable peripheral such as EMAC. | |
399 | ||
cfdbc2e1 VG |
400 | menuconfig ARC_DBG |
401 | bool "ARC debugging" | |
402 | default y | |
403 | ||
854a0d95 VG |
404 | config ARC_DW2_UNWIND |
405 | bool "Enable DWARF specific kernel stack unwind" | |
406 | depends on ARC_DBG | |
407 | default y | |
408 | select KALLSYMS | |
409 | help | |
410 | Compiles the kernel with DWARF unwind information and can be used | |
411 | to get stack backtraces. | |
412 | ||
413 | If you say Y here the resulting kernel image will be slightly larger | |
414 | but not slower, and it will give very useful debugging information. | |
415 | If you don't debug the kernel, you can say N, but we may not be able | |
416 | to solve problems without frame unwind information | |
417 | ||
cfdbc2e1 VG |
418 | config ARC_DBG_TLB_PARANOIA |
419 | bool "Paranoia Checks in Low Level TLB Handlers" | |
f46121bd | 420 | depends on ARC_DBG |
cfdbc2e1 VG |
421 | default n |
422 | ||
423 | config ARC_DBG_TLB_MISS_COUNT | |
424 | bool "Profile TLB Misses" | |
425 | default n | |
426 | select DEBUG_FS | |
427 | depends on ARC_DBG | |
428 | help | |
429 | Counts number of I and D TLB Misses and exports them via Debugfs | |
430 | The counters can be cleared via Debugfs as well | |
431 | ||
432 | config CMDLINE | |
433 | string "Kernel command line to built-in" | |
434 | default "print-fatal-signals=1" | |
435 | help | |
436 | The default command line which will be appended to the optional | |
437 | u-boot provided command line (see below) | |
438 | ||
439 | config CMDLINE_UBOOT | |
440 | bool "Support U-boot kernel command line passing" | |
441 | default n | |
442 | help | |
443 | If you are using U-boot (www.denx.de) and wish to pass the kernel | |
444 | command line from the U-boot environment to the Linux kernel then | |
445 | switch this option on. | |
446 | ARC U-boot will setup the cmdline in RAM/flash and set r2 to point | |
447 | to it. kernel startup code will copy the string into cmdline buffer | |
448 | and also append CONFIG_CMDLINE. | |
449 | ||
999159a5 VG |
450 | config ARC_BUILTIN_DTB_NAME |
451 | string "Built in DTB" | |
452 | help | |
453 | Set the name of the DTB to embed in the vmlinux binary | |
454 | Leaving it blank selects the minimal "skeleton" dtb | |
455 | ||
cfdbc2e1 VG |
456 | source "kernel/Kconfig.preempt" |
457 | ||
458 | endmenu # "ARC Architecture Configuration" | |
459 | ||
460 | source "mm/Kconfig" | |
461 | source "net/Kconfig" | |
462 | source "drivers/Kconfig" | |
463 | source "fs/Kconfig" | |
464 | source "arch/arc/Kconfig.debug" | |
465 | source "security/Kconfig" | |
466 | source "crypto/Kconfig" | |
467 | source "lib/Kconfig" |