projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| a92a5d0d MJ |
1 | /* |
| 2 | * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com) | |
| 3 | * | |
| 4 | * This program is free software; you can redistribute it and/or modify | |
| 5 | * it under the terms of the GNU General Public License version 2 as | |
| 6 | * published by the Free Software Foundation. | |
| 7 | */ | |
| 8 | /dts-v1/; | |
| 9 | ||
| 10 | /include/ "skeleton.dtsi" | |
| 11 | ||
| 12 | / { | |
| 13 | compatible = "snps,nsimosci"; | |
| a92a5d0d MJ |
14 | #address-cells = <1>; |
| 15 | #size-cells = <1>; | |
| 9ba7648c | 16 | interrupt-parent = <&core_intc>; |
| a92a5d0d MJ |
17 | |
| 18 | chosen { | |
| 61fb4bfc VG |
19 | /* this is for console on PGU */ |
| 20 | /* bootargs = "console=tty0 consoleblank=0"; */ | |
| 21 | /* this is for console on serial */ | |
| e8ef060b | 22 | bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug"; |
| a92a5d0d MJ |
23 | }; |
| 24 | ||
| 25 | aliases { | |
| 26 | serial0 = &uart0; | |
| 27 | }; | |
| 28 | ||
| a92a5d0d MJ |
29 | fpga { |
| 30 | compatible = "simple-bus"; | |
| 31 | #address-cells = <1>; | |
| 32 | #size-cells = <1>; | |
| 33 | ||
| 34 | /* child and parent address space 1:1 mapped */ | |
| 35 | ranges; | |
| 36 | ||
| b3d6aba8 VG |
37 | core_clk: core_clk { |
| 38 | #clock-cells = <0>; | |
| 39 | compatible = "fixed-clock"; | |
| 40 | clock-frequency = <20000000>; | |
| 41 | }; | |
| 42 | ||
| 9ba7648c | 43 | core_intc: interrupt-controller { |
| a92a5d0d MJ |
44 | compatible = "snps,arc700-intc"; |
| 45 | interrupt-controller; | |
| 46 | #interrupt-cells = <1>; | |
| 47 | }; | |
| 48 | ||
| e8ef060b | 49 | uart0: serial@f0000000 { |
| 6eda477b | 50 | compatible = "ns8250"; |
| e8ef060b | 51 | reg = <0xf0000000 0x2000>; |
| a92a5d0d | 52 | interrupts = <11>; |
| a92a5d0d MJ |
53 | clock-frequency = <3686400>; |
| 54 | baud = <115200>; | |
| 55 | reg-shift = <2>; | |
| 56 | reg-io-width = <4>; | |
| 6eda477b | 57 | no-loopback-test = <1>; |
| a92a5d0d MJ |
58 | }; |
| 59 | ||
| e8ef060b | 60 | pgu0: pgu@f9000000 { |
| a92a5d0d | 61 | compatible = "snps,arcpgufb"; |
| e8ef060b | 62 | reg = <0xf9000000 0x400>; |
| a92a5d0d MJ |
63 | }; |
| 64 | ||
| e8ef060b | 65 | ps2: ps2@f9001000 { |
| a92a5d0d | 66 | compatible = "snps,arc_ps2"; |
| e8ef060b | 67 | reg = <0xf9000400 0x14>; |
| a92a5d0d MJ |
68 | interrupts = <13>; |
| 69 | interrupt-names = "arc_ps2_irq"; | |
| 70 | }; | |
| 71 | ||
| e8ef060b | 72 | eth0: ethernet@f0003000 { |
| df420fd6 | 73 | compatible = "ezchip,nps-mgt-enet"; |
| e8ef060b | 74 | reg = <0xf0003000 0x44>; |
| df420fd6 | 75 | interrupts = <7>; |
| a92a5d0d MJ |
76 | }; |
| 77 | }; | |
| 78 | }; |