Commit | Line | Data |
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999159a5 VG |
1 | /* |
2 | * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com) | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * Skeleton device tree; the bare minimum needed to boot; just include and | |
11 | * add a compatible value. | |
12 | */ | |
13 | ||
14 | / { | |
15 | compatible = "snps,arc"; | |
16 | #address-cells = <1>; | |
17 | #size-cells = <1>; | |
18 | chosen { }; | |
19 | aliases { }; | |
abe11dde VG |
20 | |
21 | cpus { | |
22 | #address-cells = <1>; | |
23 | #size-cells = <0>; | |
24 | ||
25 | cpu@0 { | |
26 | device_type = "cpu"; | |
27 | compatible = "snps,arc770d"; | |
28 | reg = <0>; | |
29 | }; | |
30 | }; | |
31 | ||
7ec9f34a VG |
32 | /* TIMER0 with interrupt for clockevent */ |
33 | timer0 { | |
34 | compatible = "snps,arc-timer"; | |
35 | interrupts = <3>; | |
36 | interrupt-parent = <&core_intc>; | |
37 | clocks = <&core_clk>; | |
38 | }; | |
39 | ||
40 | /* TIMER1 for free running clocksource */ | |
41 | timer1 { | |
42 | compatible = "snps,arc-timer"; | |
43 | clocks = <&core_clk>; | |
44 | }; | |
45 | ||
450dd430 VG |
46 | memory { |
47 | device_type = "memory"; | |
f759ee57 | 48 | reg = <0x80000000 0x10000000>; /* 256M */ |
450dd430 | 49 | }; |
999159a5 | 50 | }; |