Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
b1b3f49c RK |
4 | select ARCH_BINFMT_ELF_RANDOMIZE_PIE |
5 | select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE | |
7563bbf8 | 6 | select ARCH_HAVE_CUSTOM_GPIO_H |
b1b3f49c | 7 | select ARCH_WANT_IPC_PARSE_VERSION |
ee951c63 | 8 | select BUILDTIME_EXTABLE_SORT if MMU |
b1b3f49c | 9 | select CPU_PM if (SUSPEND || CPU_IDLE) |
39b175a0 | 10 | select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU |
a41297a0 | 11 | select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) |
b1b3f49c RK |
12 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
13 | select GENERIC_IRQ_PROBE | |
14 | select GENERIC_IRQ_SHOW | |
15 | select GENERIC_KERNEL_THREAD | |
3d6ee36d | 16 | select GENERIC_KERNEL_EXECVE |
b1b3f49c RK |
17 | select GENERIC_PCI_IOMAP |
18 | select GENERIC_SMP_IDLE_THREAD | |
19 | select GENERIC_STRNCPY_FROM_USER | |
20 | select GENERIC_STRNLEN_USER | |
21 | select HARDIRQS_SW_RESEND | |
22 | select HAVE_AOUT | |
09f05d85 | 23 | select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL |
5cbad0eb | 24 | select HAVE_ARCH_KGDB |
4095ccc3 | 25 | select HAVE_ARCH_SECCOMP_FILTER |
0693bf68 | 26 | select HAVE_ARCH_TRACEHOOK |
b1b3f49c RK |
27 | select HAVE_BPF_JIT |
28 | select HAVE_C_RECORDMCOUNT | |
29 | select HAVE_DEBUG_KMEMLEAK | |
30 | select HAVE_DMA_API_DEBUG | |
31 | select HAVE_DMA_ATTRS | |
32 | select HAVE_DMA_CONTIGUOUS if MMU | |
80be7a7f | 33 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) |
b1b3f49c | 34 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
0e341af8 | 35 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
b1b3f49c | 36 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
1fe53268 | 37 | select HAVE_GENERIC_DMA_COHERENT |
b1b3f49c RK |
38 | select HAVE_GENERIC_HARDIRQS |
39 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) | |
40 | select HAVE_IDE if PCI || ISA || PCMCIA | |
41 | select HAVE_IRQ_WORK | |
e7db7b42 | 42 | select HAVE_KERNEL_GZIP |
6e8699f7 | 43 | select HAVE_KERNEL_LZMA |
b1b3f49c | 44 | select HAVE_KERNEL_LZO |
a7f464f3 | 45 | select HAVE_KERNEL_XZ |
b1b3f49c RK |
46 | select HAVE_KPROBES if !XIP_KERNEL |
47 | select HAVE_KRETPROBES if (HAVE_KPROBES) | |
48 | select HAVE_MEMBLOCK | |
49 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) | |
7ada189f | 50 | select HAVE_PERF_EVENTS |
e513f8bf | 51 | select HAVE_REGS_AND_STACK_ACCESS_API |
b1b3f49c | 52 | select HAVE_SYSCALL_TRACEPOINTS |
af1839eb | 53 | select HAVE_UID16 |
3d92a71a | 54 | select KTIME_SCALAR |
b1b3f49c RK |
55 | select PERF_USE_VMALLOC |
56 | select RTC_LIB | |
57 | select SYS_SUPPORTS_APM_EMULATION | |
786d35d4 DH |
58 | select HAVE_MOD_ARCH_SPECIFIC if ARM_UNWIND |
59 | select MODULES_USE_ELF_REL | |
38a61b6b | 60 | select CLONE_BACKWARDS |
1da177e4 LT |
61 | help |
62 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 63 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 64 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 65 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
66 | Europe. There is an ARM Linux project with a web page at |
67 | <http://www.arm.linux.org.uk/>. | |
68 | ||
74facffe RK |
69 | config ARM_HAS_SG_CHAIN |
70 | bool | |
71 | ||
4ce63fcd MS |
72 | config NEED_SG_DMA_LENGTH |
73 | bool | |
74 | ||
75 | config ARM_DMA_USE_IOMMU | |
4ce63fcd | 76 | bool |
b1b3f49c RK |
77 | select ARM_HAS_SG_CHAIN |
78 | select NEED_SG_DMA_LENGTH | |
4ce63fcd | 79 | |
1a189b97 RK |
80 | config HAVE_PWM |
81 | bool | |
82 | ||
0b05da72 HUK |
83 | config MIGHT_HAVE_PCI |
84 | bool | |
85 | ||
75e7153a RB |
86 | config SYS_SUPPORTS_APM_EMULATION |
87 | bool | |
88 | ||
0a938b97 DB |
89 | config GENERIC_GPIO |
90 | bool | |
0a938b97 | 91 | |
bc581770 LW |
92 | config HAVE_TCM |
93 | bool | |
94 | select GENERIC_ALLOCATOR | |
95 | ||
e119bfff RK |
96 | config HAVE_PROC_CPU |
97 | bool | |
98 | ||
5ea81769 AV |
99 | config NO_IOPORT |
100 | bool | |
5ea81769 | 101 | |
1da177e4 LT |
102 | config EISA |
103 | bool | |
104 | ---help--- | |
105 | The Extended Industry Standard Architecture (EISA) bus was | |
106 | developed as an open alternative to the IBM MicroChannel bus. | |
107 | ||
108 | The EISA bus provided some of the features of the IBM MicroChannel | |
109 | bus while maintaining backward compatibility with cards made for | |
110 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
111 | 1995 when it was made obsolete by the PCI bus. | |
112 | ||
113 | Say Y here if you are building a kernel for an EISA-based machine. | |
114 | ||
115 | Otherwise, say N. | |
116 | ||
117 | config SBUS | |
118 | bool | |
119 | ||
f16fb1ec RK |
120 | config STACKTRACE_SUPPORT |
121 | bool | |
122 | default y | |
123 | ||
f76e9154 NP |
124 | config HAVE_LATENCYTOP_SUPPORT |
125 | bool | |
126 | depends on !SMP | |
127 | default y | |
128 | ||
f16fb1ec RK |
129 | config LOCKDEP_SUPPORT |
130 | bool | |
131 | default y | |
132 | ||
7ad1bcb2 RK |
133 | config TRACE_IRQFLAGS_SUPPORT |
134 | bool | |
135 | default y | |
136 | ||
1da177e4 LT |
137 | config RWSEM_GENERIC_SPINLOCK |
138 | bool | |
139 | default y | |
140 | ||
141 | config RWSEM_XCHGADD_ALGORITHM | |
142 | bool | |
143 | ||
f0d1b0b3 DH |
144 | config ARCH_HAS_ILOG2_U32 |
145 | bool | |
f0d1b0b3 DH |
146 | |
147 | config ARCH_HAS_ILOG2_U64 | |
148 | bool | |
f0d1b0b3 | 149 | |
89c52ed4 BD |
150 | config ARCH_HAS_CPUFREQ |
151 | bool | |
152 | help | |
153 | Internal node to signify that the ARCH has CPUFREQ support | |
154 | and that the relevant menu configurations are displayed for | |
155 | it. | |
156 | ||
b89c3b16 AM |
157 | config GENERIC_HWEIGHT |
158 | bool | |
159 | default y | |
160 | ||
1da177e4 LT |
161 | config GENERIC_CALIBRATE_DELAY |
162 | bool | |
163 | default y | |
164 | ||
a08b6b79 Z |
165 | config ARCH_MAY_HAVE_PC_FDC |
166 | bool | |
167 | ||
5ac6da66 CL |
168 | config ZONE_DMA |
169 | bool | |
5ac6da66 | 170 | |
ccd7ab7f FT |
171 | config NEED_DMA_MAP_STATE |
172 | def_bool y | |
173 | ||
58af4a24 RH |
174 | config ARCH_HAS_DMA_SET_COHERENT_MASK |
175 | bool | |
176 | ||
1da177e4 LT |
177 | config GENERIC_ISA_DMA |
178 | bool | |
179 | ||
1da177e4 LT |
180 | config FIQ |
181 | bool | |
182 | ||
13a5045d RH |
183 | config NEED_RET_TO_USER |
184 | bool | |
185 | ||
034d2f5a AV |
186 | config ARCH_MTD_XIP |
187 | bool | |
188 | ||
c760fc19 HC |
189 | config VECTORS_BASE |
190 | hex | |
6afd6fae | 191 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
192 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
193 | default 0x00000000 | |
194 | help | |
195 | The base address of exception vectors. | |
196 | ||
dc21af99 | 197 | config ARM_PATCH_PHYS_VIRT |
c1becedc RK |
198 | bool "Patch physical to virtual translations at runtime" if EMBEDDED |
199 | default y | |
b511d75d | 200 | depends on !XIP_KERNEL && MMU |
dc21af99 RK |
201 | depends on !ARCH_REALVIEW || !SPARSEMEM |
202 | help | |
111e9a5c RK |
203 | Patch phys-to-virt and virt-to-phys translation functions at |
204 | boot and module load time according to the position of the | |
205 | kernel in system memory. | |
dc21af99 | 206 | |
111e9a5c | 207 | This can only be used with non-XIP MMU kernels where the base |
daece596 | 208 | of physical memory is at a 16MB boundary. |
dc21af99 | 209 | |
c1becedc RK |
210 | Only disable this option if you know that you do not require |
211 | this feature (eg, building a kernel for a single machine) and | |
212 | you need to shrink the kernel to the minimal size. | |
dc21af99 | 213 | |
01464226 RH |
214 | config NEED_MACH_GPIO_H |
215 | bool | |
216 | help | |
217 | Select this when mach/gpio.h is required to provide special | |
218 | definitions for this platform. The need for mach/gpio.h should | |
219 | be avoided when possible. | |
220 | ||
c334bc15 RH |
221 | config NEED_MACH_IO_H |
222 | bool | |
223 | help | |
224 | Select this when mach/io.h is required to provide special | |
225 | definitions for this platform. The need for mach/io.h should | |
226 | be avoided when possible. | |
227 | ||
0cdc8b92 | 228 | config NEED_MACH_MEMORY_H |
1b9f95f8 NP |
229 | bool |
230 | help | |
0cdc8b92 NP |
231 | Select this when mach/memory.h is required to provide special |
232 | definitions for this platform. The need for mach/memory.h should | |
233 | be avoided when possible. | |
dc21af99 | 234 | |
1b9f95f8 | 235 | config PHYS_OFFSET |
974c0724 | 236 | hex "Physical address of main memory" if MMU |
0cdc8b92 | 237 | depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H |
974c0724 | 238 | default DRAM_BASE if !MMU |
111e9a5c | 239 | help |
1b9f95f8 NP |
240 | Please provide the physical address corresponding to the |
241 | location of main memory in your system. | |
cada3c08 | 242 | |
87e040b6 SG |
243 | config GENERIC_BUG |
244 | def_bool y | |
245 | depends on BUG | |
246 | ||
1da177e4 LT |
247 | source "init/Kconfig" |
248 | ||
dc52ddc0 MH |
249 | source "kernel/Kconfig.freezer" |
250 | ||
1da177e4 LT |
251 | menu "System Type" |
252 | ||
3c427975 HC |
253 | config MMU |
254 | bool "MMU-based Paged Memory Management Support" | |
255 | default y | |
256 | help | |
257 | Select if you want MMU-based virtualised addressing space | |
258 | support by paged memory management. If unsure, say 'Y'. | |
259 | ||
ccf50e23 RK |
260 | # |
261 | # The "ARM system type" choice list is ordered alphabetically by option | |
262 | # text. Please add new entries in the option alphabetic order. | |
263 | # | |
1da177e4 LT |
264 | choice |
265 | prompt "ARM system type" | |
387798b3 | 266 | default ARCH_MULTIPLATFORM |
1da177e4 | 267 | |
387798b3 RH |
268 | config ARCH_MULTIPLATFORM |
269 | bool "Allow multiple platforms to be selected" | |
b1b3f49c | 270 | depends on MMU |
387798b3 RH |
271 | select ARM_PATCH_PHYS_VIRT |
272 | select AUTO_ZRELADDR | |
66314223 | 273 | select COMMON_CLK |
387798b3 | 274 | select MULTI_IRQ_HANDLER |
66314223 DN |
275 | select SPARSE_IRQ |
276 | select USE_OF | |
66314223 | 277 | |
4af6fee1 DS |
278 | config ARCH_INTEGRATOR |
279 | bool "ARM Ltd. Integrator family" | |
89c52ed4 | 280 | select ARCH_HAS_CPUFREQ |
b1b3f49c | 281 | select ARM_AMBA |
a613163d | 282 | select COMMON_CLK |
f9a6aa43 | 283 | select COMMON_CLK_VERSATILE |
b1b3f49c | 284 | select GENERIC_CLOCKEVENTS |
9904f793 | 285 | select HAVE_TCM |
c5a0adb5 | 286 | select ICST |
b1b3f49c RK |
287 | select MULTI_IRQ_HANDLER |
288 | select NEED_MACH_MEMORY_H | |
f4b8b319 | 289 | select PLAT_VERSATILE |
695436e3 | 290 | select SPARSE_IRQ |
2389d501 | 291 | select VERSATILE_FPGA_IRQ |
4af6fee1 DS |
292 | help |
293 | Support for ARM's Integrator platform. | |
294 | ||
295 | config ARCH_REALVIEW | |
296 | bool "ARM Ltd. RealView family" | |
b1b3f49c | 297 | select ARCH_WANT_OPTIONAL_GPIOLIB |
4af6fee1 | 298 | select ARM_AMBA |
b1b3f49c | 299 | select ARM_TIMER_SP804 |
f9a6aa43 LW |
300 | select COMMON_CLK |
301 | select COMMON_CLK_VERSATILE | |
ae30ceac | 302 | select GENERIC_CLOCKEVENTS |
b56ba8aa | 303 | select GPIO_PL061 if GPIOLIB |
b1b3f49c | 304 | select ICST |
0cdc8b92 | 305 | select NEED_MACH_MEMORY_H |
b1b3f49c RK |
306 | select PLAT_VERSATILE |
307 | select PLAT_VERSATILE_CLCD | |
4af6fee1 DS |
308 | help |
309 | This enables support for ARM Ltd RealView boards. | |
310 | ||
311 | config ARCH_VERSATILE | |
312 | bool "ARM Ltd. Versatile family" | |
b1b3f49c | 313 | select ARCH_WANT_OPTIONAL_GPIOLIB |
4af6fee1 | 314 | select ARM_AMBA |
b1b3f49c | 315 | select ARM_TIMER_SP804 |
4af6fee1 | 316 | select ARM_VIC |
6d803ba7 | 317 | select CLKDEV_LOOKUP |
b1b3f49c | 318 | select GENERIC_CLOCKEVENTS |
aa3831cf | 319 | select HAVE_MACH_CLKDEV |
c5a0adb5 | 320 | select ICST |
f4b8b319 | 321 | select PLAT_VERSATILE |
3414ba8c | 322 | select PLAT_VERSATILE_CLCD |
b1b3f49c | 323 | select PLAT_VERSATILE_CLOCK |
2389d501 | 324 | select VERSATILE_FPGA_IRQ |
4af6fee1 DS |
325 | help |
326 | This enables support for ARM Ltd Versatile board. | |
327 | ||
8fc5ffa0 AV |
328 | config ARCH_AT91 |
329 | bool "Atmel AT91" | |
f373e8c0 | 330 | select ARCH_REQUIRE_GPIOLIB |
bd602995 | 331 | select CLKDEV_LOOKUP |
b1b3f49c | 332 | select HAVE_CLK |
e261501d | 333 | select IRQ_DOMAIN |
01464226 | 334 | select NEED_MACH_GPIO_H |
1ac02d79 | 335 | select NEED_MACH_IO_H if PCCARD |
6732ae5c JCPV |
336 | select PINCTRL |
337 | select PINCTRL_AT91 if USE_OF | |
4af6fee1 | 338 | help |
929e994f NF |
339 | This enables support for systems based on Atmel |
340 | AT91RM9200 and AT91SAM9* processors. | |
4af6fee1 | 341 | |
ec9653b8 SA |
342 | config ARCH_BCM2835 |
343 | bool "Broadcom BCM2835 family" | |
805504ab | 344 | select ARCH_REQUIRE_GPIOLIB |
ec9653b8 SA |
345 | select ARM_AMBA |
346 | select ARM_ERRATA_411920 | |
347 | select ARM_TIMER_SP804 | |
348 | select CLKDEV_LOOKUP | |
349 | select COMMON_CLK | |
350 | select CPU_V6 | |
351 | select GENERIC_CLOCKEVENTS | |
805504ab | 352 | select GENERIC_GPIO |
ec9653b8 | 353 | select MULTI_IRQ_HANDLER |
805504ab SW |
354 | select PINCTRL |
355 | select PINCTRL_BCM2835 | |
ec9653b8 SA |
356 | select SPARSE_IRQ |
357 | select USE_OF | |
358 | help | |
359 | This enables support for the Broadcom BCM2835 SoC. This SoC is | |
360 | use in the Raspberry Pi, and Roku 2 devices. | |
361 | ||
d94f944e AV |
362 | config ARCH_CNS3XXX |
363 | bool "Cavium Networks CNS3XXX family" | |
b1b3f49c | 364 | select ARM_GIC |
00d2711d | 365 | select CPU_V6K |
d94f944e | 366 | select GENERIC_CLOCKEVENTS |
ce5ea9f3 | 367 | select MIGHT_HAVE_CACHE_L2X0 |
0b05da72 | 368 | select MIGHT_HAVE_PCI |
5f32f7a0 | 369 | select PCI_DOMAINS if PCI |
d94f944e AV |
370 | help |
371 | Support for Cavium Networks CNS3XXX platform. | |
372 | ||
93e22567 RK |
373 | config ARCH_CLPS711X |
374 | bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" | |
a3b8d4a5 | 375 | select ARCH_REQUIRE_GPIOLIB |
93e22567 | 376 | select ARCH_USES_GETTIMEOFFSET |
ea7d1bc9 | 377 | select AUTO_ZRELADDR |
93e22567 RK |
378 | select CLKDEV_LOOKUP |
379 | select COMMON_CLK | |
380 | select CPU_ARM720T | |
4a8355c4 | 381 | select GENERIC_CLOCKEVENTS |
99f04c8f | 382 | select MULTI_IRQ_HANDLER |
93e22567 | 383 | select NEED_MACH_MEMORY_H |
0d8be81c | 384 | select SPARSE_IRQ |
93e22567 RK |
385 | help |
386 | Support for Cirrus Logic 711x/721x/731x based boards. | |
387 | ||
788c9700 RK |
388 | config ARCH_GEMINI |
389 | bool "Cortina Systems Gemini" | |
788c9700 | 390 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 391 | select ARCH_USES_GETTIMEOFFSET |
b1b3f49c | 392 | select CPU_FA526 |
788c9700 RK |
393 | help |
394 | Support for the Cortina Systems Gemini family SoCs | |
395 | ||
156a0997 BS |
396 | config ARCH_SIRF |
397 | bool "CSR SiRF" | |
f6387092 | 398 | select ARCH_REQUIRE_GPIOLIB |
198678b0 | 399 | select COMMON_CLK |
b1b3f49c | 400 | select GENERIC_CLOCKEVENTS |
3a6cb8ce | 401 | select GENERIC_IRQ_CHIP |
ce5ea9f3 | 402 | select MIGHT_HAVE_CACHE_L2X0 |
b1b3f49c | 403 | select NO_IOPORT |
cbd8d842 BS |
404 | select PINCTRL |
405 | select PINCTRL_SIRF | |
3a6cb8ce | 406 | select USE_OF |
3a6cb8ce | 407 | help |
156a0997 | 408 | Support for CSR SiRFprimaII/Marco/Polo platforms |
3a6cb8ce | 409 | |
1da177e4 LT |
410 | config ARCH_EBSA110 |
411 | bool "EBSA-110" | |
b1b3f49c | 412 | select ARCH_USES_GETTIMEOFFSET |
c750815e | 413 | select CPU_SA110 |
f7e68bbf | 414 | select ISA |
c334bc15 | 415 | select NEED_MACH_IO_H |
0cdc8b92 | 416 | select NEED_MACH_MEMORY_H |
b1b3f49c | 417 | select NO_IOPORT |
1da177e4 LT |
418 | help |
419 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 420 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
421 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
422 | parallel port. | |
423 | ||
e7736d47 LB |
424 | config ARCH_EP93XX |
425 | bool "EP93xx-based" | |
b1b3f49c RK |
426 | select ARCH_HAS_HOLES_MEMORYMODEL |
427 | select ARCH_REQUIRE_GPIOLIB | |
428 | select ARCH_USES_GETTIMEOFFSET | |
e7736d47 LB |
429 | select ARM_AMBA |
430 | select ARM_VIC | |
6d803ba7 | 431 | select CLKDEV_LOOKUP |
b1b3f49c | 432 | select CPU_ARM920T |
5725aeae | 433 | select NEED_MACH_MEMORY_H |
e7736d47 LB |
434 | help |
435 | This enables support for the Cirrus EP93xx series of CPUs. | |
436 | ||
1da177e4 LT |
437 | config ARCH_FOOTBRIDGE |
438 | bool "FootBridge" | |
c750815e | 439 | select CPU_SA110 |
1da177e4 | 440 | select FOOTBRIDGE |
4e8d7637 | 441 | select GENERIC_CLOCKEVENTS |
d0ee9f40 | 442 | select HAVE_IDE |
8ef6e620 | 443 | select NEED_MACH_IO_H if !MMU |
0cdc8b92 | 444 | select NEED_MACH_MEMORY_H |
f999b8bd MM |
445 | help |
446 | Support for systems based on the DC21285 companion chip | |
447 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 448 | |
1d3f33d5 SG |
449 | config ARCH_MXS |
450 | bool "Freescale MXS-based" | |
1d3f33d5 | 451 | select ARCH_REQUIRE_GPIOLIB |
b9214b97 | 452 | select CLKDEV_LOOKUP |
5c61ddcf | 453 | select CLKSRC_MMIO |
2664681f | 454 | select COMMON_CLK |
b1b3f49c | 455 | select GENERIC_CLOCKEVENTS |
6abda3e1 | 456 | select HAVE_CLK_PREPARE |
4e0a1b8c | 457 | select MULTI_IRQ_HANDLER |
a0f5e363 | 458 | select PINCTRL |
c2668206 | 459 | select SPARSE_IRQ |
6c4d4efb | 460 | select USE_OF |
1d3f33d5 SG |
461 | help |
462 | Support for Freescale MXS-based family of processors | |
463 | ||
4af6fee1 DS |
464 | config ARCH_NETX |
465 | bool "Hilscher NetX based" | |
b1b3f49c | 466 | select ARM_VIC |
234b6ced | 467 | select CLKSRC_MMIO |
c750815e | 468 | select CPU_ARM926T |
2fcfe6b8 | 469 | select GENERIC_CLOCKEVENTS |
f999b8bd | 470 | help |
4af6fee1 DS |
471 | This enables support for systems based on the Hilscher NetX Soc |
472 | ||
473 | config ARCH_H720X | |
474 | bool "Hynix HMS720x-based" | |
b1b3f49c | 475 | select ARCH_USES_GETTIMEOFFSET |
c750815e | 476 | select CPU_ARM720T |
4af6fee1 DS |
477 | select ISA_DMA_API |
478 | help | |
479 | This enables support for systems based on the Hynix HMS720x | |
480 | ||
3b938be6 RK |
481 | config ARCH_IOP13XX |
482 | bool "IOP13xx-based" | |
483 | depends on MMU | |
3b938be6 | 484 | select ARCH_SUPPORTS_MSI |
b1b3f49c | 485 | select CPU_XSC3 |
0cdc8b92 | 486 | select NEED_MACH_MEMORY_H |
13a5045d | 487 | select NEED_RET_TO_USER |
b1b3f49c RK |
488 | select PCI |
489 | select PLAT_IOP | |
490 | select VMSPLIT_1G | |
3b938be6 RK |
491 | help |
492 | Support for Intel's IOP13XX (XScale) family of processors. | |
493 | ||
3f7e5815 LB |
494 | config ARCH_IOP32X |
495 | bool "IOP32x-based" | |
a4f7e763 | 496 | depends on MMU |
b1b3f49c | 497 | select ARCH_REQUIRE_GPIOLIB |
c750815e | 498 | select CPU_XSCALE |
01464226 | 499 | select NEED_MACH_GPIO_H |
13a5045d | 500 | select NEED_RET_TO_USER |
f7e68bbf | 501 | select PCI |
b1b3f49c | 502 | select PLAT_IOP |
f999b8bd | 503 | help |
3f7e5815 LB |
504 | Support for Intel's 80219 and IOP32X (XScale) family of |
505 | processors. | |
506 | ||
507 | config ARCH_IOP33X | |
508 | bool "IOP33x-based" | |
509 | depends on MMU | |
b1b3f49c | 510 | select ARCH_REQUIRE_GPIOLIB |
c750815e | 511 | select CPU_XSCALE |
01464226 | 512 | select NEED_MACH_GPIO_H |
13a5045d | 513 | select NEED_RET_TO_USER |
3f7e5815 | 514 | select PCI |
b1b3f49c | 515 | select PLAT_IOP |
3f7e5815 LB |
516 | help |
517 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 518 | |
3b938be6 RK |
519 | config ARCH_IXP4XX |
520 | bool "IXP4xx-based" | |
a4f7e763 | 521 | depends on MMU |
58af4a24 | 522 | select ARCH_HAS_DMA_SET_COHERENT_MASK |
b1b3f49c | 523 | select ARCH_REQUIRE_GPIOLIB |
234b6ced | 524 | select CLKSRC_MMIO |
c750815e | 525 | select CPU_XSCALE |
b1b3f49c | 526 | select DMABOUNCE if PCI |
3b938be6 | 527 | select GENERIC_CLOCKEVENTS |
0b05da72 | 528 | select MIGHT_HAVE_PCI |
c334bc15 | 529 | select NEED_MACH_IO_H |
c4713074 | 530 | help |
3b938be6 | 531 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 532 | |
edabd38e SB |
533 | config ARCH_DOVE |
534 | bool "Marvell Dove" | |
edabd38e | 535 | select ARCH_REQUIRE_GPIOLIB |
5b03df9a | 536 | select COMMON_CLK_DOVE |
b1b3f49c | 537 | select CPU_V7 |
edabd38e | 538 | select GENERIC_CLOCKEVENTS |
0f81bd43 | 539 | select MIGHT_HAVE_PCI |
9139acd1 SH |
540 | select PINCTRL |
541 | select PINCTRL_DOVE | |
abcda1dc | 542 | select PLAT_ORION_LEGACY |
0f81bd43 | 543 | select USB_ARCH_HAS_EHCI |
edabd38e SB |
544 | help |
545 | Support for the Marvell Dove SoC 88AP510 | |
546 | ||
651c74c7 SB |
547 | config ARCH_KIRKWOOD |
548 | bool "Marvell Kirkwood" | |
a8865655 | 549 | select ARCH_REQUIRE_GPIOLIB |
b1b3f49c | 550 | select CPU_FEROCEON |
651c74c7 | 551 | select GENERIC_CLOCKEVENTS |
b1b3f49c | 552 | select PCI |
1dc831bf | 553 | select PCI_QUIRKS |
f9e75922 AL |
554 | select PINCTRL |
555 | select PINCTRL_KIRKWOOD | |
abcda1dc | 556 | select PLAT_ORION_LEGACY |
651c74c7 SB |
557 | help |
558 | Support for the following Marvell Kirkwood series SoCs: | |
559 | 88F6180, 88F6192 and 88F6281. | |
560 | ||
794d15b2 SS |
561 | config ARCH_MV78XX0 |
562 | bool "Marvell MV78xx0" | |
a8865655 | 563 | select ARCH_REQUIRE_GPIOLIB |
b1b3f49c | 564 | select CPU_FEROCEON |
794d15b2 | 565 | select GENERIC_CLOCKEVENTS |
b1b3f49c | 566 | select PCI |
abcda1dc | 567 | select PLAT_ORION_LEGACY |
794d15b2 SS |
568 | help |
569 | Support for the following Marvell MV78xx0 series SoCs: | |
570 | MV781x0, MV782x0. | |
571 | ||
9dd0b194 | 572 | config ARCH_ORION5X |
585cf175 TP |
573 | bool "Marvell Orion" |
574 | depends on MMU | |
a8865655 | 575 | select ARCH_REQUIRE_GPIOLIB |
b1b3f49c | 576 | select CPU_FEROCEON |
51cbff1d | 577 | select GENERIC_CLOCKEVENTS |
b1b3f49c | 578 | select PCI |
abcda1dc | 579 | select PLAT_ORION_LEGACY |
585cf175 | 580 | help |
9dd0b194 | 581 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 582 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 583 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 584 | |
788c9700 | 585 | config ARCH_MMP |
2f7e8fae | 586 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 587 | depends on MMU |
788c9700 | 588 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 589 | select CLKDEV_LOOKUP |
b1b3f49c | 590 | select GENERIC_ALLOCATOR |
788c9700 | 591 | select GENERIC_CLOCKEVENTS |
157d2644 | 592 | select GPIO_PXA |
c24b3114 | 593 | select IRQ_DOMAIN |
b1b3f49c | 594 | select NEED_MACH_GPIO_H |
7c8f86a4 | 595 | select PINCTRL |
788c9700 | 596 | select PLAT_PXA |
0bd86961 | 597 | select SPARSE_IRQ |
788c9700 | 598 | help |
2f7e8fae | 599 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
600 | |
601 | config ARCH_KS8695 | |
602 | bool "Micrel/Kendin KS8695" | |
98830bc9 | 603 | select ARCH_REQUIRE_GPIOLIB |
c7e783d6 | 604 | select CLKSRC_MMIO |
b1b3f49c | 605 | select CPU_ARM922T |
c7e783d6 | 606 | select GENERIC_CLOCKEVENTS |
b1b3f49c | 607 | select NEED_MACH_MEMORY_H |
788c9700 RK |
608 | help |
609 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
610 | System-on-Chip devices. | |
611 | ||
788c9700 RK |
612 | config ARCH_W90X900 |
613 | bool "Nuvoton W90X900 CPU" | |
c52d3d68 | 614 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 615 | select CLKDEV_LOOKUP |
6fa5d5f7 | 616 | select CLKSRC_MMIO |
b1b3f49c | 617 | select CPU_ARM926T |
58b5369e | 618 | select GENERIC_CLOCKEVENTS |
788c9700 | 619 | help |
a8bc4ead | 620 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
621 | At present, the w90x900 has been renamed nuc900, regarding | |
622 | the ARM series product line, you can login the following | |
623 | link address to know more. | |
624 | ||
625 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
626 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 627 | |
93e22567 RK |
628 | config ARCH_LPC32XX |
629 | bool "NXP LPC32XX" | |
630 | select ARCH_REQUIRE_GPIOLIB | |
631 | select ARM_AMBA | |
632 | select CLKDEV_LOOKUP | |
633 | select CLKSRC_MMIO | |
634 | select CPU_ARM926T | |
635 | select GENERIC_CLOCKEVENTS | |
636 | select HAVE_IDE | |
637 | select HAVE_PWM | |
638 | select USB_ARCH_HAS_OHCI | |
639 | select USE_OF | |
640 | help | |
641 | Support for the NXP LPC32XX family of processors | |
642 | ||
c5f80065 EG |
643 | config ARCH_TEGRA |
644 | bool "NVIDIA Tegra" | |
b1b3f49c | 645 | select ARCH_HAS_CPUFREQ |
4073723a | 646 | select CLKDEV_LOOKUP |
234b6ced | 647 | select CLKSRC_MMIO |
b1b3f49c | 648 | select COMMON_CLK |
c5f80065 EG |
649 | select GENERIC_CLOCKEVENTS |
650 | select GENERIC_GPIO | |
651 | select HAVE_CLK | |
3b55658a | 652 | select HAVE_SMP |
ce5ea9f3 | 653 | select MIGHT_HAVE_CACHE_L2X0 |
c5a4d6b0 | 654 | select SPARSE_IRQ |
2c95b7e0 | 655 | select USE_OF |
c5f80065 EG |
656 | help |
657 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
658 | Tegra 6xx and Tegra 2 series). | |
659 | ||
1da177e4 | 660 | config ARCH_PXA |
2c8086a5 | 661 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 662 | depends on MMU |
89c52ed4 | 663 | select ARCH_HAS_CPUFREQ |
b1b3f49c RK |
664 | select ARCH_MTD_XIP |
665 | select ARCH_REQUIRE_GPIOLIB | |
666 | select ARM_CPU_SUSPEND if PM | |
667 | select AUTO_ZRELADDR | |
6d803ba7 | 668 | select CLKDEV_LOOKUP |
234b6ced | 669 | select CLKSRC_MMIO |
981d0f39 | 670 | select GENERIC_CLOCKEVENTS |
157d2644 | 671 | select GPIO_PXA |
d0ee9f40 | 672 | select HAVE_IDE |
b1b3f49c | 673 | select MULTI_IRQ_HANDLER |
01464226 | 674 | select NEED_MACH_GPIO_H |
b1b3f49c RK |
675 | select PLAT_PXA |
676 | select SPARSE_IRQ | |
f999b8bd | 677 | help |
2c8086a5 | 678 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 679 | |
788c9700 RK |
680 | config ARCH_MSM |
681 | bool "Qualcomm MSM" | |
923a081c | 682 | select ARCH_REQUIRE_GPIOLIB |
bd32344a | 683 | select CLKDEV_LOOKUP |
b1b3f49c RK |
684 | select GENERIC_CLOCKEVENTS |
685 | select HAVE_CLK | |
49cbe786 | 686 | help |
4b53eb4f DW |
687 | Support for Qualcomm MSM/QSD based systems. This runs on the |
688 | apps processor of the MSM/QSD and depends on a shared memory | |
689 | interface to the modem processor which runs the baseband | |
690 | stack and controls some vital subsystems | |
691 | (clock and power control, etc). | |
49cbe786 | 692 | |
c793c1b0 | 693 | config ARCH_SHMOBILE |
6d72ad35 | 694 | bool "Renesas SH-Mobile / R-Mobile" |
5e93c6b4 | 695 | select CLKDEV_LOOKUP |
b1b3f49c RK |
696 | select GENERIC_CLOCKEVENTS |
697 | select HAVE_CLK | |
aa3831cf | 698 | select HAVE_MACH_CLKDEV |
3b55658a | 699 | select HAVE_SMP |
ce5ea9f3 | 700 | select MIGHT_HAVE_CACHE_L2X0 |
60f1435c | 701 | select MULTI_IRQ_HANDLER |
0cdc8b92 | 702 | select NEED_MACH_MEMORY_H |
b1b3f49c RK |
703 | select NO_IOPORT |
704 | select PM_GENERIC_DOMAINS if PM | |
705 | select SPARSE_IRQ | |
c793c1b0 | 706 | help |
6d72ad35 | 707 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 708 | |
1da177e4 LT |
709 | config ARCH_RPC |
710 | bool "RiscPC" | |
711 | select ARCH_ACORN | |
a08b6b79 | 712 | select ARCH_MAY_HAVE_PC_FDC |
07f841b7 | 713 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 714 | select ARCH_USES_GETTIMEOFFSET |
b1b3f49c | 715 | select FIQ |
d0ee9f40 | 716 | select HAVE_IDE |
b1b3f49c RK |
717 | select HAVE_PATA_PLATFORM |
718 | select ISA_DMA_API | |
c334bc15 | 719 | select NEED_MACH_IO_H |
0cdc8b92 | 720 | select NEED_MACH_MEMORY_H |
b1b3f49c | 721 | select NO_IOPORT |
1da177e4 LT |
722 | help |
723 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
724 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
725 | ||
726 | config ARCH_SA1100 | |
727 | bool "SA1100-based" | |
89c52ed4 | 728 | select ARCH_HAS_CPUFREQ |
b1b3f49c RK |
729 | select ARCH_MTD_XIP |
730 | select ARCH_REQUIRE_GPIOLIB | |
731 | select ARCH_SPARSEMEM_ENABLE | |
732 | select CLKDEV_LOOKUP | |
733 | select CLKSRC_MMIO | |
1937f5b9 | 734 | select CPU_FREQ |
b1b3f49c | 735 | select CPU_SA1100 |
3e238be2 | 736 | select GENERIC_CLOCKEVENTS |
d0ee9f40 | 737 | select HAVE_IDE |
b1b3f49c | 738 | select ISA |
01464226 | 739 | select NEED_MACH_GPIO_H |
0cdc8b92 | 740 | select NEED_MACH_MEMORY_H |
375dec92 | 741 | select SPARSE_IRQ |
f999b8bd MM |
742 | help |
743 | Support for StrongARM 11x0 based boards. | |
1da177e4 | 744 | |
b130d5c2 KK |
745 | config ARCH_S3C24XX |
746 | bool "Samsung S3C24XX SoCs" | |
9d56c02a | 747 | select ARCH_HAS_CPUFREQ |
5cfc8ee0 | 748 | select ARCH_USES_GETTIMEOFFSET |
b1b3f49c RK |
749 | select CLKDEV_LOOKUP |
750 | select GENERIC_GPIO | |
751 | select HAVE_CLK | |
20676c15 | 752 | select HAVE_S3C2410_I2C if I2C |
b130d5c2 | 753 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
b1b3f49c | 754 | select HAVE_S3C_RTC if RTC_CLASS |
01464226 | 755 | select NEED_MACH_GPIO_H |
c334bc15 | 756 | select NEED_MACH_IO_H |
1da177e4 | 757 | help |
b130d5c2 KK |
758 | Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 |
759 | and S3C2450 SoCs based systems, such as the Simtec Electronics BAST | |
760 | (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the | |
761 | Samsung SMDK2410 development board (and derivatives). | |
63b1f51b | 762 | |
a08ab637 BD |
763 | config ARCH_S3C64XX |
764 | bool "Samsung S3C64XX" | |
b1b3f49c RK |
765 | select ARCH_HAS_CPUFREQ |
766 | select ARCH_REQUIRE_GPIOLIB | |
767 | select ARCH_USES_GETTIMEOFFSET | |
89f0ce72 | 768 | select ARM_VIC |
b1b3f49c RK |
769 | select CLKDEV_LOOKUP |
770 | select CPU_V6 | |
a08ab637 | 771 | select HAVE_CLK |
b1b3f49c RK |
772 | select HAVE_S3C2410_I2C if I2C |
773 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | |
6700397a | 774 | select HAVE_TCM |
b1b3f49c | 775 | select NEED_MACH_GPIO_H |
89f0ce72 | 776 | select NO_IOPORT |
b1b3f49c RK |
777 | select PLAT_SAMSUNG |
778 | select S3C_DEV_NAND | |
779 | select S3C_GPIO_TRACK | |
89f0ce72 | 780 | select SAMSUNG_CLKSRC |
b1b3f49c | 781 | select SAMSUNG_GPIOLIB_4BIT |
89f0ce72 | 782 | select SAMSUNG_IRQ_VIC_TIMER |
89f0ce72 | 783 | select USB_ARCH_HAS_OHCI |
a08ab637 BD |
784 | help |
785 | Samsung S3C64XX series based systems | |
786 | ||
49b7a491 KK |
787 | config ARCH_S5P64X0 |
788 | bool "Samsung S5P6440 S5P6450" | |
d8b22d25 | 789 | select CLKDEV_LOOKUP |
0665ccc4 | 790 | select CLKSRC_MMIO |
b1b3f49c | 791 | select CPU_V6 |
9e65bbf2 | 792 | select GENERIC_CLOCKEVENTS |
b1b3f49c RK |
793 | select GENERIC_GPIO |
794 | select HAVE_CLK | |
20676c15 | 795 | select HAVE_S3C2410_I2C if I2C |
b1b3f49c | 796 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
754961a8 | 797 | select HAVE_S3C_RTC if RTC_CLASS |
01464226 | 798 | select NEED_MACH_GPIO_H |
c4ffccdd | 799 | help |
49b7a491 KK |
800 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
801 | SMDK6450. | |
c4ffccdd | 802 | |
acc84707 MS |
803 | config ARCH_S5PC100 |
804 | bool "Samsung S5PC100" | |
b1b3f49c | 805 | select ARCH_USES_GETTIMEOFFSET |
29e8eb0f | 806 | select CLKDEV_LOOKUP |
5a7652f2 | 807 | select CPU_V7 |
b1b3f49c RK |
808 | select GENERIC_GPIO |
809 | select HAVE_CLK | |
20676c15 | 810 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 811 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
b1b3f49c | 812 | select HAVE_S3C_RTC if RTC_CLASS |
01464226 | 813 | select NEED_MACH_GPIO_H |
5a7652f2 | 814 | help |
acc84707 | 815 | Samsung S5PC100 series based systems |
5a7652f2 | 816 | |
170f4e42 KK |
817 | config ARCH_S5PV210 |
818 | bool "Samsung S5PV210/S5PC110" | |
b1b3f49c | 819 | select ARCH_HAS_CPUFREQ |
0f75a96b | 820 | select ARCH_HAS_HOLES_MEMORYMODEL |
b1b3f49c | 821 | select ARCH_SPARSEMEM_ENABLE |
b2a9dd46 | 822 | select CLKDEV_LOOKUP |
0665ccc4 | 823 | select CLKSRC_MMIO |
b1b3f49c | 824 | select CPU_V7 |
9e65bbf2 | 825 | select GENERIC_CLOCKEVENTS |
b1b3f49c RK |
826 | select GENERIC_GPIO |
827 | select HAVE_CLK | |
20676c15 | 828 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 829 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
b1b3f49c | 830 | select HAVE_S3C_RTC if RTC_CLASS |
01464226 | 831 | select NEED_MACH_GPIO_H |
0cdc8b92 | 832 | select NEED_MACH_MEMORY_H |
170f4e42 KK |
833 | help |
834 | Samsung S5PV210/S5PC110 series based systems | |
835 | ||
83014579 | 836 | config ARCH_EXYNOS |
93e22567 | 837 | bool "Samsung EXYNOS" |
b1b3f49c | 838 | select ARCH_HAS_CPUFREQ |
0f75a96b | 839 | select ARCH_HAS_HOLES_MEMORYMODEL |
b1b3f49c | 840 | select ARCH_SPARSEMEM_ENABLE |
badc4f2d | 841 | select CLKDEV_LOOKUP |
b1b3f49c | 842 | select CPU_V7 |
cc0e72b8 | 843 | select GENERIC_CLOCKEVENTS |
b1b3f49c RK |
844 | select GENERIC_GPIO |
845 | select HAVE_CLK | |
20676c15 | 846 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 847 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
b1b3f49c | 848 | select HAVE_S3C_RTC if RTC_CLASS |
01464226 | 849 | select NEED_MACH_GPIO_H |
0cdc8b92 | 850 | select NEED_MACH_MEMORY_H |
cc0e72b8 | 851 | help |
83014579 | 852 | Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) |
cc0e72b8 | 853 | |
1da177e4 LT |
854 | config ARCH_SHARK |
855 | bool "Shark" | |
b1b3f49c | 856 | select ARCH_USES_GETTIMEOFFSET |
c750815e | 857 | select CPU_SA110 |
f7e68bbf RK |
858 | select ISA |
859 | select ISA_DMA | |
0cdc8b92 | 860 | select NEED_MACH_MEMORY_H |
b1b3f49c RK |
861 | select PCI |
862 | select ZONE_DMA | |
f999b8bd MM |
863 | help |
864 | Support for the StrongARM based Digital DNARD machine, also known | |
865 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 866 | |
d98aac75 LW |
867 | config ARCH_U300 |
868 | bool "ST-Ericsson U300 Series" | |
869 | depends on MMU | |
b1b3f49c | 870 | select ARCH_REQUIRE_GPIOLIB |
d98aac75 | 871 | select ARM_AMBA |
5485c1e0 | 872 | select ARM_PATCH_PHYS_VIRT |
d98aac75 | 873 | select ARM_VIC |
6d803ba7 | 874 | select CLKDEV_LOOKUP |
b1b3f49c | 875 | select CLKSRC_MMIO |
50667d63 | 876 | select COMMON_CLK |
b1b3f49c RK |
877 | select CPU_ARM926T |
878 | select GENERIC_CLOCKEVENTS | |
d98aac75 | 879 | select GENERIC_GPIO |
b1b3f49c | 880 | select HAVE_TCM |
a4fe292f | 881 | select SPARSE_IRQ |
d98aac75 LW |
882 | help |
883 | Support for ST-Ericsson U300 series mobile platforms. | |
884 | ||
ccf50e23 RK |
885 | config ARCH_U8500 |
886 | bool "ST-Ericsson U8500 Series" | |
67ae14fc | 887 | depends on MMU |
b1b3f49c RK |
888 | select ARCH_HAS_CPUFREQ |
889 | select ARCH_REQUIRE_GPIOLIB | |
ccf50e23 | 890 | select ARM_AMBA |
6d803ba7 | 891 | select CLKDEV_LOOKUP |
b1b3f49c RK |
892 | select CPU_V7 |
893 | select GENERIC_CLOCKEVENTS | |
3b55658a | 894 | select HAVE_SMP |
ce5ea9f3 | 895 | select MIGHT_HAVE_CACHE_L2X0 |
c3b9d1db | 896 | select SPARSE_IRQ |
ccf50e23 RK |
897 | help |
898 | Support for ST-Ericsson's Ux500 architecture | |
899 | ||
900 | config ARCH_NOMADIK | |
901 | bool "STMicroelectronics Nomadik" | |
b1b3f49c | 902 | select ARCH_REQUIRE_GPIOLIB |
ccf50e23 RK |
903 | select ARM_AMBA |
904 | select ARM_VIC | |
4a31bd28 | 905 | select COMMON_CLK |
b1b3f49c | 906 | select CPU_ARM926T |
ccf50e23 | 907 | select GENERIC_CLOCKEVENTS |
b1b3f49c | 908 | select MIGHT_HAVE_CACHE_L2X0 |
0fa7be40 | 909 | select PINCTRL |
2601ccfe | 910 | select PINCTRL_STN8815 |
c3b9d1db | 911 | select SPARSE_IRQ |
ccf50e23 RK |
912 | help |
913 | Support for the Nomadik platform by ST-Ericsson | |
914 | ||
93e22567 RK |
915 | config PLAT_SPEAR |
916 | bool "ST SPEAr" | |
42099322 | 917 | select ARCH_HAS_CPUFREQ |
93e22567 RK |
918 | select ARCH_REQUIRE_GPIOLIB |
919 | select ARM_AMBA | |
920 | select CLKDEV_LOOKUP | |
921 | select CLKSRC_MMIO | |
922 | select COMMON_CLK | |
923 | select GENERIC_CLOCKEVENTS | |
924 | select HAVE_CLK | |
925 | help | |
926 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
927 | ||
7c6337e2 KH |
928 | config ARCH_DAVINCI |
929 | bool "TI DaVinci" | |
b1b3f49c | 930 | select ARCH_HAS_HOLES_MEMORYMODEL |
dce1115b | 931 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 932 | select CLKDEV_LOOKUP |
20e9969b | 933 | select GENERIC_ALLOCATOR |
b1b3f49c | 934 | select GENERIC_CLOCKEVENTS |
dc7ad3b3 | 935 | select GENERIC_IRQ_CHIP |
b1b3f49c | 936 | select HAVE_IDE |
01464226 | 937 | select NEED_MACH_GPIO_H |
689e331f | 938 | select USE_OF |
b1b3f49c | 939 | select ZONE_DMA |
7c6337e2 KH |
940 | help |
941 | Support for TI's DaVinci platform. | |
942 | ||
3b938be6 RK |
943 | config ARCH_OMAP |
944 | bool "TI OMAP" | |
00a36698 | 945 | depends on MMU |
89c52ed4 | 946 | select ARCH_HAS_CPUFREQ |
9af915da | 947 | select ARCH_HAS_HOLES_MEMORYMODEL |
cee37e50 | 948 | select ARCH_REQUIRE_GPIOLIB |
d6e15d78 | 949 | select CLKSRC_MMIO |
cee37e50 | 950 | select GENERIC_CLOCKEVENTS |
cee37e50 | 951 | select HAVE_CLK |
952 | help | |
6e457bb0 | 953 | Support for TI's OMAP platform (OMAP1/2/3/4). |
cee37e50 | 954 | |
6f35f9a9 | 955 | config ARCH_VT8500_SINGLE |
21f47fbc | 956 | bool "VIA/WonderMedia 85xx" |
21f47fbc | 957 | select ARCH_HAS_CPUFREQ |
21f47fbc | 958 | select ARCH_REQUIRE_GPIOLIB |
b1b3f49c | 959 | select CLKDEV_LOOKUP |
e9a91de7 | 960 | select COMMON_CLK |
b1b3f49c RK |
961 | select CPU_ARM926T |
962 | select GENERIC_CLOCKEVENTS | |
963 | select GENERIC_GPIO | |
e9a91de7 | 964 | select HAVE_CLK |
0c464d58 TP |
965 | select MULTI_IRQ_HANDLER |
966 | select SPARSE_IRQ | |
b1b3f49c | 967 | select USE_OF |
21f47fbc AC |
968 | help |
969 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. | |
02c981c0 | 970 | |
1da177e4 LT |
971 | endchoice |
972 | ||
387798b3 RH |
973 | menu "Multiple platform selection" |
974 | depends on ARCH_MULTIPLATFORM | |
975 | ||
976 | comment "CPU Core family selection" | |
977 | ||
978 | config ARCH_MULTI_V4 | |
979 | bool "ARMv4 based platforms (FA526, StrongARM)" | |
387798b3 | 980 | depends on !ARCH_MULTI_V6_V7 |
b1b3f49c | 981 | select ARCH_MULTI_V4_V5 |
387798b3 RH |
982 | |
983 | config ARCH_MULTI_V4T | |
984 | bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" | |
387798b3 | 985 | depends on !ARCH_MULTI_V6_V7 |
b1b3f49c | 986 | select ARCH_MULTI_V4_V5 |
387798b3 RH |
987 | |
988 | config ARCH_MULTI_V5 | |
989 | bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" | |
387798b3 | 990 | depends on !ARCH_MULTI_V6_V7 |
b1b3f49c | 991 | select ARCH_MULTI_V4_V5 |
387798b3 RH |
992 | |
993 | config ARCH_MULTI_V4_V5 | |
994 | bool | |
995 | ||
996 | config ARCH_MULTI_V6 | |
997 | bool "ARMv6 based platforms (ARM11, Scorpion, ...)" | |
387798b3 | 998 | select ARCH_MULTI_V6_V7 |
b1b3f49c | 999 | select CPU_V6 |
387798b3 RH |
1000 | |
1001 | config ARCH_MULTI_V7 | |
1002 | bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)" | |
387798b3 RH |
1003 | default y |
1004 | select ARCH_MULTI_V6_V7 | |
b1b3f49c RK |
1005 | select ARCH_VEXPRESS |
1006 | select CPU_V7 | |
387798b3 RH |
1007 | |
1008 | config ARCH_MULTI_V6_V7 | |
1009 | bool | |
1010 | ||
1011 | config ARCH_MULTI_CPU_AUTO | |
1012 | def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) | |
1013 | select ARCH_MULTI_V5 | |
1014 | ||
1015 | endmenu | |
1016 | ||
ccf50e23 RK |
1017 | # |
1018 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
1019 | # Kconfigs may be included either alphabetically (according to the | |
1020 | # plat- suffix) or along side the corresponding mach-* source. | |
1021 | # | |
3e93a22b GC |
1022 | source "arch/arm/mach-mvebu/Kconfig" |
1023 | ||
95b8f20f RK |
1024 | source "arch/arm/mach-at91/Kconfig" |
1025 | ||
8ac49e04 CD |
1026 | source "arch/arm/mach-bcm/Kconfig" |
1027 | ||
1da177e4 LT |
1028 | source "arch/arm/mach-clps711x/Kconfig" |
1029 | ||
d94f944e AV |
1030 | source "arch/arm/mach-cns3xxx/Kconfig" |
1031 | ||
95b8f20f RK |
1032 | source "arch/arm/mach-davinci/Kconfig" |
1033 | ||
1034 | source "arch/arm/mach-dove/Kconfig" | |
1035 | ||
e7736d47 LB |
1036 | source "arch/arm/mach-ep93xx/Kconfig" |
1037 | ||
1da177e4 LT |
1038 | source "arch/arm/mach-footbridge/Kconfig" |
1039 | ||
59d3a193 PZ |
1040 | source "arch/arm/mach-gemini/Kconfig" |
1041 | ||
95b8f20f RK |
1042 | source "arch/arm/mach-h720x/Kconfig" |
1043 | ||
387798b3 RH |
1044 | source "arch/arm/mach-highbank/Kconfig" |
1045 | ||
1da177e4 LT |
1046 | source "arch/arm/mach-integrator/Kconfig" |
1047 | ||
3f7e5815 LB |
1048 | source "arch/arm/mach-iop32x/Kconfig" |
1049 | ||
1050 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 1051 | |
285f5fa7 DW |
1052 | source "arch/arm/mach-iop13xx/Kconfig" |
1053 | ||
1da177e4 LT |
1054 | source "arch/arm/mach-ixp4xx/Kconfig" |
1055 | ||
95b8f20f RK |
1056 | source "arch/arm/mach-kirkwood/Kconfig" |
1057 | ||
1058 | source "arch/arm/mach-ks8695/Kconfig" | |
1059 | ||
95b8f20f RK |
1060 | source "arch/arm/mach-msm/Kconfig" |
1061 | ||
794d15b2 SS |
1062 | source "arch/arm/mach-mv78xx0/Kconfig" |
1063 | ||
3995eb82 | 1064 | source "arch/arm/mach-imx/Kconfig" |
1da177e4 | 1065 | |
1d3f33d5 SG |
1066 | source "arch/arm/mach-mxs/Kconfig" |
1067 | ||
95b8f20f | 1068 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 1069 | |
95b8f20f | 1070 | source "arch/arm/mach-nomadik/Kconfig" |
95b8f20f | 1071 | |
d48af15e TL |
1072 | source "arch/arm/plat-omap/Kconfig" |
1073 | ||
1074 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 1075 | |
1dbae815 TL |
1076 | source "arch/arm/mach-omap2/Kconfig" |
1077 | ||
9dd0b194 | 1078 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 1079 | |
387798b3 RH |
1080 | source "arch/arm/mach-picoxcell/Kconfig" |
1081 | ||
95b8f20f RK |
1082 | source "arch/arm/mach-pxa/Kconfig" |
1083 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 1084 | |
95b8f20f RK |
1085 | source "arch/arm/mach-mmp/Kconfig" |
1086 | ||
1087 | source "arch/arm/mach-realview/Kconfig" | |
1088 | ||
1089 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 1090 | |
cf383678 | 1091 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 BD |
1092 | source "arch/arm/plat-s3c24xx/Kconfig" |
1093 | ||
387798b3 RH |
1094 | source "arch/arm/mach-socfpga/Kconfig" |
1095 | ||
cee37e50 | 1096 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 1097 | |
85fd6d63 | 1098 | source "arch/arm/mach-s3c24xx/Kconfig" |
b130d5c2 | 1099 | if ARCH_S3C24XX |
a21765a7 BD |
1100 | source "arch/arm/mach-s3c2412/Kconfig" |
1101 | source "arch/arm/mach-s3c2440/Kconfig" | |
a21765a7 | 1102 | endif |
1da177e4 | 1103 | |
a08ab637 | 1104 | if ARCH_S3C64XX |
431107ea | 1105 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
1106 | endif |
1107 | ||
49b7a491 | 1108 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 1109 | |
5a7652f2 | 1110 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 1111 | |
170f4e42 KK |
1112 | source "arch/arm/mach-s5pv210/Kconfig" |
1113 | ||
83014579 | 1114 | source "arch/arm/mach-exynos/Kconfig" |
cc0e72b8 | 1115 | |
882d01f9 | 1116 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 1117 | |
3b52634f MR |
1118 | source "arch/arm/mach-sunxi/Kconfig" |
1119 | ||
156a0997 BS |
1120 | source "arch/arm/mach-prima2/Kconfig" |
1121 | ||
c5f80065 EG |
1122 | source "arch/arm/mach-tegra/Kconfig" |
1123 | ||
95b8f20f | 1124 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1125 | |
95b8f20f | 1126 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1127 | |
1128 | source "arch/arm/mach-versatile/Kconfig" | |
1129 | ||
ceade897 | 1130 | source "arch/arm/mach-vexpress/Kconfig" |
420c34e4 | 1131 | source "arch/arm/plat-versatile/Kconfig" |
ceade897 | 1132 | |
6f35f9a9 TP |
1133 | source "arch/arm/mach-vt8500/Kconfig" |
1134 | ||
7ec80ddf | 1135 | source "arch/arm/mach-w90x900/Kconfig" |
1136 | ||
9a45eb69 JC |
1137 | source "arch/arm/mach-zynq/Kconfig" |
1138 | ||
1da177e4 LT |
1139 | # Definitions to make life easier |
1140 | config ARCH_ACORN | |
1141 | bool | |
1142 | ||
7ae1f7ec LB |
1143 | config PLAT_IOP |
1144 | bool | |
469d3044 | 1145 | select GENERIC_CLOCKEVENTS |
7ae1f7ec | 1146 | |
69b02f6a LB |
1147 | config PLAT_ORION |
1148 | bool | |
bfe45e0b | 1149 | select CLKSRC_MMIO |
b1b3f49c | 1150 | select COMMON_CLK |
dc7ad3b3 | 1151 | select GENERIC_IRQ_CHIP |
278b45b0 | 1152 | select IRQ_DOMAIN |
69b02f6a | 1153 | |
abcda1dc TP |
1154 | config PLAT_ORION_LEGACY |
1155 | bool | |
1156 | select PLAT_ORION | |
1157 | ||
bd5ce433 EM |
1158 | config PLAT_PXA |
1159 | bool | |
1160 | ||
f4b8b319 RK |
1161 | config PLAT_VERSATILE |
1162 | bool | |
1163 | ||
e3887714 RK |
1164 | config ARM_TIMER_SP804 |
1165 | bool | |
bfe45e0b | 1166 | select CLKSRC_MMIO |
a7bf6162 | 1167 | select HAVE_SCHED_CLOCK |
e3887714 | 1168 | |
1da177e4 LT |
1169 | source arch/arm/mm/Kconfig |
1170 | ||
958cab0f RK |
1171 | config ARM_NR_BANKS |
1172 | int | |
1173 | default 16 if ARCH_EP93XX | |
1174 | default 8 | |
1175 | ||
afe4b25e LB |
1176 | config IWMMXT |
1177 | bool "Enable iWMMXt support" | |
ef6c8445 | 1178 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
49ea7fc0 | 1179 | default y if PXA27x || PXA3xx || ARCH_MMP |
afe4b25e LB |
1180 | help |
1181 | Enable support for iWMMXt context switching at run time if | |
1182 | running on a CPU that supports it. | |
1183 | ||
1da177e4 LT |
1184 | config XSCALE_PMU |
1185 | bool | |
bfc994b5 | 1186 | depends on CPU_XSCALE |
1da177e4 LT |
1187 | default y |
1188 | ||
52108641 | 1189 | config MULTI_IRQ_HANDLER |
1190 | bool | |
1191 | help | |
1192 | Allow each machine to specify it's own IRQ handler at run time. | |
1193 | ||
3b93e7b0 HC |
1194 | if !MMU |
1195 | source "arch/arm/Kconfig-nommu" | |
1196 | endif | |
1197 | ||
f0c4b8d6 WD |
1198 | config ARM_ERRATA_326103 |
1199 | bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory" | |
1200 | depends on CPU_V6 | |
1201 | help | |
1202 | Executing a SWP instruction to read-only memory does not set bit 11 | |
1203 | of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to | |
1204 | treat the access as a read, preventing a COW from occurring and | |
1205 | causing the faulting task to livelock. | |
1206 | ||
9cba3ccc CM |
1207 | config ARM_ERRATA_411920 |
1208 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
e399b1a4 | 1209 | depends on CPU_V6 || CPU_V6K |
9cba3ccc CM |
1210 | help |
1211 | Invalidation of the Instruction Cache operation can | |
1212 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1213 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1214 | recommended workaround. | |
1215 | ||
7ce236fc CM |
1216 | config ARM_ERRATA_430973 |
1217 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1218 | depends on CPU_V7 | |
1219 | help | |
1220 | This option enables the workaround for the 430973 Cortex-A8 | |
1221 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1222 | interworking branch is replaced with another code sequence at the | |
1223 | same virtual address, whether due to self-modifying code or virtual | |
1224 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1225 | stale interworking branch prediction. This results in Cortex-A8 | |
1226 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1227 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1228 | and also flushes the branch target cache at every context switch. | |
1229 | Note that setting specific bits in the ACTLR register may not be | |
1230 | available in non-secure mode. | |
1231 | ||
855c551f CM |
1232 | config ARM_ERRATA_458693 |
1233 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1234 | depends on CPU_V7 | |
1235 | help | |
1236 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1237 | erratum. For very specific sequences of memory operations, it is | |
1238 | possible for a hazard condition intended for a cache line to instead | |
1239 | be incorrectly associated with a different cache line. This false | |
1240 | hazard might then cause a processor deadlock. The workaround enables | |
1241 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1242 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1243 | register may not be available in non-secure mode. | |
1244 | ||
0516e464 CM |
1245 | config ARM_ERRATA_460075 |
1246 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1247 | depends on CPU_V7 | |
1248 | help | |
1249 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1250 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1251 | situation in which recent store transactions to the L2 cache are lost | |
1252 | and overwritten with stale memory contents from external memory. The | |
1253 | workaround disables the write-allocate mode for the L2 cache via the | |
1254 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1255 | may not be available in non-secure mode. | |
1256 | ||
9f05027c WD |
1257 | config ARM_ERRATA_742230 |
1258 | bool "ARM errata: DMB operation may be faulty" | |
1259 | depends on CPU_V7 && SMP | |
1260 | help | |
1261 | This option enables the workaround for the 742230 Cortex-A9 | |
1262 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1263 | between two write operations may not ensure the correct visibility | |
1264 | ordering of the two writes. This workaround sets a specific bit in | |
1265 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1266 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1267 | the two writes. | |
1268 | ||
a672e99b WD |
1269 | config ARM_ERRATA_742231 |
1270 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1271 | depends on CPU_V7 && SMP | |
1272 | help | |
1273 | This option enables the workaround for the 742231 Cortex-A9 | |
1274 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1275 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1276 | accessing some data located in the same cache line, may get corrupted | |
1277 | data due to bad handling of the address hazard when the line gets | |
1278 | replaced from one of the CPUs at the same time as another CPU is | |
1279 | accessing it. This workaround sets specific bits in the diagnostic | |
1280 | register of the Cortex-A9 which reduces the linefill issuing | |
1281 | capabilities of the processor. | |
1282 | ||
9e65582a | 1283 | config PL310_ERRATA_588369 |
fa0ce403 | 1284 | bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" |
2839e06c | 1285 | depends on CACHE_L2X0 |
9e65582a SS |
1286 | help |
1287 | The PL310 L2 cache controller implements three types of Clean & | |
1288 | Invalidate maintenance operations: by Physical Address | |
1289 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1290 | They are architecturally defined to behave as the execution of a | |
1291 | clean operation followed immediately by an invalidate operation, | |
1292 | both performing to the same memory location. This functionality | |
1293 | is not correctly implemented in PL310 as clean lines are not | |
2839e06c | 1294 | invalidated as a result of these operations. |
cdf357f1 WD |
1295 | |
1296 | config ARM_ERRATA_720789 | |
1297 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
e66dc745 | 1298 | depends on CPU_V7 |
cdf357f1 WD |
1299 | help |
1300 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1301 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1302 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1303 | As a consequence of this erratum, some TLB entries which should be | |
1304 | invalidated are not, resulting in an incoherency in the system page | |
1305 | tables. The workaround changes the TLB flushing routines to invalidate | |
1306 | entries regardless of the ASID. | |
475d92fc | 1307 | |
1f0090a1 | 1308 | config PL310_ERRATA_727915 |
fa0ce403 | 1309 | bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption" |
1f0090a1 RK |
1310 | depends on CACHE_L2X0 |
1311 | help | |
1312 | PL310 implements the Clean & Invalidate by Way L2 cache maintenance | |
1313 | operation (offset 0x7FC). This operation runs in background so that | |
1314 | PL310 can handle normal accesses while it is in progress. Under very | |
1315 | rare circumstances, due to this erratum, write data can be lost when | |
1316 | PL310 treats a cacheable write transaction during a Clean & | |
1317 | Invalidate by Way operation. | |
1318 | ||
475d92fc WD |
1319 | config ARM_ERRATA_743622 |
1320 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1321 | depends on CPU_V7 | |
1322 | help | |
1323 | This option enables the workaround for the 743622 Cortex-A9 | |
efbc74ac | 1324 | (r2p*) erratum. Under very rare conditions, a faulty |
475d92fc WD |
1325 | optimisation in the Cortex-A9 Store Buffer may lead to data |
1326 | corruption. This workaround sets a specific bit in the diagnostic | |
1327 | register of the Cortex-A9 which disables the Store Buffer | |
1328 | optimisation, preventing the defect from occurring. This has no | |
1329 | visible impact on the overall performance or power consumption of the | |
1330 | processor. | |
1331 | ||
9a27c27c WD |
1332 | config ARM_ERRATA_751472 |
1333 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | |
ba90c516 | 1334 | depends on CPU_V7 |
9a27c27c WD |
1335 | help |
1336 | This option enables the workaround for the 751472 Cortex-A9 (prior | |
1337 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | |
1338 | completion of a following broadcasted operation if the second | |
1339 | operation is received by a CPU before the ICIALLUIS has completed, | |
1340 | potentially leading to corrupted entries in the cache or TLB. | |
1341 | ||
fa0ce403 WD |
1342 | config PL310_ERRATA_753970 |
1343 | bool "PL310 errata: cache sync operation may be faulty" | |
885028e4 SK |
1344 | depends on CACHE_PL310 |
1345 | help | |
1346 | This option enables the workaround for the 753970 PL310 (r3p0) erratum. | |
1347 | ||
1348 | Under some condition the effect of cache sync operation on | |
1349 | the store buffer still remains when the operation completes. | |
1350 | This means that the store buffer is always asked to drain and | |
1351 | this prevents it from merging any further writes. The workaround | |
1352 | is to replace the normal offset of cache sync operation (0x730) | |
1353 | by another offset targeting an unmapped PL310 register 0x740. | |
1354 | This has the same effect as the cache sync operation: store buffer | |
1355 | drain and waiting for all buffers empty. | |
1356 | ||
fcbdc5fe WD |
1357 | config ARM_ERRATA_754322 |
1358 | bool "ARM errata: possible faulty MMU translations following an ASID switch" | |
1359 | depends on CPU_V7 | |
1360 | help | |
1361 | This option enables the workaround for the 754322 Cortex-A9 (r2p*, | |
1362 | r3p*) erratum. A speculative memory access may cause a page table walk | |
1363 | which starts prior to an ASID switch but completes afterwards. This | |
1364 | can populate the micro-TLB with a stale entry which may be hit with | |
1365 | the new ASID. This workaround places two dsb instructions in the mm | |
1366 | switching code so that no page table walks can cross the ASID switch. | |
1367 | ||
5dab26af WD |
1368 | config ARM_ERRATA_754327 |
1369 | bool "ARM errata: no automatic Store Buffer drain" | |
1370 | depends on CPU_V7 && SMP | |
1371 | help | |
1372 | This option enables the workaround for the 754327 Cortex-A9 (prior to | |
1373 | r2p0) erratum. The Store Buffer does not have any automatic draining | |
1374 | mechanism and therefore a livelock may occur if an external agent | |
1375 | continuously polls a memory location waiting to observe an update. | |
1376 | This workaround defines cpu_relax() as smp_mb(), preventing correctly | |
1377 | written polling loops from denying visibility of updates to memory. | |
1378 | ||
145e10e1 CM |
1379 | config ARM_ERRATA_364296 |
1380 | bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" | |
1381 | depends on CPU_V6 && !SMP | |
1382 | help | |
1383 | This options enables the workaround for the 364296 ARM1136 | |
1384 | r0p2 erratum (possible cache data corruption with | |
1385 | hit-under-miss enabled). It sets the undocumented bit 31 in | |
1386 | the auxiliary control register and the FI bit in the control | |
1387 | register, thus disabling hit-under-miss without putting the | |
1388 | processor into full low interrupt latency mode. ARM11MPCore | |
1389 | is not affected. | |
1390 | ||
f630c1bd WD |
1391 | config ARM_ERRATA_764369 |
1392 | bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" | |
1393 | depends on CPU_V7 && SMP | |
1394 | help | |
1395 | This option enables the workaround for erratum 764369 | |
1396 | affecting Cortex-A9 MPCore with two or more processors (all | |
1397 | current revisions). Under certain timing circumstances, a data | |
1398 | cache line maintenance operation by MVA targeting an Inner | |
1399 | Shareable memory region may fail to proceed up to either the | |
1400 | Point of Coherency or to the Point of Unification of the | |
1401 | system. This workaround adds a DSB instruction before the | |
1402 | relevant cache maintenance functions and sets a specific bit | |
1403 | in the diagnostic control register of the SCU. | |
1404 | ||
11ed0ba1 WD |
1405 | config PL310_ERRATA_769419 |
1406 | bool "PL310 errata: no automatic Store Buffer drain" | |
1407 | depends on CACHE_L2X0 | |
1408 | help | |
1409 | On revisions of the PL310 prior to r3p2, the Store Buffer does | |
1410 | not automatically drain. This can cause normal, non-cacheable | |
1411 | writes to be retained when the memory system is idle, leading | |
1412 | to suboptimal I/O performance for drivers using coherent DMA. | |
1413 | This option adds a write barrier to the cpu_idle loop so that, | |
1414 | on systems with an outer cache, the store buffer is drained | |
1415 | explicitly. | |
1416 | ||
7253b85c SH |
1417 | config ARM_ERRATA_775420 |
1418 | bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock" | |
1419 | depends on CPU_V7 | |
1420 | help | |
1421 | This option enables the workaround for the 775420 Cortex-A9 (r2p2, | |
1422 | r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance | |
1423 | operation aborts with MMU exception, it might cause the processor | |
1424 | to deadlock. This workaround puts DSB before executing ISB if | |
1425 | an abort may occur on cache maintenance. | |
1426 | ||
1da177e4 LT |
1427 | endmenu |
1428 | ||
1429 | source "arch/arm/common/Kconfig" | |
1430 | ||
1da177e4 LT |
1431 | menu "Bus support" |
1432 | ||
1433 | config ARM_AMBA | |
1434 | bool | |
1435 | ||
1436 | config ISA | |
1437 | bool | |
1da177e4 LT |
1438 | help |
1439 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1440 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1441 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1442 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1443 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1444 | ||
065909b9 | 1445 | # Select ISA DMA controller support |
1da177e4 LT |
1446 | config ISA_DMA |
1447 | bool | |
065909b9 | 1448 | select ISA_DMA_API |
1da177e4 | 1449 | |
065909b9 | 1450 | # Select ISA DMA interface |
5cae841b AV |
1451 | config ISA_DMA_API |
1452 | bool | |
5cae841b | 1453 | |
1da177e4 | 1454 | config PCI |
0b05da72 | 1455 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1456 | help |
1457 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1458 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1459 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1460 | VESA. If you have PCI, say Y, otherwise N. | |
1461 | ||
52882173 AV |
1462 | config PCI_DOMAINS |
1463 | bool | |
1464 | depends on PCI | |
1465 | ||
b080ac8a MRJ |
1466 | config PCI_NANOENGINE |
1467 | bool "BSE nanoEngine PCI support" | |
1468 | depends on SA1100_NANOENGINE | |
1469 | help | |
1470 | Enable PCI on the BSE nanoEngine board. | |
1471 | ||
36e23590 MW |
1472 | config PCI_SYSCALL |
1473 | def_bool PCI | |
1474 | ||
1da177e4 LT |
1475 | # Select the host bridge type |
1476 | config PCI_HOST_VIA82C505 | |
1477 | bool | |
1478 | depends on PCI && ARCH_SHARK | |
1479 | default y | |
1480 | ||
a0113a99 MR |
1481 | config PCI_HOST_ITE8152 |
1482 | bool | |
1483 | depends on PCI && MACH_ARMCORE | |
1484 | default y | |
1485 | select DMABOUNCE | |
1486 | ||
1da177e4 LT |
1487 | source "drivers/pci/Kconfig" |
1488 | ||
1489 | source "drivers/pcmcia/Kconfig" | |
1490 | ||
1491 | endmenu | |
1492 | ||
1493 | menu "Kernel Features" | |
1494 | ||
3b55658a DM |
1495 | config HAVE_SMP |
1496 | bool | |
1497 | help | |
1498 | This option should be selected by machines which have an SMP- | |
1499 | capable CPU. | |
1500 | ||
1501 | The only effect of this option is to make the SMP-related | |
1502 | options available to the user for configuration. | |
1503 | ||
1da177e4 | 1504 | config SMP |
bb2d8130 | 1505 | bool "Symmetric Multi-Processing" |
fbb4ddac | 1506 | depends on CPU_V6K || CPU_V7 |
bc28248e | 1507 | depends on GENERIC_CLOCKEVENTS |
3b55658a | 1508 | depends on HAVE_SMP |
9934ebb8 | 1509 | depends on MMU |
89c3dedf | 1510 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
b1b3f49c | 1511 | select USE_GENERIC_SMP_HELPERS |
1da177e4 LT |
1512 | help |
1513 | This enables support for systems with more than one CPU. If you have | |
1514 | a system with only one CPU, like most personal computers, say N. If | |
1515 | you have a system with more than one CPU, say Y. | |
1516 | ||
1517 | If you say N here, the kernel will run on single and multiprocessor | |
1518 | machines, but will use only one CPU of a multiprocessor machine. If | |
1519 | you say Y here, the kernel will run on many, but not all, single | |
1520 | processor machines. On a single processor machine, the kernel will | |
1521 | run faster if you say N here. | |
1522 | ||
395cf969 | 1523 | See also <file:Documentation/x86/i386/IO-APIC.txt>, |
1da177e4 | 1524 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1525 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1526 | |
1527 | If you don't know what to do here, say N. | |
1528 | ||
f00ec48f RK |
1529 | config SMP_ON_UP |
1530 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1531 | depends on EXPERIMENTAL | |
4d2692a7 | 1532 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1533 | default y |
1534 | help | |
1535 | SMP kernels contain instructions which fail on non-SMP processors. | |
1536 | Enabling this option allows the kernel to modify itself to make | |
1537 | these instructions safe. Disabling it allows about 1K of space | |
1538 | savings. | |
1539 | ||
1540 | If you don't know what to do here, say Y. | |
1541 | ||
c9018aab VG |
1542 | config ARM_CPU_TOPOLOGY |
1543 | bool "Support cpu topology definition" | |
1544 | depends on SMP && CPU_V7 | |
1545 | default y | |
1546 | help | |
1547 | Support ARM cpu topology definition. The MPIDR register defines | |
1548 | affinity between processors which is then used to describe the cpu | |
1549 | topology of an ARM System. | |
1550 | ||
1551 | config SCHED_MC | |
1552 | bool "Multi-core scheduler support" | |
1553 | depends on ARM_CPU_TOPOLOGY | |
1554 | help | |
1555 | Multi-core scheduler support improves the CPU scheduler's decision | |
1556 | making when dealing with multi-core CPU chips at a cost of slightly | |
1557 | increased overhead in some places. If unsure say N here. | |
1558 | ||
1559 | config SCHED_SMT | |
1560 | bool "SMT scheduler support" | |
1561 | depends on ARM_CPU_TOPOLOGY | |
1562 | help | |
1563 | Improves the CPU scheduler's decision making when dealing with | |
1564 | MultiThreading at a cost of slightly increased overhead in some | |
1565 | places. If unsure say N here. | |
1566 | ||
a8cbcd92 RK |
1567 | config HAVE_ARM_SCU |
1568 | bool | |
a8cbcd92 RK |
1569 | help |
1570 | This option enables support for the ARM system coherency unit | |
1571 | ||
022c03a2 MZ |
1572 | config ARM_ARCH_TIMER |
1573 | bool "Architected timer support" | |
1574 | depends on CPU_V7 | |
1575 | help | |
1576 | This option enables support for the ARM architected timer | |
1577 | ||
f32f4ce2 RK |
1578 | config HAVE_ARM_TWD |
1579 | bool | |
1580 | depends on SMP | |
1581 | help | |
1582 | This options enables support for the ARM timer and watchdog unit | |
1583 | ||
8d5796d2 LB |
1584 | choice |
1585 | prompt "Memory split" | |
1586 | default VMSPLIT_3G | |
1587 | help | |
1588 | Select the desired split between kernel and user memory. | |
1589 | ||
1590 | If you are not absolutely sure what you are doing, leave this | |
1591 | option alone! | |
1592 | ||
1593 | config VMSPLIT_3G | |
1594 | bool "3G/1G user/kernel split" | |
1595 | config VMSPLIT_2G | |
1596 | bool "2G/2G user/kernel split" | |
1597 | config VMSPLIT_1G | |
1598 | bool "1G/3G user/kernel split" | |
1599 | endchoice | |
1600 | ||
1601 | config PAGE_OFFSET | |
1602 | hex | |
1603 | default 0x40000000 if VMSPLIT_1G | |
1604 | default 0x80000000 if VMSPLIT_2G | |
1605 | default 0xC0000000 | |
1606 | ||
1da177e4 LT |
1607 | config NR_CPUS |
1608 | int "Maximum number of CPUs (2-32)" | |
1609 | range 2 32 | |
1610 | depends on SMP | |
1611 | default "4" | |
1612 | ||
a054a811 | 1613 | config HOTPLUG_CPU |
00b7dede RK |
1614 | bool "Support for hot-pluggable CPUs" |
1615 | depends on SMP && HOTPLUG | |
a054a811 RK |
1616 | help |
1617 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1618 | can be controlled through /sys/devices/system/cpu. | |
1619 | ||
37ee16ae RK |
1620 | config LOCAL_TIMERS |
1621 | bool "Use local timer interrupts" | |
971acb9b | 1622 | depends on SMP |
37ee16ae | 1623 | default y |
30d8bead | 1624 | select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) |
37ee16ae RK |
1625 | help |
1626 | Enable support for local timers on SMP platforms, rather then the | |
1627 | legacy IPI broadcast method. Local timers allows the system | |
1628 | accounting to be spread across the timer interval, preventing a | |
1629 | "thundering herd" at every timer tick. | |
1630 | ||
44986ab0 PDSN |
1631 | config ARCH_NR_GPIO |
1632 | int | |
3dea19e8 | 1633 | default 1024 if ARCH_SHMOBILE || ARCH_TEGRA |
70227a45 | 1634 | default 355 if ARCH_U8500 |
9a01ec30 | 1635 | default 264 if MACH_H4700 |
39f47d9f | 1636 | default 512 if SOC_OMAP5 |
e9a91de7 | 1637 | default 288 if ARCH_VT8500 |
44986ab0 PDSN |
1638 | default 0 |
1639 | help | |
1640 | Maximum number of GPIOs in the system. | |
1641 | ||
1642 | If unsure, leave the default value. | |
1643 | ||
d45a398f | 1644 | source kernel/Kconfig.preempt |
1da177e4 | 1645 | |
f8065813 RK |
1646 | config HZ |
1647 | int | |
b130d5c2 | 1648 | default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \ |
a73ddc61 | 1649 | ARCH_S5PV210 || ARCH_EXYNOS4 |
bfe65704 | 1650 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1651 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1652 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1653 | default 100 |
1654 | ||
16c79651 | 1655 | config THUMB2_KERNEL |
00b7dede RK |
1656 | bool "Compile the kernel in Thumb-2 mode" |
1657 | depends on CPU_V7 && !CPU_V6 && !CPU_V6K | |
16c79651 CM |
1658 | select AEABI |
1659 | select ARM_ASM_UNIFIED | |
89bace65 | 1660 | select ARM_UNWIND |
16c79651 CM |
1661 | help |
1662 | By enabling this option, the kernel will be compiled in | |
1663 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1664 | ARM-Thumb syntax is needed. | |
1665 | ||
1666 | If unsure, say N. | |
1667 | ||
6f685c5c DM |
1668 | config THUMB2_AVOID_R_ARM_THM_JUMP11 |
1669 | bool "Work around buggy Thumb-2 short branch relocations in gas" | |
1670 | depends on THUMB2_KERNEL && MODULES | |
1671 | default y | |
1672 | help | |
1673 | Various binutils versions can resolve Thumb-2 branches to | |
1674 | locally-defined, preemptible global symbols as short-range "b.n" | |
1675 | branch instructions. | |
1676 | ||
1677 | This is a problem, because there's no guarantee the final | |
1678 | destination of the symbol, or any candidate locations for a | |
1679 | trampoline, are within range of the branch. For this reason, the | |
1680 | kernel does not support fixing up the R_ARM_THM_JUMP11 (102) | |
1681 | relocation in modules at all, and it makes little sense to add | |
1682 | support. | |
1683 | ||
1684 | The symptom is that the kernel fails with an "unsupported | |
1685 | relocation" error when loading some modules. | |
1686 | ||
1687 | Until fixed tools are available, passing | |
1688 | -fno-optimize-sibling-calls to gcc should prevent gcc generating | |
1689 | code which hits this problem, at the cost of a bit of extra runtime | |
1690 | stack usage in some cases. | |
1691 | ||
1692 | The problem is described in more detail at: | |
1693 | https://bugs.launchpad.net/binutils-linaro/+bug/725126 | |
1694 | ||
1695 | Only Thumb-2 kernels are affected. | |
1696 | ||
1697 | Unless you are sure your tools don't have this problem, say Y. | |
1698 | ||
0becb088 CM |
1699 | config ARM_ASM_UNIFIED |
1700 | bool | |
1701 | ||
704bdda0 NP |
1702 | config AEABI |
1703 | bool "Use the ARM EABI to compile the kernel" | |
1704 | help | |
1705 | This option allows for the kernel to be compiled using the latest | |
1706 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1707 | space environment that is also compiled with EABI. | |
1708 | ||
1709 | Since there are major incompatibilities between the legacy ABI and | |
1710 | EABI, especially with regard to structure member alignment, this | |
1711 | option also changes the kernel syscall calling convention to | |
1712 | disambiguate both ABIs and allow for backward compatibility support | |
1713 | (selected with CONFIG_OABI_COMPAT). | |
1714 | ||
1715 | To use this you need GCC version 4.0.0 or later. | |
1716 | ||
6c90c872 | 1717 | config OABI_COMPAT |
a73a3ff1 | 1718 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
9bc433a1 | 1719 | depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL |
6c90c872 NP |
1720 | default y |
1721 | help | |
1722 | This option preserves the old syscall interface along with the | |
1723 | new (ARM EABI) one. It also provides a compatibility layer to | |
1724 | intercept syscalls that have structure arguments which layout | |
1725 | in memory differs between the legacy ABI and the new ARM EABI | |
1726 | (only for non "thumb" binaries). This option adds a tiny | |
1727 | overhead to all syscalls and produces a slightly larger kernel. | |
1728 | If you know you'll be using only pure EABI user space then you | |
1729 | can say N here. If this option is not selected and you attempt | |
1730 | to execute a legacy ABI binary then the result will be | |
1731 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1732 | at all). If in doubt say Y. | |
1733 | ||
eb33575c | 1734 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1735 | bool |
e80d6a24 | 1736 | |
05944d74 RK |
1737 | config ARCH_SPARSEMEM_ENABLE |
1738 | bool | |
1739 | ||
07a2f737 RK |
1740 | config ARCH_SPARSEMEM_DEFAULT |
1741 | def_bool ARCH_SPARSEMEM_ENABLE | |
1742 | ||
05944d74 | 1743 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1744 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1745 | |
7b7bf499 WD |
1746 | config HAVE_ARCH_PFN_VALID |
1747 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM | |
1748 | ||
053a96ca | 1749 | config HIGHMEM |
e8db89a2 RK |
1750 | bool "High Memory Support" |
1751 | depends on MMU | |
053a96ca NP |
1752 | help |
1753 | The address space of ARM processors is only 4 Gigabytes large | |
1754 | and it has to accommodate user address space, kernel address | |
1755 | space as well as some memory mapped IO. That means that, if you | |
1756 | have a large amount of physical memory and/or IO, not all of the | |
1757 | memory can be "permanently mapped" by the kernel. The physical | |
1758 | memory that is not permanently mapped is called "high memory". | |
1759 | ||
1760 | Depending on the selected kernel/user memory split, minimum | |
1761 | vmalloc space and actual amount of RAM, you may not need this | |
1762 | option which should result in a slightly faster kernel. | |
1763 | ||
1764 | If unsure, say n. | |
1765 | ||
65cec8e3 RK |
1766 | config HIGHPTE |
1767 | bool "Allocate 2nd-level pagetables from highmem" | |
1768 | depends on HIGHMEM | |
65cec8e3 | 1769 | |
1b8873a0 JI |
1770 | config HW_PERF_EVENTS |
1771 | bool "Enable hardware performance counter support for perf events" | |
f0d1bc47 | 1772 | depends on PERF_EVENTS |
1b8873a0 JI |
1773 | default y |
1774 | help | |
1775 | Enable hardware performance counter support for perf events. If | |
1776 | disabled, perf events will use software events only. | |
1777 | ||
3f22ab27 DH |
1778 | source "mm/Kconfig" |
1779 | ||
c1b2d970 MD |
1780 | config FORCE_MAX_ZONEORDER |
1781 | int "Maximum zone order" if ARCH_SHMOBILE | |
1782 | range 11 64 if ARCH_SHMOBILE | |
898f08e1 | 1783 | default "12" if SOC_AM33XX |
c1b2d970 MD |
1784 | default "9" if SA1111 |
1785 | default "11" | |
1786 | help | |
1787 | The kernel memory allocator divides physically contiguous memory | |
1788 | blocks into "zones", where each zone is a power of two number of | |
1789 | pages. This option selects the largest power of two that the kernel | |
1790 | keeps in the memory allocator. If you need to allocate very large | |
1791 | blocks of physically contiguous memory, then you may need to | |
1792 | increase this value. | |
1793 | ||
1794 | This config option is actually maximum order plus one. For example, | |
1795 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1796 | ||
1da177e4 LT |
1797 | config ALIGNMENT_TRAP |
1798 | bool | |
f12d0d7c | 1799 | depends on CPU_CP15_MMU |
1da177e4 | 1800 | default y if !ARCH_EBSA110 |
e119bfff | 1801 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1802 | help |
84eb8d06 | 1803 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1804 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1805 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1806 | fetch/store instructions will be emulated in software if you say | |
1807 | here, which has a severe performance impact. This is necessary for | |
1808 | correct operation of some network protocols. With an IP-only | |
1809 | configuration it is safe to say N, otherwise say Y. | |
1810 | ||
39ec58f3 | 1811 | config UACCESS_WITH_MEMCPY |
38ef2ad5 LW |
1812 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()" |
1813 | depends on MMU | |
39ec58f3 LB |
1814 | default y if CPU_FEROCEON |
1815 | help | |
1816 | Implement faster copy_to_user and clear_user methods for CPU | |
1817 | cores where a 8-word STM instruction give significantly higher | |
1818 | memory write throughput than a sequence of individual 32bit stores. | |
1819 | ||
1820 | A possible side effect is a slight increase in scheduling latency | |
1821 | between threads sharing the same address space if they invoke | |
1822 | such copy operations with large buffers. | |
1823 | ||
1824 | However, if the CPU data cache is using a write-allocate mode, | |
1825 | this option is unlikely to provide any performance gain. | |
1826 | ||
70c70d97 NP |
1827 | config SECCOMP |
1828 | bool | |
1829 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1830 | ---help--- | |
1831 | This kernel feature is useful for number crunching applications | |
1832 | that may need to compute untrusted bytecode during their | |
1833 | execution. By using pipes or other transports made available to | |
1834 | the process as file descriptors supporting the read/write | |
1835 | syscalls, it's possible to isolate those applications in | |
1836 | their own address space using seccomp. Once seccomp is | |
1837 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1838 | and the task is only allowed to execute a few safe syscalls | |
1839 | defined by each seccomp mode. | |
1840 | ||
c743f380 NP |
1841 | config CC_STACKPROTECTOR |
1842 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1843 | depends on EXPERIMENTAL |
c743f380 NP |
1844 | help |
1845 | This option turns on the -fstack-protector GCC feature. This | |
1846 | feature puts, at the beginning of functions, a canary value on | |
1847 | the stack just before the return address, and validates | |
1848 | the value just before actually returning. Stack based buffer | |
1849 | overflows (that need to overwrite this return address) now also | |
1850 | overwrite the canary, which gets detected and the attack is then | |
1851 | neutralized via a kernel panic. | |
1852 | This feature requires gcc version 4.2 or above. | |
1853 | ||
eff8d644 SS |
1854 | config XEN_DOM0 |
1855 | def_bool y | |
1856 | depends on XEN | |
1857 | ||
1858 | config XEN | |
1859 | bool "Xen guest support on ARM (EXPERIMENTAL)" | |
1860 | depends on EXPERIMENTAL && ARM && OF | |
f880b67d | 1861 | depends on CPU_V7 && !CPU_V6 |
eff8d644 SS |
1862 | help |
1863 | Say Y if you want to run Linux in a Virtual Machine on Xen on ARM. | |
1864 | ||
1da177e4 LT |
1865 | endmenu |
1866 | ||
1867 | menu "Boot options" | |
1868 | ||
9eb8f674 GL |
1869 | config USE_OF |
1870 | bool "Flattened Device Tree support" | |
b1b3f49c | 1871 | select IRQ_DOMAIN |
9eb8f674 GL |
1872 | select OF |
1873 | select OF_EARLY_FLATTREE | |
1874 | help | |
1875 | Include support for flattened device tree machine descriptions. | |
1876 | ||
bd51e2f5 NP |
1877 | config ATAGS |
1878 | bool "Support for the traditional ATAGS boot data passing" if USE_OF | |
1879 | default y | |
1880 | help | |
1881 | This is the traditional way of passing data to the kernel at boot | |
1882 | time. If you are solely relying on the flattened device tree (or | |
1883 | the ARM_ATAG_DTB_COMPAT option) then you may unselect this option | |
1884 | to remove ATAGS support from your kernel binary. If unsure, | |
1885 | leave this to y. | |
1886 | ||
1887 | config DEPRECATED_PARAM_STRUCT | |
1888 | bool "Provide old way to pass kernel parameters" | |
1889 | depends on ATAGS | |
1890 | help | |
1891 | This was deprecated in 2001 and announced to live on for 5 years. | |
1892 | Some old boot loaders still use this way. | |
1893 | ||
1da177e4 LT |
1894 | # Compressed boot loader in ROM. Yes, we really want to ask about |
1895 | # TEXT and BSS so we preserve their values in the config files. | |
1896 | config ZBOOT_ROM_TEXT | |
1897 | hex "Compressed ROM boot loader base address" | |
1898 | default "0" | |
1899 | help | |
1900 | The physical address at which the ROM-able zImage is to be | |
1901 | placed in the target. Platforms which normally make use of | |
1902 | ROM-able zImage formats normally set this to a suitable | |
1903 | value in their defconfig file. | |
1904 | ||
1905 | If ZBOOT_ROM is not enabled, this has no effect. | |
1906 | ||
1907 | config ZBOOT_ROM_BSS | |
1908 | hex "Compressed ROM boot loader BSS address" | |
1909 | default "0" | |
1910 | help | |
f8c440b2 DF |
1911 | The base address of an area of read/write memory in the target |
1912 | for the ROM-able zImage which must be available while the | |
1913 | decompressor is running. It must be large enough to hold the | |
1914 | entire decompressed kernel plus an additional 128 KiB. | |
1915 | Platforms which normally make use of ROM-able zImage formats | |
1916 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1917 | |
1918 | If ZBOOT_ROM is not enabled, this has no effect. | |
1919 | ||
1920 | config ZBOOT_ROM | |
1921 | bool "Compressed boot loader in ROM/flash" | |
1922 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1923 | help | |
1924 | Say Y here if you intend to execute your compressed kernel image | |
1925 | (zImage) directly from ROM or flash. If unsure, say N. | |
1926 | ||
090ab3ff SH |
1927 | choice |
1928 | prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" | |
1929 | depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL | |
1930 | default ZBOOT_ROM_NONE | |
1931 | help | |
1932 | Include experimental SD/MMC loading code in the ROM-able zImage. | |
59bf8964 | 1933 | With this enabled it is possible to write the ROM-able zImage |
090ab3ff SH |
1934 | kernel image to an MMC or SD card and boot the kernel straight |
1935 | from the reset vector. At reset the processor Mask ROM will load | |
59bf8964 | 1936 | the first part of the ROM-able zImage which in turn loads the |
090ab3ff SH |
1937 | rest the kernel image to RAM. |
1938 | ||
1939 | config ZBOOT_ROM_NONE | |
1940 | bool "No SD/MMC loader in zImage (EXPERIMENTAL)" | |
1941 | help | |
1942 | Do not load image from SD or MMC | |
1943 | ||
f45b1149 SH |
1944 | config ZBOOT_ROM_MMCIF |
1945 | bool "Include MMCIF loader in zImage (EXPERIMENTAL)" | |
f45b1149 | 1946 | help |
090ab3ff SH |
1947 | Load image from MMCIF hardware block. |
1948 | ||
1949 | config ZBOOT_ROM_SH_MOBILE_SDHI | |
1950 | bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" | |
1951 | help | |
1952 | Load image from SDHI hardware block | |
1953 | ||
1954 | endchoice | |
f45b1149 | 1955 | |
e2a6a3aa JB |
1956 | config ARM_APPENDED_DTB |
1957 | bool "Use appended device tree blob to zImage (EXPERIMENTAL)" | |
1958 | depends on OF && !ZBOOT_ROM && EXPERIMENTAL | |
1959 | help | |
1960 | With this option, the boot code will look for a device tree binary | |
1961 | (DTB) appended to zImage | |
1962 | (e.g. cat zImage <filename>.dtb > zImage_w_dtb). | |
1963 | ||
1964 | This is meant as a backward compatibility convenience for those | |
1965 | systems with a bootloader that can't be upgraded to accommodate | |
1966 | the documented boot protocol using a device tree. | |
1967 | ||
1968 | Beware that there is very little in terms of protection against | |
1969 | this option being confused by leftover garbage in memory that might | |
1970 | look like a DTB header after a reboot if no actual DTB is appended | |
1971 | to zImage. Do not leave this option active in a production kernel | |
1972 | if you don't intend to always append a DTB. Proper passing of the | |
1973 | location into r2 of a bootloader provided DTB is always preferable | |
1974 | to this option. | |
1975 | ||
b90b9a38 NP |
1976 | config ARM_ATAG_DTB_COMPAT |
1977 | bool "Supplement the appended DTB with traditional ATAG information" | |
1978 | depends on ARM_APPENDED_DTB | |
1979 | help | |
1980 | Some old bootloaders can't be updated to a DTB capable one, yet | |
1981 | they provide ATAGs with memory configuration, the ramdisk address, | |
1982 | the kernel cmdline string, etc. Such information is dynamically | |
1983 | provided by the bootloader and can't always be stored in a static | |
1984 | DTB. To allow a device tree enabled kernel to be used with such | |
1985 | bootloaders, this option allows zImage to extract the information | |
1986 | from the ATAG list and store it at run time into the appended DTB. | |
1987 | ||
d0f34a11 GR |
1988 | choice |
1989 | prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT | |
1990 | default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER | |
1991 | ||
1992 | config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER | |
1993 | bool "Use bootloader kernel arguments if available" | |
1994 | help | |
1995 | Uses the command-line options passed by the boot loader instead of | |
1996 | the device tree bootargs property. If the boot loader doesn't provide | |
1997 | any, the device tree bootargs property will be used. | |
1998 | ||
1999 | config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND | |
2000 | bool "Extend with bootloader kernel arguments" | |
2001 | help | |
2002 | The command-line arguments provided by the boot loader will be | |
2003 | appended to the the device tree bootargs property. | |
2004 | ||
2005 | endchoice | |
2006 | ||
1da177e4 LT |
2007 | config CMDLINE |
2008 | string "Default kernel command string" | |
2009 | default "" | |
2010 | help | |
2011 | On some architectures (EBSA110 and CATS), there is currently no way | |
2012 | for the boot loader to pass arguments to the kernel. For these | |
2013 | architectures, you should supply some command-line options at build | |
2014 | time by entering them here. As a minimum, you should specify the | |
2015 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
2016 | ||
4394c124 VB |
2017 | choice |
2018 | prompt "Kernel command line type" if CMDLINE != "" | |
2019 | default CMDLINE_FROM_BOOTLOADER | |
bd51e2f5 | 2020 | depends on ATAGS |
4394c124 VB |
2021 | |
2022 | config CMDLINE_FROM_BOOTLOADER | |
2023 | bool "Use bootloader kernel arguments if available" | |
2024 | help | |
2025 | Uses the command-line options passed by the boot loader. If | |
2026 | the boot loader doesn't provide any, the default kernel command | |
2027 | string provided in CMDLINE will be used. | |
2028 | ||
2029 | config CMDLINE_EXTEND | |
2030 | bool "Extend bootloader kernel arguments" | |
2031 | help | |
2032 | The command-line arguments provided by the boot loader will be | |
2033 | appended to the default kernel command string. | |
2034 | ||
92d2040d AH |
2035 | config CMDLINE_FORCE |
2036 | bool "Always use the default kernel command string" | |
92d2040d AH |
2037 | help |
2038 | Always use the default kernel command string, even if the boot | |
2039 | loader passes other arguments to the kernel. | |
2040 | This is useful if you cannot or don't want to change the | |
2041 | command-line options your boot loader passes to the kernel. | |
4394c124 | 2042 | endchoice |
92d2040d | 2043 | |
1da177e4 LT |
2044 | config XIP_KERNEL |
2045 | bool "Kernel Execute-In-Place from ROM" | |
387798b3 | 2046 | depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM |
1da177e4 LT |
2047 | help |
2048 | Execute-In-Place allows the kernel to run from non-volatile storage | |
2049 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
2050 | space since the text section of the kernel is not loaded from flash | |
2051 | to RAM. Read-write sections, such as the data section and stack, | |
2052 | are still copied to RAM. The XIP kernel is not compressed since | |
2053 | it has to run directly from flash, so it will take more space to | |
2054 | store it. The flash address used to link the kernel object files, | |
2055 | and for storing it, is configuration dependent. Therefore, if you | |
2056 | say Y here, you must know the proper physical address where to | |
2057 | store the kernel image depending on your own flash memory usage. | |
2058 | ||
2059 | Also note that the make target becomes "make xipImage" rather than | |
2060 | "make zImage" or "make Image". The final kernel binary to put in | |
2061 | ROM memory will be arch/arm/boot/xipImage. | |
2062 | ||
2063 | If unsure, say N. | |
2064 | ||
2065 | config XIP_PHYS_ADDR | |
2066 | hex "XIP Kernel Physical Location" | |
2067 | depends on XIP_KERNEL | |
2068 | default "0x00080000" | |
2069 | help | |
2070 | This is the physical address in your flash memory the kernel will | |
2071 | be linked for and stored to. This address is dependent on your | |
2072 | own flash usage. | |
2073 | ||
c587e4a6 RP |
2074 | config KEXEC |
2075 | bool "Kexec system call (EXPERIMENTAL)" | |
02b73e2e | 2076 | depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) |
c587e4a6 RP |
2077 | help |
2078 | kexec is a system call that implements the ability to shutdown your | |
2079 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 2080 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
2081 | you can start any kernel with it, not just Linux. |
2082 | ||
2083 | It is an ongoing process to be certain the hardware in a machine | |
2084 | is properly shutdown, so do not be surprised if this code does not | |
2085 | initially work for you. It may help to enable device hotplugging | |
2086 | support. | |
2087 | ||
4cd9d6f7 RP |
2088 | config ATAGS_PROC |
2089 | bool "Export atags in procfs" | |
bd51e2f5 | 2090 | depends on ATAGS && KEXEC |
b98d7291 | 2091 | default y |
4cd9d6f7 RP |
2092 | help |
2093 | Should the atags used to boot the kernel be exported in an "atags" | |
2094 | file in procfs. Useful with kexec. | |
2095 | ||
cb5d39b3 MW |
2096 | config CRASH_DUMP |
2097 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
2098 | depends on EXPERIMENTAL | |
2099 | help | |
2100 | Generate crash dump after being started by kexec. This should | |
2101 | be normally only set in special crash dump kernels which are | |
2102 | loaded in the main kernel with kexec-tools into a specially | |
2103 | reserved region and then later executed after a crash by | |
2104 | kdump/kexec. The crash dump kernel must be compiled to a | |
2105 | memory address not used by the main kernel | |
2106 | ||
2107 | For more details see Documentation/kdump/kdump.txt | |
2108 | ||
e69edc79 EM |
2109 | config AUTO_ZRELADDR |
2110 | bool "Auto calculation of the decompressed kernel image address" | |
2111 | depends on !ZBOOT_ROM && !ARCH_U300 | |
2112 | help | |
2113 | ZRELADDR is the physical address where the decompressed kernel | |
2114 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
2115 | will be determined at run-time by masking the current IP with | |
2116 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
2117 | from start of memory. | |
2118 | ||
1da177e4 LT |
2119 | endmenu |
2120 | ||
ac9d7efc | 2121 | menu "CPU Power Management" |
1da177e4 | 2122 | |
89c52ed4 | 2123 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
2124 | |
2125 | source "drivers/cpufreq/Kconfig" | |
2126 | ||
64f102b6 YS |
2127 | config CPU_FREQ_IMX |
2128 | tristate "CPUfreq driver for i.MX CPUs" | |
2129 | depends on ARCH_MXC && CPU_FREQ | |
f637c4c9 | 2130 | select CPU_FREQ_TABLE |
64f102b6 YS |
2131 | help |
2132 | This enables the CPUfreq driver for i.MX CPUs. | |
2133 | ||
1da177e4 LT |
2134 | config CPU_FREQ_SA1100 |
2135 | bool | |
1da177e4 LT |
2136 | |
2137 | config CPU_FREQ_SA1110 | |
2138 | bool | |
1da177e4 LT |
2139 | |
2140 | config CPU_FREQ_INTEGRATOR | |
2141 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
2142 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
2143 | default y | |
2144 | help | |
2145 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
2146 | ||
2147 | For details, take a look at <file:Documentation/cpu-freq>. | |
2148 | ||
2149 | If in doubt, say Y. | |
2150 | ||
9e2697ff RK |
2151 | config CPU_FREQ_PXA |
2152 | bool | |
2153 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
2154 | default y | |
2155 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
b1b3f49c | 2156 | select CPU_FREQ_TABLE |
9e2697ff | 2157 | |
9d56c02a BD |
2158 | config CPU_FREQ_S3C |
2159 | bool | |
2160 | help | |
2161 | Internal configuration node for common cpufreq on Samsung SoC | |
2162 | ||
2163 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 2164 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
b130d5c2 | 2165 | depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL |
9d56c02a BD |
2166 | select CPU_FREQ_S3C |
2167 | help | |
2168 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
2169 | of CPUs. | |
2170 | ||
2171 | For details, take a look at <file:Documentation/cpu-freq>. | |
2172 | ||
2173 | If in doubt, say N. | |
2174 | ||
2175 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 2176 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
2177 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
2178 | help | |
2179 | Compile in support for changing the PLL frequency from the | |
2180 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
2181 | after a frequency change, so by default it is not enabled. | |
2182 | ||
2183 | This also means that the PLL tables for the selected CPU(s) will | |
2184 | be built which may increase the size of the kernel image. | |
2185 | ||
2186 | config CPU_FREQ_S3C24XX_DEBUG | |
2187 | bool "Debug CPUfreq Samsung driver core" | |
2188 | depends on CPU_FREQ_S3C24XX | |
2189 | help | |
2190 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
2191 | ||
2192 | config CPU_FREQ_S3C24XX_IODEBUG | |
2193 | bool "Debug CPUfreq Samsung driver IO timing" | |
2194 | depends on CPU_FREQ_S3C24XX | |
2195 | help | |
2196 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
2197 | ||
e6d197a6 BD |
2198 | config CPU_FREQ_S3C24XX_DEBUGFS |
2199 | bool "Export debugfs for CPUFreq" | |
2200 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
2201 | help | |
2202 | Export status information via debugfs. | |
2203 | ||
1da177e4 LT |
2204 | endif |
2205 | ||
ac9d7efc RK |
2206 | source "drivers/cpuidle/Kconfig" |
2207 | ||
2208 | endmenu | |
2209 | ||
1da177e4 LT |
2210 | menu "Floating point emulation" |
2211 | ||
2212 | comment "At least one emulation must be selected" | |
2213 | ||
2214 | config FPE_NWFPE | |
2215 | bool "NWFPE math emulation" | |
593c252a | 2216 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
2217 | ---help--- |
2218 | Say Y to include the NWFPE floating point emulator in the kernel. | |
2219 | This is necessary to run most binaries. Linux does not currently | |
2220 | support floating point hardware so you need to say Y here even if | |
2221 | your machine has an FPA or floating point co-processor podule. | |
2222 | ||
2223 | You may say N here if you are going to load the Acorn FPEmulator | |
2224 | early in the bootup. | |
2225 | ||
2226 | config FPE_NWFPE_XP | |
2227 | bool "Support extended precision" | |
bedf142b | 2228 | depends on FPE_NWFPE |
1da177e4 LT |
2229 | help |
2230 | Say Y to include 80-bit support in the kernel floating-point | |
2231 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
2232 | Note that gcc does not generate 80-bit operations by default, | |
2233 | so in most cases this option only enlarges the size of the | |
2234 | floating point emulator without any good reason. | |
2235 | ||
2236 | You almost surely want to say N here. | |
2237 | ||
2238 | config FPE_FASTFPE | |
2239 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 2240 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
2241 | ---help--- |
2242 | Say Y here to include the FAST floating point emulator in the kernel. | |
2243 | This is an experimental much faster emulator which now also has full | |
2244 | precision for the mantissa. It does not support any exceptions. | |
2245 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
2246 | ||
2247 | It should be sufficient for most programs. It may be not suitable | |
2248 | for scientific calculations, but you have to check this for yourself. | |
2249 | If you do not feel you need a faster FP emulation you should better | |
2250 | choose NWFPE. | |
2251 | ||
2252 | config VFP | |
2253 | bool "VFP-format floating point maths" | |
e399b1a4 | 2254 | depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
2255 | help |
2256 | Say Y to include VFP support code in the kernel. This is needed | |
2257 | if your hardware includes a VFP unit. | |
2258 | ||
2259 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
2260 | release notes and additional status information. | |
2261 | ||
2262 | Say N if your target does not have VFP hardware. | |
2263 | ||
25ebee02 CM |
2264 | config VFPv3 |
2265 | bool | |
2266 | depends on VFP | |
2267 | default y if CPU_V7 | |
2268 | ||
b5872db4 CM |
2269 | config NEON |
2270 | bool "Advanced SIMD (NEON) Extension support" | |
2271 | depends on VFPv3 && CPU_V7 | |
2272 | help | |
2273 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
2274 | Extension. | |
2275 | ||
1da177e4 LT |
2276 | endmenu |
2277 | ||
2278 | menu "Userspace binary formats" | |
2279 | ||
2280 | source "fs/Kconfig.binfmt" | |
2281 | ||
2282 | config ARTHUR | |
2283 | tristate "RISC OS personality" | |
704bdda0 | 2284 | depends on !AEABI |
1da177e4 LT |
2285 | help |
2286 | Say Y here to include the kernel code necessary if you want to run | |
2287 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
2288 | experimental; if this sounds frightening, say N and sleep in peace. | |
2289 | You can also say M here to compile this support as a module (which | |
2290 | will be called arthur). | |
2291 | ||
2292 | endmenu | |
2293 | ||
2294 | menu "Power management options" | |
2295 | ||
eceab4ac | 2296 | source "kernel/power/Kconfig" |
1da177e4 | 2297 | |
f4cb5700 | 2298 | config ARCH_SUSPEND_POSSIBLE |
4b1082ca | 2299 | depends on !ARCH_S5PC100 |
6a786182 | 2300 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
3f5d0819 | 2301 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK |
f4cb5700 JB |
2302 | def_bool y |
2303 | ||
15e0d9e3 AB |
2304 | config ARM_CPU_SUSPEND |
2305 | def_bool PM_SLEEP | |
2306 | ||
1da177e4 LT |
2307 | endmenu |
2308 | ||
d5950b43 SR |
2309 | source "net/Kconfig" |
2310 | ||
ac25150f | 2311 | source "drivers/Kconfig" |
1da177e4 LT |
2312 | |
2313 | source "fs/Kconfig" | |
2314 | ||
1da177e4 LT |
2315 | source "arch/arm/Kconfig.debug" |
2316 | ||
2317 | source "security/Kconfig" | |
2318 | ||
2319 | source "crypto/Kconfig" | |
2320 | ||
2321 | source "lib/Kconfig" |