ARM: move L1_CACHE_SHIFT_6 to mm/Kconfig
[deliverable/linux.git] / arch / arm / Kconfig
CommitLineData
1da177e4
LT
1config ARM
2 bool
3 default y
e17c6d56 4 select HAVE_AOUT
24056f52 5 select HAVE_DMA_API_DEBUG
2064c946 6 select HAVE_IDE
2778f620 7 select HAVE_MEMBLOCK
12b824fb 8 select RTC_LIB
75e7153a 9 select SYS_SUPPORTS_APM_EMULATION
d4c7b1f9 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
fe166148 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
5cbad0eb 12 select HAVE_ARCH_KGDB
ed7c84d5 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
9edddaa2 14 select HAVE_KRETPROBES if (HAVE_KPROBES)
606576ce 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
80be7a7f
RV
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
0e341af8 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
1fe53268 19 select HAVE_GENERIC_DMA_COHERENT
e7db7b42
AT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
6e8699f7 22 select HAVE_KERNEL_LZMA
e360adbe 23 select HAVE_IRQ_WORK
7ada189f
JI
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
e513f8bf 26 select HAVE_REGS_AND_STACK_ACCESS_API
19852e59 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
ed60453f 28 select HAVE_C_RECORDMCOUNT
e2a93ecc
LB
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
1da177e4
LT
31 help
32 The ARM series is a line of low-power-consumption RISC chip designs
f6c8965a 33 licensed by ARM Ltd and targeted at embedded applications and
1da177e4 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
f6c8965a 35 manufactured, but legacy ARM-based PC hardware remains popular in
1da177e4
LT
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
38
1a189b97
RK
39config HAVE_PWM
40 bool
41
0b05da72
HUK
42config MIGHT_HAVE_PCI
43 bool
44
75e7153a
RB
45config SYS_SUPPORTS_APM_EMULATION
46 bool
47
112f38a4
RK
48config HAVE_SCHED_CLOCK
49 bool
50
0a938b97
DB
51config GENERIC_GPIO
52 bool
0a938b97 53
5cfc8ee0
JS
54config ARCH_USES_GETTIMEOFFSET
55 bool
56 default n
746140c7 57
0567a0c0
KH
58config GENERIC_CLOCKEVENTS
59 bool
0567a0c0 60
a8655e83
CM
61config GENERIC_CLOCKEVENTS_BROADCAST
62 bool
63 depends on GENERIC_CLOCKEVENTS
5388a6b2 64 default y if SMP
a8655e83 65
bc581770
LW
66config HAVE_TCM
67 bool
68 select GENERIC_ALLOCATOR
69
e119bfff
RK
70config HAVE_PROC_CPU
71 bool
72
5ea81769
AV
73config NO_IOPORT
74 bool
5ea81769 75
1da177e4
LT
76config EISA
77 bool
78 ---help---
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
81
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
86
87 Say Y here if you are building a kernel for an EISA-based machine.
88
89 Otherwise, say N.
90
91config SBUS
92 bool
93
94config MCA
95 bool
96 help
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
101
f16fb1ec
RK
102config STACKTRACE_SUPPORT
103 bool
104 default y
105
f76e9154
NP
106config HAVE_LATENCYTOP_SUPPORT
107 bool
108 depends on !SMP
109 default y
110
f16fb1ec
RK
111config LOCKDEP_SUPPORT
112 bool
113 default y
114
7ad1bcb2
RK
115config TRACE_IRQFLAGS_SUPPORT
116 bool
117 default y
118
4a2581a0
TG
119config HARDIRQS_SW_RESEND
120 bool
121 default y
122
123config GENERIC_IRQ_PROBE
124 bool
125 default y
126
95c354fe
NP
127config GENERIC_LOCKBREAK
128 bool
129 default y
130 depends on SMP && PREEMPT
131
1da177e4
LT
132config RWSEM_GENERIC_SPINLOCK
133 bool
134 default y
135
136config RWSEM_XCHGADD_ALGORITHM
137 bool
138
f0d1b0b3
DH
139config ARCH_HAS_ILOG2_U32
140 bool
f0d1b0b3
DH
141
142config ARCH_HAS_ILOG2_U64
143 bool
f0d1b0b3 144
89c52ed4
BD
145config ARCH_HAS_CPUFREQ
146 bool
147 help
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
150 it.
151
c7b0aff4
KH
152config ARCH_HAS_CPU_IDLE_WAIT
153 def_bool y
154
b89c3b16
AM
155config GENERIC_HWEIGHT
156 bool
157 default y
158
1da177e4
LT
159config GENERIC_CALIBRATE_DELAY
160 bool
161 default y
162
a08b6b79
Z
163config ARCH_MAY_HAVE_PC_FDC
164 bool
165
5ac6da66
CL
166config ZONE_DMA
167 bool
5ac6da66 168
ccd7ab7f
FT
169config NEED_DMA_MAP_STATE
170 def_bool y
171
1da177e4
LT
172config GENERIC_ISA_DMA
173 bool
174
1da177e4
LT
175config FIQ
176 bool
177
034d2f5a
AV
178config ARCH_MTD_XIP
179 bool
180
c760fc19
HC
181config VECTORS_BASE
182 hex
6afd6fae 183 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
c760fc19
HC
184 default DRAM_BASE if REMAP_VECTORS_TO_RAM
185 default 0x00000000
186 help
187 The base address of exception vectors.
188
1da177e4
LT
189source "init/Kconfig"
190
dc52ddc0
MH
191source "kernel/Kconfig.freezer"
192
1da177e4
LT
193menu "System Type"
194
3c427975
HC
195config MMU
196 bool "MMU-based Paged Memory Management Support"
197 default y
198 help
199 Select if you want MMU-based virtualised addressing space
200 support by paged memory management. If unsure, say 'Y'.
201
ccf50e23
RK
202#
203# The "ARM system type" choice list is ordered alphabetically by option
204# text. Please add new entries in the option alphabetic order.
205#
1da177e4
LT
206choice
207 prompt "ARM system type"
6a0e2430 208 default ARCH_VERSATILE
1da177e4 209
4af6fee1
DS
210config ARCH_AAEC2000
211 bool "Agilent AAEC-2000 based"
c750815e 212 select CPU_ARM920T
4af6fee1 213 select ARM_AMBA
9483a578 214 select HAVE_CLK
5cfc8ee0 215 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
216 help
217 This enables support for systems based on the Agilent AAEC-2000
218
219config ARCH_INTEGRATOR
220 bool "ARM Ltd. Integrator family"
221 select ARM_AMBA
89c52ed4 222 select ARCH_HAS_CPUFREQ
6d803ba7 223 select CLKDEV_LOOKUP
c5a0adb5 224 select ICST
13edd86d 225 select GENERIC_CLOCKEVENTS
f4b8b319 226 select PLAT_VERSATILE
4af6fee1
DS
227 help
228 Support for ARM's Integrator platform.
229
230config ARCH_REALVIEW
231 bool "ARM Ltd. RealView family"
232 select ARM_AMBA
6d803ba7 233 select CLKDEV_LOOKUP
1da0c89c 234 select HAVE_SCHED_CLOCK
c5a0adb5 235 select ICST
ae30ceac 236 select GENERIC_CLOCKEVENTS
eb7fffa3 237 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 238 select PLAT_VERSATILE
e3887714 239 select ARM_TIMER_SP804
b56ba8aa 240 select GPIO_PL061 if GPIOLIB
4af6fee1
DS
241 help
242 This enables support for ARM Ltd RealView boards.
243
244config ARCH_VERSATILE
245 bool "ARM Ltd. Versatile family"
246 select ARM_AMBA
247 select ARM_VIC
6d803ba7 248 select CLKDEV_LOOKUP
1da0c89c 249 select HAVE_SCHED_CLOCK
c5a0adb5 250 select ICST
89df1272 251 select GENERIC_CLOCKEVENTS
bbeddc43 252 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 253 select PLAT_VERSATILE
e3887714 254 select ARM_TIMER_SP804
4af6fee1
DS
255 help
256 This enables support for ARM Ltd Versatile board.
257
ceade897
RK
258config ARCH_VEXPRESS
259 bool "ARM Ltd. Versatile Express family"
260 select ARCH_WANT_OPTIONAL_GPIOLIB
261 select ARM_AMBA
262 select ARM_TIMER_SP804
6d803ba7 263 select CLKDEV_LOOKUP
ceade897 264 select GENERIC_CLOCKEVENTS
ceade897 265 select HAVE_CLK
0af85dda 266 select HAVE_SCHED_CLOCK
ceade897
RK
267 select ICST
268 select PLAT_VERSATILE
269 help
270 This enables support for the ARM Ltd Versatile Express boards.
271
8fc5ffa0
AV
272config ARCH_AT91
273 bool "Atmel AT91"
f373e8c0 274 select ARCH_REQUIRE_GPIOLIB
93686ae8 275 select HAVE_CLK
4af6fee1 276 help
2b3b3516
AV
277 This enables support for systems based on the Atmel AT91RM9200,
278 AT91SAM9 and AT91CAP9 processors.
4af6fee1 279
ccf50e23
RK
280config ARCH_BCMRING
281 bool "Broadcom BCMRING"
282 depends on MMU
283 select CPU_V6
284 select ARM_AMBA
6d803ba7 285 select CLKDEV_LOOKUP
ccf50e23
RK
286 select GENERIC_CLOCKEVENTS
287 select ARCH_WANT_OPTIONAL_GPIOLIB
288 help
289 Support for Broadcom's BCMRing platform.
290
1da177e4 291config ARCH_CLPS711X
4af6fee1 292 bool "Cirrus Logic CLPS711x/EP721x-based"
c750815e 293 select CPU_ARM720T
5cfc8ee0 294 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
295 help
296 Support for Cirrus Logic 711x/721x based boards.
1da177e4 297
d94f944e
AV
298config ARCH_CNS3XXX
299 bool "Cavium Networks CNS3XXX family"
300 select CPU_V6
d94f944e
AV
301 select GENERIC_CLOCKEVENTS
302 select ARM_GIC
0b05da72 303 select MIGHT_HAVE_PCI
5f32f7a0 304 select PCI_DOMAINS if PCI
d94f944e
AV
305 help
306 Support for Cavium Networks CNS3XXX platform.
307
788c9700
RK
308config ARCH_GEMINI
309 bool "Cortina Systems Gemini"
310 select CPU_FA526
788c9700 311 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 312 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
313 help
314 Support for the Cortina Systems Gemini family SoCs
315
1da177e4
LT
316config ARCH_EBSA110
317 bool "EBSA-110"
c750815e 318 select CPU_SA110
f7e68bbf 319 select ISA
c5eb2a2b 320 select NO_IOPORT
5cfc8ee0 321 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
322 help
323 This is an evaluation board for the StrongARM processor available
f6c8965a 324 from Digital. It has limited hardware on-board, including an
1da177e4
LT
325 Ethernet interface, two PCMCIA sockets, two serial ports and a
326 parallel port.
327
e7736d47
LB
328config ARCH_EP93XX
329 bool "EP93xx-based"
c750815e 330 select CPU_ARM920T
e7736d47
LB
331 select ARM_AMBA
332 select ARM_VIC
6d803ba7 333 select CLKDEV_LOOKUP
7444a72e 334 select ARCH_REQUIRE_GPIOLIB
eb33575c 335 select ARCH_HAS_HOLES_MEMORYMODEL
5cfc8ee0 336 select ARCH_USES_GETTIMEOFFSET
e7736d47
LB
337 help
338 This enables support for the Cirrus EP93xx series of CPUs.
339
1da177e4
LT
340config ARCH_FOOTBRIDGE
341 bool "FootBridge"
c750815e 342 select CPU_SA110
1da177e4 343 select FOOTBRIDGE
5cfc8ee0 344 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
345 help
346 Support for systems based on the DC21285 companion chip
347 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
1da177e4 348
788c9700
RK
349config ARCH_MXC
350 bool "Freescale MXC/iMX-based"
788c9700 351 select GENERIC_CLOCKEVENTS
788c9700 352 select ARCH_REQUIRE_GPIOLIB
6d803ba7 353 select CLKDEV_LOOKUP
788c9700
RK
354 help
355 Support for Freescale MXC/iMX-based family of processors
356
1d3f33d5
SG
357config ARCH_MXS
358 bool "Freescale MXS-based"
359 select GENERIC_CLOCKEVENTS
360 select ARCH_REQUIRE_GPIOLIB
b9214b97 361 select CLKDEV_LOOKUP
1d3f33d5
SG
362 help
363 Support for Freescale MXS-based family of processors
364
7bd0f2f5 365config ARCH_STMP3XXX
366 bool "Freescale STMP3xxx"
367 select CPU_ARM926T
6d803ba7 368 select CLKDEV_LOOKUP
7bd0f2f5 369 select ARCH_REQUIRE_GPIOLIB
7bd0f2f5 370 select GENERIC_CLOCKEVENTS
7bd0f2f5 371 select USB_ARCH_HAS_EHCI
372 help
373 Support for systems based on the Freescale 3xxx CPUs.
374
4af6fee1
DS
375config ARCH_NETX
376 bool "Hilscher NetX based"
c750815e 377 select CPU_ARM926T
4af6fee1 378 select ARM_VIC
2fcfe6b8 379 select GENERIC_CLOCKEVENTS
f999b8bd 380 help
4af6fee1
DS
381 This enables support for systems based on the Hilscher NetX Soc
382
383config ARCH_H720X
384 bool "Hynix HMS720x-based"
c750815e 385 select CPU_ARM720T
4af6fee1 386 select ISA_DMA_API
5cfc8ee0 387 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
388 help
389 This enables support for systems based on the Hynix HMS720x
390
3b938be6
RK
391config ARCH_IOP13XX
392 bool "IOP13xx-based"
393 depends on MMU
c750815e 394 select CPU_XSC3
3b938be6
RK
395 select PLAT_IOP
396 select PCI
397 select ARCH_SUPPORTS_MSI
8d5796d2 398 select VMSPLIT_1G
3b938be6
RK
399 help
400 Support for Intel's IOP13XX (XScale) family of processors.
401
3f7e5815
LB
402config ARCH_IOP32X
403 bool "IOP32x-based"
a4f7e763 404 depends on MMU
c750815e 405 select CPU_XSCALE
7ae1f7ec 406 select PLAT_IOP
f7e68bbf 407 select PCI
bb2b180c 408 select ARCH_REQUIRE_GPIOLIB
f999b8bd 409 help
3f7e5815
LB
410 Support for Intel's 80219 and IOP32X (XScale) family of
411 processors.
412
413config ARCH_IOP33X
414 bool "IOP33x-based"
415 depends on MMU
c750815e 416 select CPU_XSCALE
7ae1f7ec 417 select PLAT_IOP
3f7e5815 418 select PCI
bb2b180c 419 select ARCH_REQUIRE_GPIOLIB
3f7e5815
LB
420 help
421 Support for Intel's IOP33X (XScale) family of processors.
1da177e4 422
3b938be6
RK
423config ARCH_IXP23XX
424 bool "IXP23XX-based"
a4f7e763 425 depends on MMU
c750815e 426 select CPU_XSC3
3b938be6 427 select PCI
5cfc8ee0 428 select ARCH_USES_GETTIMEOFFSET
f999b8bd 429 help
3b938be6 430 Support for Intel's IXP23xx (XScale) family of processors.
1da177e4
LT
431
432config ARCH_IXP2000
433 bool "IXP2400/2800-based"
a4f7e763 434 depends on MMU
c750815e 435 select CPU_XSCALE
f7e68bbf 436 select PCI
5cfc8ee0 437 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
438 help
439 Support for Intel's IXP2400/2800 (XScale) family of processors.
1da177e4 440
3b938be6
RK
441config ARCH_IXP4XX
442 bool "IXP4xx-based"
a4f7e763 443 depends on MMU
c750815e 444 select CPU_XSCALE
8858e9af 445 select GENERIC_GPIO
3b938be6 446 select GENERIC_CLOCKEVENTS
5b0d495c 447 select HAVE_SCHED_CLOCK
0b05da72 448 select MIGHT_HAVE_PCI
485bdde7 449 select DMABOUNCE if PCI
c4713074 450 help
3b938be6 451 Support for Intel's IXP4XX (XScale) family of processors.
c4713074 452
edabd38e
SB
453config ARCH_DOVE
454 bool "Marvell Dove"
455 select PCI
edabd38e 456 select ARCH_REQUIRE_GPIOLIB
edabd38e
SB
457 select GENERIC_CLOCKEVENTS
458 select PLAT_ORION
459 help
460 Support for the Marvell Dove SoC 88AP510
461
651c74c7
SB
462config ARCH_KIRKWOOD
463 bool "Marvell Kirkwood"
c750815e 464 select CPU_FEROCEON
651c74c7 465 select PCI
a8865655 466 select ARCH_REQUIRE_GPIOLIB
651c74c7
SB
467 select GENERIC_CLOCKEVENTS
468 select PLAT_ORION
469 help
470 Support for the following Marvell Kirkwood series SoCs:
471 88F6180, 88F6192 and 88F6281.
472
777f9beb
LB
473config ARCH_LOKI
474 bool "Marvell Loki (88RC8480)"
c750815e 475 select CPU_FEROCEON
777f9beb
LB
476 select GENERIC_CLOCKEVENTS
477 select PLAT_ORION
478 help
479 Support for the Marvell Loki (88RC8480) SoC.
480
40805949
KW
481config ARCH_LPC32XX
482 bool "NXP LPC32XX"
483 select CPU_ARM926T
484 select ARCH_REQUIRE_GPIOLIB
485 select HAVE_IDE
486 select ARM_AMBA
487 select USB_ARCH_HAS_OHCI
6d803ba7 488 select CLKDEV_LOOKUP
40805949
KW
489 select GENERIC_TIME
490 select GENERIC_CLOCKEVENTS
491 help
492 Support for the NXP LPC32XX family of processors
493
794d15b2
SS
494config ARCH_MV78XX0
495 bool "Marvell MV78xx0"
c750815e 496 select CPU_FEROCEON
794d15b2 497 select PCI
a8865655 498 select ARCH_REQUIRE_GPIOLIB
794d15b2
SS
499 select GENERIC_CLOCKEVENTS
500 select PLAT_ORION
501 help
502 Support for the following Marvell MV78xx0 series SoCs:
503 MV781x0, MV782x0.
504
9dd0b194 505config ARCH_ORION5X
585cf175
TP
506 bool "Marvell Orion"
507 depends on MMU
c750815e 508 select CPU_FEROCEON
038ee083 509 select PCI
a8865655 510 select ARCH_REQUIRE_GPIOLIB
51cbff1d 511 select GENERIC_CLOCKEVENTS
69b02f6a 512 select PLAT_ORION
585cf175 513 help
9dd0b194 514 Support for the following Marvell Orion 5x series SoCs:
d2b2a6bb 515 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
d323ade1 516 Orion-2 (5281), Orion-1-90 (6183).
585cf175 517
788c9700 518config ARCH_MMP
2f7e8fae 519 bool "Marvell PXA168/910/MMP2"
788c9700 520 depends on MMU
788c9700 521 select ARCH_REQUIRE_GPIOLIB
6d803ba7 522 select CLKDEV_LOOKUP
788c9700 523 select GENERIC_CLOCKEVENTS
28bb7bc6 524 select HAVE_SCHED_CLOCK
788c9700
RK
525 select TICK_ONESHOT
526 select PLAT_PXA
0bd86961 527 select SPARSE_IRQ
788c9700 528 help
2f7e8fae 529 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
788c9700
RK
530
531config ARCH_KS8695
532 bool "Micrel/Kendin KS8695"
533 select CPU_ARM922T
98830bc9 534 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 535 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
536 help
537 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
538 System-on-Chip devices.
539
540config ARCH_NS9XXX
541 bool "NetSilicon NS9xxx"
542 select CPU_ARM926T
543 select GENERIC_GPIO
788c9700
RK
544 select GENERIC_CLOCKEVENTS
545 select HAVE_CLK
546 help
547 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
548 System.
549
550 <http://www.digi.com/products/microprocessors/index.jsp>
551
552config ARCH_W90X900
553 bool "Nuvoton W90X900 CPU"
554 select CPU_ARM926T
c52d3d68 555 select ARCH_REQUIRE_GPIOLIB
6d803ba7 556 select CLKDEV_LOOKUP
58b5369e 557 select GENERIC_CLOCKEVENTS
788c9700 558 help
a8bc4ead 559 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
560 At present, the w90x900 has been renamed nuc900, regarding
561 the ARM series product line, you can login the following
562 link address to know more.
563
564 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
565 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
788c9700 566
a62e9030 567config ARCH_NUC93X
568 bool "Nuvoton NUC93X CPU"
569 select CPU_ARM926T
6d803ba7 570 select CLKDEV_LOOKUP
a62e9030 571 help
572 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
573 low-power and high performance MPEG-4/JPEG multimedia controller chip.
574
c5f80065
EG
575config ARCH_TEGRA
576 bool "NVIDIA Tegra"
4073723a 577 select CLKDEV_LOOKUP
c5f80065
EG
578 select GENERIC_TIME
579 select GENERIC_CLOCKEVENTS
580 select GENERIC_GPIO
581 select HAVE_CLK
e3f4c0ab 582 select HAVE_SCHED_CLOCK
c5f80065 583 select ARCH_HAS_BARRIERS if CACHE_L2X0
7056d423 584 select ARCH_HAS_CPUFREQ
c5f80065
EG
585 help
586 This enables support for NVIDIA Tegra based systems (Tegra APX,
587 Tegra 6xx and Tegra 2 series).
588
4af6fee1
DS
589config ARCH_PNX4008
590 bool "Philips Nexperia PNX4008 Mobile"
c750815e 591 select CPU_ARM926T
6d803ba7 592 select CLKDEV_LOOKUP
5cfc8ee0 593 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
594 help
595 This enables support for Philips PNX4008 mobile platform.
596
1da177e4 597config ARCH_PXA
2c8086a5 598 bool "PXA2xx/PXA3xx-based"
a4f7e763 599 depends on MMU
034d2f5a 600 select ARCH_MTD_XIP
89c52ed4 601 select ARCH_HAS_CPUFREQ
6d803ba7 602 select CLKDEV_LOOKUP
7444a72e 603 select ARCH_REQUIRE_GPIOLIB
981d0f39 604 select GENERIC_CLOCKEVENTS
7ce83018 605 select HAVE_SCHED_CLOCK
a88264c2 606 select TICK_ONESHOT
bd5ce433 607 select PLAT_PXA
6ac6b817 608 select SPARSE_IRQ
f999b8bd 609 help
2c8086a5 610 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
1da177e4 611
788c9700
RK
612config ARCH_MSM
613 bool "Qualcomm MSM"
4b536b8d 614 select HAVE_CLK
49cbe786 615 select GENERIC_CLOCKEVENTS
923a081c 616 select ARCH_REQUIRE_GPIOLIB
49cbe786 617 help
4b53eb4f
DW
618 Support for Qualcomm MSM/QSD based systems. This runs on the
619 apps processor of the MSM/QSD and depends on a shared memory
620 interface to the modem processor which runs the baseband
621 stack and controls some vital subsystems
622 (clock and power control, etc).
49cbe786 623
c793c1b0 624config ARCH_SHMOBILE
6d72ad35
PM
625 bool "Renesas SH-Mobile / R-Mobile"
626 select HAVE_CLK
5e93c6b4 627 select CLKDEV_LOOKUP
6d72ad35
PM
628 select GENERIC_CLOCKEVENTS
629 select NO_IOPORT
630 select SPARSE_IRQ
60f1435c 631 select MULTI_IRQ_HANDLER
c793c1b0 632 help
6d72ad35 633 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
c793c1b0 634
1da177e4
LT
635config ARCH_RPC
636 bool "RiscPC"
637 select ARCH_ACORN
638 select FIQ
639 select TIMER_ACORN
a08b6b79 640 select ARCH_MAY_HAVE_PC_FDC
341eb781 641 select HAVE_PATA_PLATFORM
065909b9 642 select ISA_DMA_API
5ea81769 643 select NO_IOPORT
07f841b7 644 select ARCH_SPARSEMEM_ENABLE
5cfc8ee0 645 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
646 help
647 On the Acorn Risc-PC, Linux can support the internal IDE disk and
648 CD-ROM interface, serial and parallel port, and the floppy drive.
649
650config ARCH_SA1100
651 bool "SA1100-based"
c750815e 652 select CPU_SA1100
f7e68bbf 653 select ISA
05944d74 654 select ARCH_SPARSEMEM_ENABLE
034d2f5a 655 select ARCH_MTD_XIP
89c52ed4 656 select ARCH_HAS_CPUFREQ
1937f5b9 657 select CPU_FREQ
3e238be2 658 select GENERIC_CLOCKEVENTS
9483a578 659 select HAVE_CLK
5094b92f 660 select HAVE_SCHED_CLOCK
3e238be2 661 select TICK_ONESHOT
7444a72e 662 select ARCH_REQUIRE_GPIOLIB
f999b8bd
MM
663 help
664 Support for StrongARM 11x0 based boards.
1da177e4
LT
665
666config ARCH_S3C2410
63b1f51b 667 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
0a938b97 668 select GENERIC_GPIO
9d56c02a 669 select ARCH_HAS_CPUFREQ
9483a578 670 select HAVE_CLK
5cfc8ee0 671 select ARCH_USES_GETTIMEOFFSET
20676c15 672 select HAVE_S3C2410_I2C if I2C
1da177e4
LT
673 help
674 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
675 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
f6c8965a 676 the Samsung SMDK2410 development board (and derivatives).
1da177e4 677
63b1f51b
BD
678 Note, the S3C2416 and the S3C2450 are so close that they even share
679 the same SoC ID code. This means that there is no seperate machine
680 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
681
a08ab637
BD
682config ARCH_S3C64XX
683 bool "Samsung S3C64XX"
89f1fa08 684 select PLAT_SAMSUNG
89f0ce72 685 select CPU_V6
89f0ce72 686 select ARM_VIC
a08ab637 687 select HAVE_CLK
89f0ce72 688 select NO_IOPORT
5cfc8ee0 689 select ARCH_USES_GETTIMEOFFSET
89c52ed4 690 select ARCH_HAS_CPUFREQ
89f0ce72
BD
691 select ARCH_REQUIRE_GPIOLIB
692 select SAMSUNG_CLKSRC
693 select SAMSUNG_IRQ_VIC_TIMER
694 select SAMSUNG_IRQ_UART
695 select S3C_GPIO_TRACK
696 select S3C_GPIO_PULL_UPDOWN
697 select S3C_GPIO_CFG_S3C24XX
698 select S3C_GPIO_CFG_S3C64XX
699 select S3C_DEV_NAND
700 select USB_ARCH_HAS_OHCI
701 select SAMSUNG_GPIOLIB_4BIT
20676c15 702 select HAVE_S3C2410_I2C if I2C
c39d8d55 703 select HAVE_S3C2410_WATCHDOG if WATCHDOG
a08ab637
BD
704 help
705 Samsung S3C64XX series based systems
706
49b7a491
KK
707config ARCH_S5P64X0
708 bool "Samsung S5P6440 S5P6450"
c4ffccdd
KK
709 select CPU_V6
710 select GENERIC_GPIO
711 select HAVE_CLK
c39d8d55 712 select HAVE_S3C2410_WATCHDOG if WATCHDOG
925c68cd 713 select ARCH_USES_GETTIMEOFFSET
20676c15 714 select HAVE_S3C2410_I2C if I2C
754961a8 715 select HAVE_S3C_RTC if RTC_CLASS
c4ffccdd 716 help
49b7a491
KK
717 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
718 SMDK6450.
c4ffccdd 719
550db7f1
KK
720config ARCH_S5P6442
721 bool "Samsung S5P6442"
722 select CPU_V6
723 select GENERIC_GPIO
724 select HAVE_CLK
925c68cd 725 select ARCH_USES_GETTIMEOFFSET
c39d8d55 726 select HAVE_S3C2410_WATCHDOG if WATCHDOG
550db7f1
KK
727 help
728 Samsung S5P6442 CPU based systems
729
acc84707
MS
730config ARCH_S5PC100
731 bool "Samsung S5PC100"
5a7652f2
BM
732 select GENERIC_GPIO
733 select HAVE_CLK
734 select CPU_V7
d6d502fa 735 select ARM_L1_CACHE_SHIFT_6
925c68cd 736 select ARCH_USES_GETTIMEOFFSET
20676c15 737 select HAVE_S3C2410_I2C if I2C
754961a8 738 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 739 select HAVE_S3C2410_WATCHDOG if WATCHDOG
5a7652f2 740 help
acc84707 741 Samsung S5PC100 series based systems
5a7652f2 742
170f4e42
KK
743config ARCH_S5PV210
744 bool "Samsung S5PV210/S5PC110"
745 select CPU_V7
eecb6a84 746 select ARCH_SPARSEMEM_ENABLE
170f4e42
KK
747 select GENERIC_GPIO
748 select HAVE_CLK
749 select ARM_L1_CACHE_SHIFT_6
d8144aea 750 select ARCH_HAS_CPUFREQ
925c68cd 751 select ARCH_USES_GETTIMEOFFSET
20676c15 752 select HAVE_S3C2410_I2C if I2C
754961a8 753 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 754 select HAVE_S3C2410_WATCHDOG if WATCHDOG
170f4e42
KK
755 help
756 Samsung S5PV210/S5PC110 series based systems
757
cc0e72b8
CY
758config ARCH_S5PV310
759 bool "Samsung S5PV310/S5PC210"
760 select CPU_V7
f567fa6f 761 select ARCH_SPARSEMEM_ENABLE
cc0e72b8
CY
762 select GENERIC_GPIO
763 select HAVE_CLK
b333fb16 764 select ARCH_HAS_CPUFREQ
cc0e72b8 765 select GENERIC_CLOCKEVENTS
754961a8 766 select HAVE_S3C_RTC if RTC_CLASS
20676c15 767 select HAVE_S3C2410_I2C if I2C
c39d8d55 768 select HAVE_S3C2410_WATCHDOG if WATCHDOG
cc0e72b8
CY
769 help
770 Samsung S5PV310 series based systems
771
1da177e4
LT
772config ARCH_SHARK
773 bool "Shark"
c750815e 774 select CPU_SA110
f7e68bbf
RK
775 select ISA
776 select ISA_DMA
3bca103a 777 select ZONE_DMA
f7e68bbf 778 select PCI
5cfc8ee0 779 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
780 help
781 Support for the StrongARM based Digital DNARD machine, also known
782 as "Shark" (<http://www.shark-linux.de/shark.html>).
1da177e4 783
83ef3338
HK
784config ARCH_TCC_926
785 bool "Telechips TCC ARM926-based systems"
786 select CPU_ARM926T
787 select HAVE_CLK
6d803ba7 788 select CLKDEV_LOOKUP
83ef3338
HK
789 select GENERIC_CLOCKEVENTS
790 help
791 Support for Telechips TCC ARM926-based systems.
792
1da177e4
LT
793config ARCH_LH7A40X
794 bool "Sharp LH7A40X"
c750815e 795 select CPU_ARM922T
4ba3f7c5 796 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
5cfc8ee0 797 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
798 help
799 Say Y here for systems based on one of the Sharp LH7A40X
800 System on a Chip processors. These CPUs include an ARM922T
801 core with a wide array of integrated devices for
802 hand-held and low-power applications.
803
d98aac75
LW
804config ARCH_U300
805 bool "ST-Ericsson U300 Series"
806 depends on MMU
807 select CPU_ARM926T
5c21b7ca 808 select HAVE_SCHED_CLOCK
bc581770 809 select HAVE_TCM
d98aac75
LW
810 select ARM_AMBA
811 select ARM_VIC
d98aac75 812 select GENERIC_CLOCKEVENTS
6d803ba7 813 select CLKDEV_LOOKUP
d98aac75
LW
814 select GENERIC_GPIO
815 help
816 Support for ST-Ericsson U300 series mobile platforms.
817
ccf50e23
RK
818config ARCH_U8500
819 bool "ST-Ericsson U8500 Series"
820 select CPU_V7
821 select ARM_AMBA
ccf50e23 822 select GENERIC_CLOCKEVENTS
6d803ba7 823 select CLKDEV_LOOKUP
94bdc0e2 824 select ARCH_REQUIRE_GPIOLIB
7c1a70e9 825 select ARCH_HAS_CPUFREQ
ccf50e23
RK
826 help
827 Support for ST-Ericsson's Ux500 architecture
828
829config ARCH_NOMADIK
830 bool "STMicroelectronics Nomadik"
831 select ARM_AMBA
832 select ARM_VIC
833 select CPU_ARM926T
6d803ba7 834 select CLKDEV_LOOKUP
ccf50e23 835 select GENERIC_CLOCKEVENTS
ccf50e23
RK
836 select ARCH_REQUIRE_GPIOLIB
837 help
838 Support for the Nomadik platform by ST-Ericsson
839
7c6337e2
KH
840config ARCH_DAVINCI
841 bool "TI DaVinci"
7c6337e2 842 select GENERIC_CLOCKEVENTS
dce1115b 843 select ARCH_REQUIRE_GPIOLIB
3bca103a 844 select ZONE_DMA
9232fcc9 845 select HAVE_IDE
6d803ba7 846 select CLKDEV_LOOKUP
20e9969b 847 select GENERIC_ALLOCATOR
ae88e05a 848 select ARCH_HAS_HOLES_MEMORYMODEL
7c6337e2
KH
849 help
850 Support for TI's DaVinci platform.
851
3b938be6
RK
852config ARCH_OMAP
853 bool "TI OMAP"
9483a578 854 select HAVE_CLK
7444a72e 855 select ARCH_REQUIRE_GPIOLIB
89c52ed4 856 select ARCH_HAS_CPUFREQ
06cad098 857 select GENERIC_CLOCKEVENTS
dc548fbb 858 select HAVE_SCHED_CLOCK
9af915da 859 select ARCH_HAS_HOLES_MEMORYMODEL
3b938be6 860 help
6e457bb0 861 Support for TI's OMAP platform (OMAP1/2/3/4).
3b938be6 862
cee37e50 863config PLAT_SPEAR
864 bool "ST SPEAr"
865 select ARM_AMBA
866 select ARCH_REQUIRE_GPIOLIB
6d803ba7 867 select CLKDEV_LOOKUP
cee37e50 868 select GENERIC_CLOCKEVENTS
cee37e50 869 select HAVE_CLK
870 help
871 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
872
1da177e4
LT
873endchoice
874
ccf50e23
RK
875#
876# This is sorted alphabetically by mach-* pathname. However, plat-*
877# Kconfigs may be included either alphabetically (according to the
878# plat- suffix) or along side the corresponding mach-* source.
879#
95b8f20f
RK
880source "arch/arm/mach-aaec2000/Kconfig"
881
882source "arch/arm/mach-at91/Kconfig"
883
884source "arch/arm/mach-bcmring/Kconfig"
885
1da177e4
LT
886source "arch/arm/mach-clps711x/Kconfig"
887
d94f944e
AV
888source "arch/arm/mach-cns3xxx/Kconfig"
889
95b8f20f
RK
890source "arch/arm/mach-davinci/Kconfig"
891
892source "arch/arm/mach-dove/Kconfig"
893
e7736d47
LB
894source "arch/arm/mach-ep93xx/Kconfig"
895
1da177e4
LT
896source "arch/arm/mach-footbridge/Kconfig"
897
59d3a193
PZ
898source "arch/arm/mach-gemini/Kconfig"
899
95b8f20f
RK
900source "arch/arm/mach-h720x/Kconfig"
901
1da177e4
LT
902source "arch/arm/mach-integrator/Kconfig"
903
3f7e5815
LB
904source "arch/arm/mach-iop32x/Kconfig"
905
906source "arch/arm/mach-iop33x/Kconfig"
1da177e4 907
285f5fa7
DW
908source "arch/arm/mach-iop13xx/Kconfig"
909
1da177e4
LT
910source "arch/arm/mach-ixp4xx/Kconfig"
911
912source "arch/arm/mach-ixp2000/Kconfig"
913
c4713074
LB
914source "arch/arm/mach-ixp23xx/Kconfig"
915
95b8f20f
RK
916source "arch/arm/mach-kirkwood/Kconfig"
917
918source "arch/arm/mach-ks8695/Kconfig"
919
920source "arch/arm/mach-lh7a40x/Kconfig"
921
777f9beb
LB
922source "arch/arm/mach-loki/Kconfig"
923
40805949
KW
924source "arch/arm/mach-lpc32xx/Kconfig"
925
95b8f20f
RK
926source "arch/arm/mach-msm/Kconfig"
927
794d15b2
SS
928source "arch/arm/mach-mv78xx0/Kconfig"
929
95b8f20f 930source "arch/arm/plat-mxc/Kconfig"
1da177e4 931
1d3f33d5
SG
932source "arch/arm/mach-mxs/Kconfig"
933
95b8f20f 934source "arch/arm/mach-netx/Kconfig"
49cbe786 935
95b8f20f
RK
936source "arch/arm/mach-nomadik/Kconfig"
937source "arch/arm/plat-nomadik/Kconfig"
938
939source "arch/arm/mach-ns9xxx/Kconfig"
1da177e4 940
186f93ea 941source "arch/arm/mach-nuc93x/Kconfig"
1da177e4 942
d48af15e
TL
943source "arch/arm/plat-omap/Kconfig"
944
945source "arch/arm/mach-omap1/Kconfig"
1da177e4 946
1dbae815
TL
947source "arch/arm/mach-omap2/Kconfig"
948
9dd0b194 949source "arch/arm/mach-orion5x/Kconfig"
585cf175 950
95b8f20f
RK
951source "arch/arm/mach-pxa/Kconfig"
952source "arch/arm/plat-pxa/Kconfig"
585cf175 953
95b8f20f
RK
954source "arch/arm/mach-mmp/Kconfig"
955
956source "arch/arm/mach-realview/Kconfig"
957
958source "arch/arm/mach-sa1100/Kconfig"
edabd38e 959
cf383678 960source "arch/arm/plat-samsung/Kconfig"
a21765a7 961source "arch/arm/plat-s3c24xx/Kconfig"
c4ffccdd 962source "arch/arm/plat-s5p/Kconfig"
a21765a7 963
cee37e50 964source "arch/arm/plat-spear/Kconfig"
a21765a7 965
83ef3338
HK
966source "arch/arm/plat-tcc/Kconfig"
967
a21765a7
BD
968if ARCH_S3C2410
969source "arch/arm/mach-s3c2400/Kconfig"
1da177e4 970source "arch/arm/mach-s3c2410/Kconfig"
a21765a7 971source "arch/arm/mach-s3c2412/Kconfig"
f1290a49 972source "arch/arm/mach-s3c2416/Kconfig"
a21765a7 973source "arch/arm/mach-s3c2440/Kconfig"
e4d06e39 974source "arch/arm/mach-s3c2443/Kconfig"
a21765a7 975endif
1da177e4 976
a08ab637 977if ARCH_S3C64XX
431107ea 978source "arch/arm/mach-s3c64xx/Kconfig"
a08ab637
BD
979endif
980
49b7a491 981source "arch/arm/mach-s5p64x0/Kconfig"
c4ffccdd 982
550db7f1 983source "arch/arm/mach-s5p6442/Kconfig"
7bd0f2f5 984
5a7652f2 985source "arch/arm/mach-s5pc100/Kconfig"
5a7652f2 986
170f4e42
KK
987source "arch/arm/mach-s5pv210/Kconfig"
988
cc0e72b8
CY
989source "arch/arm/mach-s5pv310/Kconfig"
990
882d01f9 991source "arch/arm/mach-shmobile/Kconfig"
52c543f9 992
882d01f9 993source "arch/arm/plat-stmp3xxx/Kconfig"
9e73c84c 994
c5f80065
EG
995source "arch/arm/mach-tegra/Kconfig"
996
95b8f20f 997source "arch/arm/mach-u300/Kconfig"
1da177e4 998
95b8f20f 999source "arch/arm/mach-ux500/Kconfig"
1da177e4
LT
1000
1001source "arch/arm/mach-versatile/Kconfig"
1002
ceade897
RK
1003source "arch/arm/mach-vexpress/Kconfig"
1004
7ec80ddf 1005source "arch/arm/mach-w90x900/Kconfig"
1006
1da177e4
LT
1007# Definitions to make life easier
1008config ARCH_ACORN
1009 bool
1010
7ae1f7ec
LB
1011config PLAT_IOP
1012 bool
469d3044 1013 select GENERIC_CLOCKEVENTS
08f26b1e 1014 select HAVE_SCHED_CLOCK
7ae1f7ec 1015
69b02f6a
LB
1016config PLAT_ORION
1017 bool
f06a1624 1018 select HAVE_SCHED_CLOCK
69b02f6a 1019
bd5ce433
EM
1020config PLAT_PXA
1021 bool
1022
f4b8b319
RK
1023config PLAT_VERSATILE
1024 bool
1025
e3887714
RK
1026config ARM_TIMER_SP804
1027 bool
1028
1da177e4
LT
1029source arch/arm/mm/Kconfig
1030
afe4b25e
LB
1031config IWMMXT
1032 bool "Enable iWMMXt support"
ef6c8445
HZ
1033 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1034 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
afe4b25e
LB
1035 help
1036 Enable support for iWMMXt context switching at run time if
1037 running on a CPU that supports it.
1038
1da177e4
LT
1039# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1040config XSCALE_PMU
1041 bool
1042 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1043 default y
1044
0f4f0672 1045config CPU_HAS_PMU
8954bb0d
WD
1046 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1047 (!ARCH_OMAP3 || OMAP3_EMU)
0f4f0672
JI
1048 default y
1049 bool
1050
52108641 1051config MULTI_IRQ_HANDLER
1052 bool
1053 help
1054 Allow each machine to specify it's own IRQ handler at run time.
1055
3b93e7b0
HC
1056if !MMU
1057source "arch/arm/Kconfig-nommu"
1058endif
1059
9cba3ccc
CM
1060config ARM_ERRATA_411920
1061 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
81d11955 1062 depends on CPU_V6
9cba3ccc
CM
1063 help
1064 Invalidation of the Instruction Cache operation can
1065 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1066 It does not affect the MPCore. This option enables the ARM Ltd.
1067 recommended workaround.
1068
7ce236fc
CM
1069config ARM_ERRATA_430973
1070 bool "ARM errata: Stale prediction on replaced interworking branch"
1071 depends on CPU_V7
1072 help
1073 This option enables the workaround for the 430973 Cortex-A8
1074 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1075 interworking branch is replaced with another code sequence at the
1076 same virtual address, whether due to self-modifying code or virtual
1077 to physical address re-mapping, Cortex-A8 does not recover from the
1078 stale interworking branch prediction. This results in Cortex-A8
1079 executing the new code sequence in the incorrect ARM or Thumb state.
1080 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1081 and also flushes the branch target cache at every context switch.
1082 Note that setting specific bits in the ACTLR register may not be
1083 available in non-secure mode.
1084
855c551f
CM
1085config ARM_ERRATA_458693
1086 bool "ARM errata: Processor deadlock when a false hazard is created"
1087 depends on CPU_V7
1088 help
1089 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1090 erratum. For very specific sequences of memory operations, it is
1091 possible for a hazard condition intended for a cache line to instead
1092 be incorrectly associated with a different cache line. This false
1093 hazard might then cause a processor deadlock. The workaround enables
1094 the L1 caching of the NEON accesses and disables the PLD instruction
1095 in the ACTLR register. Note that setting specific bits in the ACTLR
1096 register may not be available in non-secure mode.
1097
0516e464
CM
1098config ARM_ERRATA_460075
1099 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1100 depends on CPU_V7
1101 help
1102 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1103 erratum. Any asynchronous access to the L2 cache may encounter a
1104 situation in which recent store transactions to the L2 cache are lost
1105 and overwritten with stale memory contents from external memory. The
1106 workaround disables the write-allocate mode for the L2 cache via the
1107 ACTLR register. Note that setting specific bits in the ACTLR register
1108 may not be available in non-secure mode.
1109
9f05027c
WD
1110config ARM_ERRATA_742230
1111 bool "ARM errata: DMB operation may be faulty"
1112 depends on CPU_V7 && SMP
1113 help
1114 This option enables the workaround for the 742230 Cortex-A9
1115 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1116 between two write operations may not ensure the correct visibility
1117 ordering of the two writes. This workaround sets a specific bit in
1118 the diagnostic register of the Cortex-A9 which causes the DMB
1119 instruction to behave as a DSB, ensuring the correct behaviour of
1120 the two writes.
1121
a672e99b
WD
1122config ARM_ERRATA_742231
1123 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1124 depends on CPU_V7 && SMP
1125 help
1126 This option enables the workaround for the 742231 Cortex-A9
1127 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1128 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1129 accessing some data located in the same cache line, may get corrupted
1130 data due to bad handling of the address hazard when the line gets
1131 replaced from one of the CPUs at the same time as another CPU is
1132 accessing it. This workaround sets specific bits in the diagnostic
1133 register of the Cortex-A9 which reduces the linefill issuing
1134 capabilities of the processor.
1135
9e65582a
SS
1136config PL310_ERRATA_588369
1137 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1138 depends on CACHE_L2X0 && ARCH_OMAP4
1139 help
1140 The PL310 L2 cache controller implements three types of Clean &
1141 Invalidate maintenance operations: by Physical Address
1142 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1143 They are architecturally defined to behave as the execution of a
1144 clean operation followed immediately by an invalidate operation,
1145 both performing to the same memory location. This functionality
1146 is not correctly implemented in PL310 as clean lines are not
1147 invalidated as a result of these operations. Note that this errata
1148 uses Texas Instrument's secure monitor api.
cdf357f1
WD
1149
1150config ARM_ERRATA_720789
1151 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1152 depends on CPU_V7 && SMP
1153 help
1154 This option enables the workaround for the 720789 Cortex-A9 (prior to
1155 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1156 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1157 As a consequence of this erratum, some TLB entries which should be
1158 invalidated are not, resulting in an incoherency in the system page
1159 tables. The workaround changes the TLB flushing routines to invalidate
1160 entries regardless of the ASID.
475d92fc
WD
1161
1162config ARM_ERRATA_743622
1163 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1164 depends on CPU_V7
1165 help
1166 This option enables the workaround for the 743622 Cortex-A9
1167 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1168 optimisation in the Cortex-A9 Store Buffer may lead to data
1169 corruption. This workaround sets a specific bit in the diagnostic
1170 register of the Cortex-A9 which disables the Store Buffer
1171 optimisation, preventing the defect from occurring. This has no
1172 visible impact on the overall performance or power consumption of the
1173 processor.
1174
1da177e4
LT
1175endmenu
1176
1177source "arch/arm/common/Kconfig"
1178
1da177e4
LT
1179menu "Bus support"
1180
1181config ARM_AMBA
1182 bool
1183
1184config ISA
1185 bool
1da177e4
LT
1186 help
1187 Find out whether you have ISA slots on your motherboard. ISA is the
1188 name of a bus system, i.e. the way the CPU talks to the other stuff
1189 inside your box. Other bus systems are PCI, EISA, MicroChannel
1190 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1191 newer boards don't support it. If you have ISA, say Y, otherwise N.
1192
065909b9 1193# Select ISA DMA controller support
1da177e4
LT
1194config ISA_DMA
1195 bool
065909b9 1196 select ISA_DMA_API
1da177e4 1197
065909b9 1198# Select ISA DMA interface
5cae841b
AV
1199config ISA_DMA_API
1200 bool
5cae841b 1201
1da177e4 1202config PCI
0b05da72 1203 bool "PCI support" if MIGHT_HAVE_PCI
1da177e4
LT
1204 help
1205 Find out whether you have a PCI motherboard. PCI is the name of a
1206 bus system, i.e. the way the CPU talks to the other stuff inside
1207 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1208 VESA. If you have PCI, say Y, otherwise N.
1209
52882173
AV
1210config PCI_DOMAINS
1211 bool
1212 depends on PCI
1213
b080ac8a
MRJ
1214config PCI_NANOENGINE
1215 bool "BSE nanoEngine PCI support"
1216 depends on SA1100_NANOENGINE
1217 help
1218 Enable PCI on the BSE nanoEngine board.
1219
36e23590
MW
1220config PCI_SYSCALL
1221 def_bool PCI
1222
1da177e4
LT
1223# Select the host bridge type
1224config PCI_HOST_VIA82C505
1225 bool
1226 depends on PCI && ARCH_SHARK
1227 default y
1228
a0113a99
MR
1229config PCI_HOST_ITE8152
1230 bool
1231 depends on PCI && MACH_ARMCORE
1232 default y
1233 select DMABOUNCE
1234
1da177e4
LT
1235source "drivers/pci/Kconfig"
1236
1237source "drivers/pcmcia/Kconfig"
1238
1239endmenu
1240
1241menu "Kernel Features"
1242
0567a0c0
KH
1243source "kernel/time/Kconfig"
1244
1da177e4
LT
1245config SMP
1246 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
971acb9b 1247 depends on EXPERIMENTAL
bc28248e 1248 depends on GENERIC_CLOCKEVENTS
971acb9b 1249 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
89c3dedf
DW
1250 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1251 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
e9d728f5 1252 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
f6dd9fa5 1253 select USE_GENERIC_SMP_HELPERS
89c3dedf 1254 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1da177e4
LT
1255 help
1256 This enables support for systems with more than one CPU. If you have
1257 a system with only one CPU, like most personal computers, say N. If
1258 you have a system with more than one CPU, say Y.
1259
1260 If you say N here, the kernel will run on single and multiprocessor
1261 machines, but will use only one CPU of a multiprocessor machine. If
1262 you say Y here, the kernel will run on many, but not all, single
1263 processor machines. On a single processor machine, the kernel will
1264 run faster if you say N here.
1265
03502faa 1266 See also <file:Documentation/i386/IO-APIC.txt>,
1da177e4 1267 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
50a23e6e 1268 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1da177e4
LT
1269
1270 If you don't know what to do here, say N.
1271
f00ec48f
RK
1272config SMP_ON_UP
1273 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1274 depends on EXPERIMENTAL
4d2692a7 1275 depends on SMP && !XIP_KERNEL
f00ec48f
RK
1276 default y
1277 help
1278 SMP kernels contain instructions which fail on non-SMP processors.
1279 Enabling this option allows the kernel to modify itself to make
1280 these instructions safe. Disabling it allows about 1K of space
1281 savings.
1282
1283 If you don't know what to do here, say Y.
1284
a8cbcd92
RK
1285config HAVE_ARM_SCU
1286 bool
1287 depends on SMP
1288 help
1289 This option enables support for the ARM system coherency unit
1290
f32f4ce2
RK
1291config HAVE_ARM_TWD
1292 bool
1293 depends on SMP
15095bb0 1294 select TICK_ONESHOT
f32f4ce2
RK
1295 help
1296 This options enables support for the ARM timer and watchdog unit
1297
8d5796d2
LB
1298choice
1299 prompt "Memory split"
1300 default VMSPLIT_3G
1301 help
1302 Select the desired split between kernel and user memory.
1303
1304 If you are not absolutely sure what you are doing, leave this
1305 option alone!
1306
1307 config VMSPLIT_3G
1308 bool "3G/1G user/kernel split"
1309 config VMSPLIT_2G
1310 bool "2G/2G user/kernel split"
1311 config VMSPLIT_1G
1312 bool "1G/3G user/kernel split"
1313endchoice
1314
1315config PAGE_OFFSET
1316 hex
1317 default 0x40000000 if VMSPLIT_1G
1318 default 0x80000000 if VMSPLIT_2G
1319 default 0xC0000000
1320
1da177e4
LT
1321config NR_CPUS
1322 int "Maximum number of CPUs (2-32)"
1323 range 2 32
1324 depends on SMP
1325 default "4"
1326
a054a811
RK
1327config HOTPLUG_CPU
1328 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1329 depends on SMP && HOTPLUG && EXPERIMENTAL
176bfc44 1330 depends on !ARCH_MSM
a054a811
RK
1331 help
1332 Say Y here to experiment with turning CPUs off and on. CPUs
1333 can be controlled through /sys/devices/system/cpu.
1334
37ee16ae
RK
1335config LOCAL_TIMERS
1336 bool "Use local timer interrupts"
971acb9b 1337 depends on SMP
37ee16ae 1338 default y
89c3dedf 1339 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
37ee16ae
RK
1340 help
1341 Enable support for local timers on SMP platforms, rather then the
1342 legacy IPI broadcast method. Local timers allows the system
1343 accounting to be spread across the timer interval, preventing a
1344 "thundering herd" at every timer tick.
1345
d45a398f 1346source kernel/Kconfig.preempt
1da177e4 1347
f8065813
RK
1348config HZ
1349 int
49b7a491 1350 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
2192482e 1351 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
bfe65704 1352 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
5248c657 1353 default AT91_TIMER_HZ if ARCH_AT91
5da3e714 1354 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
f8065813
RK
1355 default 100
1356
16c79651 1357config THUMB2_KERNEL
4a50bfe3 1358 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
6e6fc998 1359 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
16c79651
CM
1360 select AEABI
1361 select ARM_ASM_UNIFIED
1362 help
1363 By enabling this option, the kernel will be compiled in
1364 Thumb-2 mode. A compiler/assembler that understand the unified
1365 ARM-Thumb syntax is needed.
1366
1367 If unsure, say N.
1368
0becb088
CM
1369config ARM_ASM_UNIFIED
1370 bool
1371
704bdda0
NP
1372config AEABI
1373 bool "Use the ARM EABI to compile the kernel"
1374 help
1375 This option allows for the kernel to be compiled using the latest
1376 ARM ABI (aka EABI). This is only useful if you are using a user
1377 space environment that is also compiled with EABI.
1378
1379 Since there are major incompatibilities between the legacy ABI and
1380 EABI, especially with regard to structure member alignment, this
1381 option also changes the kernel syscall calling convention to
1382 disambiguate both ABIs and allow for backward compatibility support
1383 (selected with CONFIG_OABI_COMPAT).
1384
1385 To use this you need GCC version 4.0.0 or later.
1386
6c90c872 1387config OABI_COMPAT
a73a3ff1 1388 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
61c484d4 1389 depends on AEABI && EXPERIMENTAL
6c90c872
NP
1390 default y
1391 help
1392 This option preserves the old syscall interface along with the
1393 new (ARM EABI) one. It also provides a compatibility layer to
1394 intercept syscalls that have structure arguments which layout
1395 in memory differs between the legacy ABI and the new ARM EABI
1396 (only for non "thumb" binaries). This option adds a tiny
1397 overhead to all syscalls and produces a slightly larger kernel.
1398 If you know you'll be using only pure EABI user space then you
1399 can say N here. If this option is not selected and you attempt
1400 to execute a legacy ABI binary then the result will be
1401 UNPREDICTABLE (in fact it can be predicted that it won't work
1402 at all). If in doubt say Y.
1403
eb33575c 1404config ARCH_HAS_HOLES_MEMORYMODEL
e80d6a24 1405 bool
e80d6a24 1406
05944d74
RK
1407config ARCH_SPARSEMEM_ENABLE
1408 bool
1409
07a2f737
RK
1410config ARCH_SPARSEMEM_DEFAULT
1411 def_bool ARCH_SPARSEMEM_ENABLE
1412
05944d74 1413config ARCH_SELECT_MEMORY_MODEL
be370302 1414 def_bool ARCH_SPARSEMEM_ENABLE
c80d79d7 1415
053a96ca
NP
1416config HIGHMEM
1417 bool "High Memory Support (EXPERIMENTAL)"
1418 depends on MMU && EXPERIMENTAL
1419 help
1420 The address space of ARM processors is only 4 Gigabytes large
1421 and it has to accommodate user address space, kernel address
1422 space as well as some memory mapped IO. That means that, if you
1423 have a large amount of physical memory and/or IO, not all of the
1424 memory can be "permanently mapped" by the kernel. The physical
1425 memory that is not permanently mapped is called "high memory".
1426
1427 Depending on the selected kernel/user memory split, minimum
1428 vmalloc space and actual amount of RAM, you may not need this
1429 option which should result in a slightly faster kernel.
1430
1431 If unsure, say n.
1432
65cec8e3
RK
1433config HIGHPTE
1434 bool "Allocate 2nd-level pagetables from highmem"
1435 depends on HIGHMEM
1436 depends on !OUTER_CACHE
1437
1b8873a0
JI
1438config HW_PERF_EVENTS
1439 bool "Enable hardware performance counter support for perf events"
fe166148 1440 depends on PERF_EVENTS && CPU_HAS_PMU
1b8873a0
JI
1441 default y
1442 help
1443 Enable hardware performance counter support for perf events. If
1444 disabled, perf events will use software events only.
1445
3f22ab27
DH
1446source "mm/Kconfig"
1447
c1b2d970
MD
1448config FORCE_MAX_ZONEORDER
1449 int "Maximum zone order" if ARCH_SHMOBILE
1450 range 11 64 if ARCH_SHMOBILE
1451 default "9" if SA1111
1452 default "11"
1453 help
1454 The kernel memory allocator divides physically contiguous memory
1455 blocks into "zones", where each zone is a power of two number of
1456 pages. This option selects the largest power of two that the kernel
1457 keeps in the memory allocator. If you need to allocate very large
1458 blocks of physically contiguous memory, then you may need to
1459 increase this value.
1460
1461 This config option is actually maximum order plus one. For example,
1462 a value of 11 means that the largest free memory block is 2^10 pages.
1463
1da177e4
LT
1464config LEDS
1465 bool "Timer and CPU usage LEDs"
e055d5bf 1466 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
8c8fdbc9 1467 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1da177e4
LT
1468 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1469 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
73a59c1c 1470 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
25329671 1471 ARCH_AT91 || ARCH_DAVINCI || \
ff3042fb 1472 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1da177e4
LT
1473 help
1474 If you say Y here, the LEDs on your machine will be used
1475 to provide useful information about your current system status.
1476
1477 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1478 be able to select which LEDs are active using the options below. If
1479 you are compiling a kernel for the EBSA-110 or the LART however, the
1480 red LED will simply flash regularly to indicate that the system is
1481 still functional. It is safe to say Y here if you have a CATS
1482 system, but the driver will do nothing.
1483
1484config LEDS_TIMER
1485 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
eebdf7d7
DB
1486 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1487 || MACH_OMAP_PERSEUS2
1da177e4 1488 depends on LEDS
0567a0c0 1489 depends on !GENERIC_CLOCKEVENTS
1da177e4
LT
1490 default y if ARCH_EBSA110
1491 help
1492 If you say Y here, one of the system LEDs (the green one on the
1493 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1494 will flash regularly to indicate that the system is still
1495 operational. This is mainly useful to kernel hackers who are
1496 debugging unstable kernels.
1497
1498 The LART uses the same LED for both Timer LED and CPU usage LED
1499 functions. You may choose to use both, but the Timer LED function
1500 will overrule the CPU usage LED.
1501
1502config LEDS_CPU
1503 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
eebdf7d7
DB
1504 !ARCH_OMAP) \
1505 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1506 || MACH_OMAP_PERSEUS2
1da177e4
LT
1507 depends on LEDS
1508 help
1509 If you say Y here, the red LED will be used to give a good real
1510 time indication of CPU usage, by lighting whenever the idle task
1511 is not currently executing.
1512
1513 The LART uses the same LED for both Timer LED and CPU usage LED
1514 functions. You may choose to use both, but the Timer LED function
1515 will overrule the CPU usage LED.
1516
1517config ALIGNMENT_TRAP
1518 bool
f12d0d7c 1519 depends on CPU_CP15_MMU
1da177e4 1520 default y if !ARCH_EBSA110
e119bfff 1521 select HAVE_PROC_CPU if PROC_FS
1da177e4 1522 help
84eb8d06 1523 ARM processors cannot fetch/store information which is not
1da177e4
LT
1524 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1525 address divisible by 4. On 32-bit ARM processors, these non-aligned
1526 fetch/store instructions will be emulated in software if you say
1527 here, which has a severe performance impact. This is necessary for
1528 correct operation of some network protocols. With an IP-only
1529 configuration it is safe to say N, otherwise say Y.
1530
39ec58f3
LB
1531config UACCESS_WITH_MEMCPY
1532 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1533 depends on MMU && EXPERIMENTAL
1534 default y if CPU_FEROCEON
1535 help
1536 Implement faster copy_to_user and clear_user methods for CPU
1537 cores where a 8-word STM instruction give significantly higher
1538 memory write throughput than a sequence of individual 32bit stores.
1539
1540 A possible side effect is a slight increase in scheduling latency
1541 between threads sharing the same address space if they invoke
1542 such copy operations with large buffers.
1543
1544 However, if the CPU data cache is using a write-allocate mode,
1545 this option is unlikely to provide any performance gain.
1546
70c70d97
NP
1547config SECCOMP
1548 bool
1549 prompt "Enable seccomp to safely compute untrusted bytecode"
1550 ---help---
1551 This kernel feature is useful for number crunching applications
1552 that may need to compute untrusted bytecode during their
1553 execution. By using pipes or other transports made available to
1554 the process as file descriptors supporting the read/write
1555 syscalls, it's possible to isolate those applications in
1556 their own address space using seccomp. Once seccomp is
1557 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1558 and the task is only allowed to execute a few safe syscalls
1559 defined by each seccomp mode.
1560
c743f380
NP
1561config CC_STACKPROTECTOR
1562 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
4a50bfe3 1563 depends on EXPERIMENTAL
c743f380
NP
1564 help
1565 This option turns on the -fstack-protector GCC feature. This
1566 feature puts, at the beginning of functions, a canary value on
1567 the stack just before the return address, and validates
1568 the value just before actually returning. Stack based buffer
1569 overflows (that need to overwrite this return address) now also
1570 overwrite the canary, which gets detected and the attack is then
1571 neutralized via a kernel panic.
1572 This feature requires gcc version 4.2 or above.
1573
73a65b3f
UKK
1574config DEPRECATED_PARAM_STRUCT
1575 bool "Provide old way to pass kernel parameters"
1576 help
1577 This was deprecated in 2001 and announced to live on for 5 years.
1578 Some old boot loaders still use this way.
1579
1da177e4
LT
1580endmenu
1581
1582menu "Boot options"
1583
1584# Compressed boot loader in ROM. Yes, we really want to ask about
1585# TEXT and BSS so we preserve their values in the config files.
1586config ZBOOT_ROM_TEXT
1587 hex "Compressed ROM boot loader base address"
1588 default "0"
1589 help
1590 The physical address at which the ROM-able zImage is to be
1591 placed in the target. Platforms which normally make use of
1592 ROM-able zImage formats normally set this to a suitable
1593 value in their defconfig file.
1594
1595 If ZBOOT_ROM is not enabled, this has no effect.
1596
1597config ZBOOT_ROM_BSS
1598 hex "Compressed ROM boot loader BSS address"
1599 default "0"
1600 help
f8c440b2
DF
1601 The base address of an area of read/write memory in the target
1602 for the ROM-able zImage which must be available while the
1603 decompressor is running. It must be large enough to hold the
1604 entire decompressed kernel plus an additional 128 KiB.
1605 Platforms which normally make use of ROM-able zImage formats
1606 normally set this to a suitable value in their defconfig file.
1da177e4
LT
1607
1608 If ZBOOT_ROM is not enabled, this has no effect.
1609
1610config ZBOOT_ROM
1611 bool "Compressed boot loader in ROM/flash"
1612 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1613 help
1614 Say Y here if you intend to execute your compressed kernel image
1615 (zImage) directly from ROM or flash. If unsure, say N.
1616
1617config CMDLINE
1618 string "Default kernel command string"
1619 default ""
1620 help
1621 On some architectures (EBSA110 and CATS), there is currently no way
1622 for the boot loader to pass arguments to the kernel. For these
1623 architectures, you should supply some command-line options at build
1624 time by entering them here. As a minimum, you should specify the
1625 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1626
92d2040d
AH
1627config CMDLINE_FORCE
1628 bool "Always use the default kernel command string"
1629 depends on CMDLINE != ""
1630 help
1631 Always use the default kernel command string, even if the boot
1632 loader passes other arguments to the kernel.
1633 This is useful if you cannot or don't want to change the
1634 command-line options your boot loader passes to the kernel.
1635
1636 If unsure, say N.
1637
1da177e4
LT
1638config XIP_KERNEL
1639 bool "Kernel Execute-In-Place from ROM"
1640 depends on !ZBOOT_ROM
1641 help
1642 Execute-In-Place allows the kernel to run from non-volatile storage
1643 directly addressable by the CPU, such as NOR flash. This saves RAM
1644 space since the text section of the kernel is not loaded from flash
1645 to RAM. Read-write sections, such as the data section and stack,
1646 are still copied to RAM. The XIP kernel is not compressed since
1647 it has to run directly from flash, so it will take more space to
1648 store it. The flash address used to link the kernel object files,
1649 and for storing it, is configuration dependent. Therefore, if you
1650 say Y here, you must know the proper physical address where to
1651 store the kernel image depending on your own flash memory usage.
1652
1653 Also note that the make target becomes "make xipImage" rather than
1654 "make zImage" or "make Image". The final kernel binary to put in
1655 ROM memory will be arch/arm/boot/xipImage.
1656
1657 If unsure, say N.
1658
1659config XIP_PHYS_ADDR
1660 hex "XIP Kernel Physical Location"
1661 depends on XIP_KERNEL
1662 default "0x00080000"
1663 help
1664 This is the physical address in your flash memory the kernel will
1665 be linked for and stored to. This address is dependent on your
1666 own flash usage.
1667
c587e4a6
RP
1668config KEXEC
1669 bool "Kexec system call (EXPERIMENTAL)"
1670 depends on EXPERIMENTAL
1671 help
1672 kexec is a system call that implements the ability to shutdown your
1673 current kernel, and to start another kernel. It is like a reboot
01dd2fbf 1674 but it is independent of the system firmware. And like a reboot
c587e4a6
RP
1675 you can start any kernel with it, not just Linux.
1676
1677 It is an ongoing process to be certain the hardware in a machine
1678 is properly shutdown, so do not be surprised if this code does not
1679 initially work for you. It may help to enable device hotplugging
1680 support.
1681
4cd9d6f7
RP
1682config ATAGS_PROC
1683 bool "Export atags in procfs"
b98d7291
UL
1684 depends on KEXEC
1685 default y
4cd9d6f7
RP
1686 help
1687 Should the atags used to boot the kernel be exported in an "atags"
1688 file in procfs. Useful with kexec.
1689
cb5d39b3
MW
1690config CRASH_DUMP
1691 bool "Build kdump crash kernel (EXPERIMENTAL)"
1692 depends on EXPERIMENTAL
1693 help
1694 Generate crash dump after being started by kexec. This should
1695 be normally only set in special crash dump kernels which are
1696 loaded in the main kernel with kexec-tools into a specially
1697 reserved region and then later executed after a crash by
1698 kdump/kexec. The crash dump kernel must be compiled to a
1699 memory address not used by the main kernel
1700
1701 For more details see Documentation/kdump/kdump.txt
1702
e69edc79
EM
1703config AUTO_ZRELADDR
1704 bool "Auto calculation of the decompressed kernel image address"
1705 depends on !ZBOOT_ROM && !ARCH_U300
1706 help
1707 ZRELADDR is the physical address where the decompressed kernel
1708 image will be placed. If AUTO_ZRELADDR is selected, the address
1709 will be determined at run-time by masking the current IP with
1710 0xf8000000. This assumes the zImage being placed in the first 128MB
1711 from start of memory.
1712
1da177e4
LT
1713endmenu
1714
ac9d7efc 1715menu "CPU Power Management"
1da177e4 1716
89c52ed4 1717if ARCH_HAS_CPUFREQ
1da177e4
LT
1718
1719source "drivers/cpufreq/Kconfig"
1720
64f102b6
YS
1721config CPU_FREQ_IMX
1722 tristate "CPUfreq driver for i.MX CPUs"
1723 depends on ARCH_MXC && CPU_FREQ
1724 help
1725 This enables the CPUfreq driver for i.MX CPUs.
1726
1da177e4
LT
1727config CPU_FREQ_SA1100
1728 bool
1da177e4
LT
1729
1730config CPU_FREQ_SA1110
1731 bool
1da177e4
LT
1732
1733config CPU_FREQ_INTEGRATOR
1734 tristate "CPUfreq driver for ARM Integrator CPUs"
1735 depends on ARCH_INTEGRATOR && CPU_FREQ
1736 default y
1737 help
1738 This enables the CPUfreq driver for ARM Integrator CPUs.
1739
1740 For details, take a look at <file:Documentation/cpu-freq>.
1741
1742 If in doubt, say Y.
1743
9e2697ff
RK
1744config CPU_FREQ_PXA
1745 bool
1746 depends on CPU_FREQ && ARCH_PXA && PXA25x
1747 default y
1748 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1749
b3748ddd
MB
1750config CPU_FREQ_S3C64XX
1751 bool "CPUfreq support for Samsung S3C64XX CPUs"
1752 depends on CPU_FREQ && CPU_S3C6410
1753
9d56c02a
BD
1754config CPU_FREQ_S3C
1755 bool
1756 help
1757 Internal configuration node for common cpufreq on Samsung SoC
1758
1759config CPU_FREQ_S3C24XX
4a50bfe3 1760 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
9d56c02a
BD
1761 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1762 select CPU_FREQ_S3C
1763 help
1764 This enables the CPUfreq driver for the Samsung S3C24XX family
1765 of CPUs.
1766
1767 For details, take a look at <file:Documentation/cpu-freq>.
1768
1769 If in doubt, say N.
1770
1771config CPU_FREQ_S3C24XX_PLL
4a50bfe3 1772 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
9d56c02a
BD
1773 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1774 help
1775 Compile in support for changing the PLL frequency from the
1776 S3C24XX series CPUfreq driver. The PLL takes time to settle
1777 after a frequency change, so by default it is not enabled.
1778
1779 This also means that the PLL tables for the selected CPU(s) will
1780 be built which may increase the size of the kernel image.
1781
1782config CPU_FREQ_S3C24XX_DEBUG
1783 bool "Debug CPUfreq Samsung driver core"
1784 depends on CPU_FREQ_S3C24XX
1785 help
1786 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1787
1788config CPU_FREQ_S3C24XX_IODEBUG
1789 bool "Debug CPUfreq Samsung driver IO timing"
1790 depends on CPU_FREQ_S3C24XX
1791 help
1792 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1793
e6d197a6
BD
1794config CPU_FREQ_S3C24XX_DEBUGFS
1795 bool "Export debugfs for CPUFreq"
1796 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1797 help
1798 Export status information via debugfs.
1799
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LT
1800endif
1801
ac9d7efc
RK
1802source "drivers/cpuidle/Kconfig"
1803
1804endmenu
1805
1da177e4
LT
1806menu "Floating point emulation"
1807
1808comment "At least one emulation must be selected"
1809
1810config FPE_NWFPE
1811 bool "NWFPE math emulation"
593c252a 1812 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1da177e4
LT
1813 ---help---
1814 Say Y to include the NWFPE floating point emulator in the kernel.
1815 This is necessary to run most binaries. Linux does not currently
1816 support floating point hardware so you need to say Y here even if
1817 your machine has an FPA or floating point co-processor podule.
1818
1819 You may say N here if you are going to load the Acorn FPEmulator
1820 early in the bootup.
1821
1822config FPE_NWFPE_XP
1823 bool "Support extended precision"
bedf142b 1824 depends on FPE_NWFPE
1da177e4
LT
1825 help
1826 Say Y to include 80-bit support in the kernel floating-point
1827 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1828 Note that gcc does not generate 80-bit operations by default,
1829 so in most cases this option only enlarges the size of the
1830 floating point emulator without any good reason.
1831
1832 You almost surely want to say N here.
1833
1834config FPE_FASTFPE
1835 bool "FastFPE math emulation (EXPERIMENTAL)"
8993a44c 1836 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1da177e4
LT
1837 ---help---
1838 Say Y here to include the FAST floating point emulator in the kernel.
1839 This is an experimental much faster emulator which now also has full
1840 precision for the mantissa. It does not support any exceptions.
1841 It is very simple, and approximately 3-6 times faster than NWFPE.
1842
1843 It should be sufficient for most programs. It may be not suitable
1844 for scientific calculations, but you have to check this for yourself.
1845 If you do not feel you need a faster FP emulation you should better
1846 choose NWFPE.
1847
1848config VFP
1849 bool "VFP-format floating point maths"
c00d4ffd 1850 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1da177e4
LT
1851 help
1852 Say Y to include VFP support code in the kernel. This is needed
1853 if your hardware includes a VFP unit.
1854
1855 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1856 release notes and additional status information.
1857
1858 Say N if your target does not have VFP hardware.
1859
25ebee02
CM
1860config VFPv3
1861 bool
1862 depends on VFP
1863 default y if CPU_V7
1864
b5872db4
CM
1865config NEON
1866 bool "Advanced SIMD (NEON) Extension support"
1867 depends on VFPv3 && CPU_V7
1868 help
1869 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1870 Extension.
1871
1da177e4
LT
1872endmenu
1873
1874menu "Userspace binary formats"
1875
1876source "fs/Kconfig.binfmt"
1877
1878config ARTHUR
1879 tristate "RISC OS personality"
704bdda0 1880 depends on !AEABI
1da177e4
LT
1881 help
1882 Say Y here to include the kernel code necessary if you want to run
1883 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1884 experimental; if this sounds frightening, say N and sleep in peace.
1885 You can also say M here to compile this support as a module (which
1886 will be called arthur).
1887
1888endmenu
1889
1890menu "Power management options"
1891
eceab4ac 1892source "kernel/power/Kconfig"
1da177e4 1893
f4cb5700
JB
1894config ARCH_SUSPEND_POSSIBLE
1895 def_bool y
1896
1da177e4
LT
1897endmenu
1898
d5950b43
SR
1899source "net/Kconfig"
1900
ac25150f 1901source "drivers/Kconfig"
1da177e4
LT
1902
1903source "fs/Kconfig"
1904
1da177e4
LT
1905source "arch/arm/Kconfig.debug"
1906
1907source "security/Kconfig"
1908
1909source "crypto/Kconfig"
1910
1911source "lib/Kconfig"
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