Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
2064c946 | 5 | select HAVE_IDE |
2778f620 | 6 | select HAVE_MEMBLOCK |
12b824fb | 7 | select RTC_LIB |
75e7153a | 8 | select SYS_SUPPORTS_APM_EMULATION |
d4c7b1f9 | 9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
fe166148 | 10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 11 | select HAVE_ARCH_KGDB |
ed7c84d5 | 12 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
9edddaa2 | 13 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
16 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 17 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 18 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
19 | select HAVE_KERNEL_GZIP |
20 | select HAVE_KERNEL_LZO | |
6e8699f7 | 21 | select HAVE_KERNEL_LZMA |
e360adbe | 22 | select HAVE_IRQ_WORK |
7ada189f JI |
23 | select HAVE_PERF_EVENTS |
24 | select PERF_USE_VMALLOC | |
e513f8bf | 25 | select HAVE_REGS_AND_STACK_ACCESS_API |
19852e59 | 26 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
ed60453f | 27 | select HAVE_C_RECORDMCOUNT |
1da177e4 LT |
28 | help |
29 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 30 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 31 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 32 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
33 | Europe. There is an ARM Linux project with a web page at |
34 | <http://www.arm.linux.org.uk/>. | |
35 | ||
1a189b97 RK |
36 | config HAVE_PWM |
37 | bool | |
38 | ||
75e7153a RB |
39 | config SYS_SUPPORTS_APM_EMULATION |
40 | bool | |
41 | ||
112f38a4 RK |
42 | config HAVE_SCHED_CLOCK |
43 | bool | |
44 | ||
0a938b97 DB |
45 | config GENERIC_GPIO |
46 | bool | |
0a938b97 | 47 | |
5cfc8ee0 JS |
48 | config ARCH_USES_GETTIMEOFFSET |
49 | bool | |
50 | default n | |
746140c7 | 51 | |
0567a0c0 KH |
52 | config GENERIC_CLOCKEVENTS |
53 | bool | |
0567a0c0 | 54 | |
a8655e83 CM |
55 | config GENERIC_CLOCKEVENTS_BROADCAST |
56 | bool | |
57 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 58 | default y if SMP |
a8655e83 | 59 | |
bc581770 LW |
60 | config HAVE_TCM |
61 | bool | |
62 | select GENERIC_ALLOCATOR | |
63 | ||
e119bfff RK |
64 | config HAVE_PROC_CPU |
65 | bool | |
66 | ||
5ea81769 AV |
67 | config NO_IOPORT |
68 | bool | |
5ea81769 | 69 | |
1da177e4 LT |
70 | config EISA |
71 | bool | |
72 | ---help--- | |
73 | The Extended Industry Standard Architecture (EISA) bus was | |
74 | developed as an open alternative to the IBM MicroChannel bus. | |
75 | ||
76 | The EISA bus provided some of the features of the IBM MicroChannel | |
77 | bus while maintaining backward compatibility with cards made for | |
78 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
79 | 1995 when it was made obsolete by the PCI bus. | |
80 | ||
81 | Say Y here if you are building a kernel for an EISA-based machine. | |
82 | ||
83 | Otherwise, say N. | |
84 | ||
85 | config SBUS | |
86 | bool | |
87 | ||
88 | config MCA | |
89 | bool | |
90 | help | |
91 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
92 | laptops. It is a bus system similar to PCI or ISA. See | |
93 | <file:Documentation/mca.txt> (and especially the web page given | |
94 | there) before attempting to build an MCA bus kernel. | |
95 | ||
4a2581a0 TG |
96 | config GENERIC_HARDIRQS |
97 | bool | |
98 | default y | |
99 | ||
f16fb1ec RK |
100 | config STACKTRACE_SUPPORT |
101 | bool | |
102 | default y | |
103 | ||
f76e9154 NP |
104 | config HAVE_LATENCYTOP_SUPPORT |
105 | bool | |
106 | depends on !SMP | |
107 | default y | |
108 | ||
f16fb1ec RK |
109 | config LOCKDEP_SUPPORT |
110 | bool | |
111 | default y | |
112 | ||
7ad1bcb2 RK |
113 | config TRACE_IRQFLAGS_SUPPORT |
114 | bool | |
115 | default y | |
116 | ||
4a2581a0 TG |
117 | config HARDIRQS_SW_RESEND |
118 | bool | |
119 | default y | |
120 | ||
121 | config GENERIC_IRQ_PROBE | |
122 | bool | |
123 | default y | |
124 | ||
95c354fe NP |
125 | config GENERIC_LOCKBREAK |
126 | bool | |
127 | default y | |
128 | depends on SMP && PREEMPT | |
129 | ||
1da177e4 LT |
130 | config RWSEM_GENERIC_SPINLOCK |
131 | bool | |
132 | default y | |
133 | ||
134 | config RWSEM_XCHGADD_ALGORITHM | |
135 | bool | |
136 | ||
f0d1b0b3 DH |
137 | config ARCH_HAS_ILOG2_U32 |
138 | bool | |
f0d1b0b3 DH |
139 | |
140 | config ARCH_HAS_ILOG2_U64 | |
141 | bool | |
f0d1b0b3 | 142 | |
89c52ed4 BD |
143 | config ARCH_HAS_CPUFREQ |
144 | bool | |
145 | help | |
146 | Internal node to signify that the ARCH has CPUFREQ support | |
147 | and that the relevant menu configurations are displayed for | |
148 | it. | |
149 | ||
c7b0aff4 KH |
150 | config ARCH_HAS_CPU_IDLE_WAIT |
151 | def_bool y | |
152 | ||
b89c3b16 AM |
153 | config GENERIC_HWEIGHT |
154 | bool | |
155 | default y | |
156 | ||
1da177e4 LT |
157 | config GENERIC_CALIBRATE_DELAY |
158 | bool | |
159 | default y | |
160 | ||
a08b6b79 Z |
161 | config ARCH_MAY_HAVE_PC_FDC |
162 | bool | |
163 | ||
5ac6da66 CL |
164 | config ZONE_DMA |
165 | bool | |
5ac6da66 | 166 | |
ccd7ab7f FT |
167 | config NEED_DMA_MAP_STATE |
168 | def_bool y | |
169 | ||
1da177e4 LT |
170 | config GENERIC_ISA_DMA |
171 | bool | |
172 | ||
1da177e4 LT |
173 | config FIQ |
174 | bool | |
175 | ||
034d2f5a AV |
176 | config ARCH_MTD_XIP |
177 | bool | |
178 | ||
60a752ef | 179 | config GENERIC_HARDIRQS_NO__DO_IRQ |
60a752ef PZ |
180 | def_bool y |
181 | ||
d6d502fa KK |
182 | config ARM_L1_CACHE_SHIFT_6 |
183 | bool | |
184 | help | |
185 | Setting ARM L1 cache line size to 64 Bytes. | |
186 | ||
c760fc19 HC |
187 | config VECTORS_BASE |
188 | hex | |
6afd6fae | 189 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
190 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
191 | default 0x00000000 | |
192 | help | |
193 | The base address of exception vectors. | |
194 | ||
1da177e4 LT |
195 | source "init/Kconfig" |
196 | ||
dc52ddc0 MH |
197 | source "kernel/Kconfig.freezer" |
198 | ||
1da177e4 LT |
199 | menu "System Type" |
200 | ||
3c427975 HC |
201 | config MMU |
202 | bool "MMU-based Paged Memory Management Support" | |
203 | default y | |
204 | help | |
205 | Select if you want MMU-based virtualised addressing space | |
206 | support by paged memory management. If unsure, say 'Y'. | |
207 | ||
ccf50e23 RK |
208 | # |
209 | # The "ARM system type" choice list is ordered alphabetically by option | |
210 | # text. Please add new entries in the option alphabetic order. | |
211 | # | |
1da177e4 LT |
212 | choice |
213 | prompt "ARM system type" | |
6a0e2430 | 214 | default ARCH_VERSATILE |
1da177e4 | 215 | |
4af6fee1 DS |
216 | config ARCH_AAEC2000 |
217 | bool "Agilent AAEC-2000 based" | |
c750815e | 218 | select CPU_ARM920T |
4af6fee1 | 219 | select ARM_AMBA |
9483a578 | 220 | select HAVE_CLK |
5cfc8ee0 | 221 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
222 | help |
223 | This enables support for systems based on the Agilent AAEC-2000 | |
224 | ||
225 | config ARCH_INTEGRATOR | |
226 | bool "ARM Ltd. Integrator family" | |
227 | select ARM_AMBA | |
89c52ed4 | 228 | select ARCH_HAS_CPUFREQ |
d72fbdf0 | 229 | select COMMON_CLKDEV |
c5a0adb5 | 230 | select ICST |
13edd86d | 231 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 232 | select PLAT_VERSATILE |
4af6fee1 DS |
233 | help |
234 | Support for ARM's Integrator platform. | |
235 | ||
236 | config ARCH_REALVIEW | |
237 | bool "ARM Ltd. RealView family" | |
238 | select ARM_AMBA | |
cf30fb4a | 239 | select COMMON_CLKDEV |
1da0c89c | 240 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 241 | select ICST |
ae30ceac | 242 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 243 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 244 | select PLAT_VERSATILE |
e3887714 | 245 | select ARM_TIMER_SP804 |
b56ba8aa | 246 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
247 | help |
248 | This enables support for ARM Ltd RealView boards. | |
249 | ||
250 | config ARCH_VERSATILE | |
251 | bool "ARM Ltd. Versatile family" | |
252 | select ARM_AMBA | |
253 | select ARM_VIC | |
71a06da0 | 254 | select COMMON_CLKDEV |
1da0c89c | 255 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 256 | select ICST |
89df1272 | 257 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 258 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 259 | select PLAT_VERSATILE |
e3887714 | 260 | select ARM_TIMER_SP804 |
4af6fee1 DS |
261 | help |
262 | This enables support for ARM Ltd Versatile board. | |
263 | ||
ceade897 RK |
264 | config ARCH_VEXPRESS |
265 | bool "ARM Ltd. Versatile Express family" | |
266 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
267 | select ARM_AMBA | |
268 | select ARM_TIMER_SP804 | |
269 | select COMMON_CLKDEV | |
270 | select GENERIC_CLOCKEVENTS | |
ceade897 | 271 | select HAVE_CLK |
0af85dda | 272 | select HAVE_SCHED_CLOCK |
ceade897 RK |
273 | select ICST |
274 | select PLAT_VERSATILE | |
275 | help | |
276 | This enables support for the ARM Ltd Versatile Express boards. | |
277 | ||
8fc5ffa0 AV |
278 | config ARCH_AT91 |
279 | bool "Atmel AT91" | |
f373e8c0 | 280 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 281 | select HAVE_CLK |
4af6fee1 | 282 | help |
2b3b3516 AV |
283 | This enables support for systems based on the Atmel AT91RM9200, |
284 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 285 | |
ccf50e23 RK |
286 | config ARCH_BCMRING |
287 | bool "Broadcom BCMRING" | |
288 | depends on MMU | |
289 | select CPU_V6 | |
290 | select ARM_AMBA | |
291 | select COMMON_CLKDEV | |
ccf50e23 RK |
292 | select GENERIC_CLOCKEVENTS |
293 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
294 | help | |
295 | Support for Broadcom's BCMRing platform. | |
296 | ||
1da177e4 | 297 | config ARCH_CLPS711X |
4af6fee1 | 298 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 299 | select CPU_ARM720T |
5cfc8ee0 | 300 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
301 | help |
302 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 303 | |
d94f944e AV |
304 | config ARCH_CNS3XXX |
305 | bool "Cavium Networks CNS3XXX family" | |
306 | select CPU_V6 | |
d94f944e AV |
307 | select GENERIC_CLOCKEVENTS |
308 | select ARM_GIC | |
5f32f7a0 | 309 | select PCI_DOMAINS if PCI |
d94f944e AV |
310 | help |
311 | Support for Cavium Networks CNS3XXX platform. | |
312 | ||
788c9700 RK |
313 | config ARCH_GEMINI |
314 | bool "Cortina Systems Gemini" | |
315 | select CPU_FA526 | |
788c9700 | 316 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 317 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
318 | help |
319 | Support for the Cortina Systems Gemini family SoCs | |
320 | ||
1da177e4 LT |
321 | config ARCH_EBSA110 |
322 | bool "EBSA-110" | |
c750815e | 323 | select CPU_SA110 |
f7e68bbf | 324 | select ISA |
c5eb2a2b | 325 | select NO_IOPORT |
5cfc8ee0 | 326 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
327 | help |
328 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 329 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
330 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
331 | parallel port. | |
332 | ||
e7736d47 LB |
333 | config ARCH_EP93XX |
334 | bool "EP93xx-based" | |
c750815e | 335 | select CPU_ARM920T |
e7736d47 LB |
336 | select ARM_AMBA |
337 | select ARM_VIC | |
ae696fd5 | 338 | select COMMON_CLKDEV |
7444a72e | 339 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 340 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 341 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
342 | help |
343 | This enables support for the Cirrus EP93xx series of CPUs. | |
344 | ||
1da177e4 LT |
345 | config ARCH_FOOTBRIDGE |
346 | bool "FootBridge" | |
c750815e | 347 | select CPU_SA110 |
1da177e4 | 348 | select FOOTBRIDGE |
5cfc8ee0 | 349 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
350 | help |
351 | Support for systems based on the DC21285 companion chip | |
352 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 353 | |
788c9700 RK |
354 | config ARCH_MXC |
355 | bool "Freescale MXC/iMX-based" | |
788c9700 | 356 | select GENERIC_CLOCKEVENTS |
788c9700 | 357 | select ARCH_REQUIRE_GPIOLIB |
03e09cd8 | 358 | select COMMON_CLKDEV |
788c9700 RK |
359 | help |
360 | Support for Freescale MXC/iMX-based family of processors | |
361 | ||
7bd0f2f5 | 362 | config ARCH_STMP3XXX |
363 | bool "Freescale STMP3xxx" | |
364 | select CPU_ARM926T | |
7bd0f2f5 | 365 | select COMMON_CLKDEV |
366 | select ARCH_REQUIRE_GPIOLIB | |
7bd0f2f5 | 367 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 368 | select USB_ARCH_HAS_EHCI |
369 | help | |
370 | Support for systems based on the Freescale 3xxx CPUs. | |
371 | ||
4af6fee1 DS |
372 | config ARCH_NETX |
373 | bool "Hilscher NetX based" | |
c750815e | 374 | select CPU_ARM926T |
4af6fee1 | 375 | select ARM_VIC |
2fcfe6b8 | 376 | select GENERIC_CLOCKEVENTS |
f999b8bd | 377 | help |
4af6fee1 DS |
378 | This enables support for systems based on the Hilscher NetX Soc |
379 | ||
380 | config ARCH_H720X | |
381 | bool "Hynix HMS720x-based" | |
c750815e | 382 | select CPU_ARM720T |
4af6fee1 | 383 | select ISA_DMA_API |
5cfc8ee0 | 384 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
385 | help |
386 | This enables support for systems based on the Hynix HMS720x | |
387 | ||
3b938be6 RK |
388 | config ARCH_IOP13XX |
389 | bool "IOP13xx-based" | |
390 | depends on MMU | |
c750815e | 391 | select CPU_XSC3 |
3b938be6 RK |
392 | select PLAT_IOP |
393 | select PCI | |
394 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 395 | select VMSPLIT_1G |
3b938be6 RK |
396 | help |
397 | Support for Intel's IOP13XX (XScale) family of processors. | |
398 | ||
3f7e5815 LB |
399 | config ARCH_IOP32X |
400 | bool "IOP32x-based" | |
a4f7e763 | 401 | depends on MMU |
c750815e | 402 | select CPU_XSCALE |
7ae1f7ec | 403 | select PLAT_IOP |
f7e68bbf | 404 | select PCI |
bb2b180c | 405 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 406 | help |
3f7e5815 LB |
407 | Support for Intel's 80219 and IOP32X (XScale) family of |
408 | processors. | |
409 | ||
410 | config ARCH_IOP33X | |
411 | bool "IOP33x-based" | |
412 | depends on MMU | |
c750815e | 413 | select CPU_XSCALE |
7ae1f7ec | 414 | select PLAT_IOP |
3f7e5815 | 415 | select PCI |
bb2b180c | 416 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
417 | help |
418 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 419 | |
3b938be6 RK |
420 | config ARCH_IXP23XX |
421 | bool "IXP23XX-based" | |
a4f7e763 | 422 | depends on MMU |
c750815e | 423 | select CPU_XSC3 |
3b938be6 | 424 | select PCI |
5cfc8ee0 | 425 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 426 | help |
3b938be6 | 427 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
428 | |
429 | config ARCH_IXP2000 | |
430 | bool "IXP2400/2800-based" | |
a4f7e763 | 431 | depends on MMU |
c750815e | 432 | select CPU_XSCALE |
f7e68bbf | 433 | select PCI |
5cfc8ee0 | 434 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
435 | help |
436 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 437 | |
3b938be6 RK |
438 | config ARCH_IXP4XX |
439 | bool "IXP4xx-based" | |
a4f7e763 | 440 | depends on MMU |
c750815e | 441 | select CPU_XSCALE |
8858e9af | 442 | select GENERIC_GPIO |
3b938be6 | 443 | select GENERIC_CLOCKEVENTS |
5b0d495c | 444 | select HAVE_SCHED_CLOCK |
485bdde7 | 445 | select DMABOUNCE if PCI |
c4713074 | 446 | help |
3b938be6 | 447 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 448 | |
edabd38e SB |
449 | config ARCH_DOVE |
450 | bool "Marvell Dove" | |
451 | select PCI | |
edabd38e | 452 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
453 | select GENERIC_CLOCKEVENTS |
454 | select PLAT_ORION | |
455 | help | |
456 | Support for the Marvell Dove SoC 88AP510 | |
457 | ||
651c74c7 SB |
458 | config ARCH_KIRKWOOD |
459 | bool "Marvell Kirkwood" | |
c750815e | 460 | select CPU_FEROCEON |
651c74c7 | 461 | select PCI |
a8865655 | 462 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
463 | select GENERIC_CLOCKEVENTS |
464 | select PLAT_ORION | |
465 | help | |
466 | Support for the following Marvell Kirkwood series SoCs: | |
467 | 88F6180, 88F6192 and 88F6281. | |
468 | ||
777f9beb LB |
469 | config ARCH_LOKI |
470 | bool "Marvell Loki (88RC8480)" | |
c750815e | 471 | select CPU_FEROCEON |
777f9beb LB |
472 | select GENERIC_CLOCKEVENTS |
473 | select PLAT_ORION | |
474 | help | |
475 | Support for the Marvell Loki (88RC8480) SoC. | |
476 | ||
40805949 KW |
477 | config ARCH_LPC32XX |
478 | bool "NXP LPC32XX" | |
479 | select CPU_ARM926T | |
480 | select ARCH_REQUIRE_GPIOLIB | |
481 | select HAVE_IDE | |
482 | select ARM_AMBA | |
483 | select USB_ARCH_HAS_OHCI | |
484 | select COMMON_CLKDEV | |
485 | select GENERIC_TIME | |
486 | select GENERIC_CLOCKEVENTS | |
487 | help | |
488 | Support for the NXP LPC32XX family of processors | |
489 | ||
794d15b2 SS |
490 | config ARCH_MV78XX0 |
491 | bool "Marvell MV78xx0" | |
c750815e | 492 | select CPU_FEROCEON |
794d15b2 | 493 | select PCI |
a8865655 | 494 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
495 | select GENERIC_CLOCKEVENTS |
496 | select PLAT_ORION | |
497 | help | |
498 | Support for the following Marvell MV78xx0 series SoCs: | |
499 | MV781x0, MV782x0. | |
500 | ||
9dd0b194 | 501 | config ARCH_ORION5X |
585cf175 TP |
502 | bool "Marvell Orion" |
503 | depends on MMU | |
c750815e | 504 | select CPU_FEROCEON |
038ee083 | 505 | select PCI |
a8865655 | 506 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 507 | select GENERIC_CLOCKEVENTS |
69b02f6a | 508 | select PLAT_ORION |
585cf175 | 509 | help |
9dd0b194 | 510 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 511 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 512 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 513 | |
788c9700 | 514 | config ARCH_MMP |
2f7e8fae | 515 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 516 | depends on MMU |
788c9700 | 517 | select ARCH_REQUIRE_GPIOLIB |
788c9700 | 518 | select COMMON_CLKDEV |
788c9700 | 519 | select GENERIC_CLOCKEVENTS |
28bb7bc6 | 520 | select HAVE_SCHED_CLOCK |
788c9700 RK |
521 | select TICK_ONESHOT |
522 | select PLAT_PXA | |
0bd86961 | 523 | select SPARSE_IRQ |
788c9700 | 524 | help |
2f7e8fae | 525 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
526 | |
527 | config ARCH_KS8695 | |
528 | bool "Micrel/Kendin KS8695" | |
529 | select CPU_ARM922T | |
98830bc9 | 530 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 531 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
532 | help |
533 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
534 | System-on-Chip devices. | |
535 | ||
536 | config ARCH_NS9XXX | |
537 | bool "NetSilicon NS9xxx" | |
538 | select CPU_ARM926T | |
539 | select GENERIC_GPIO | |
788c9700 RK |
540 | select GENERIC_CLOCKEVENTS |
541 | select HAVE_CLK | |
542 | help | |
543 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
544 | System. | |
545 | ||
546 | <http://www.digi.com/products/microprocessors/index.jsp> | |
547 | ||
548 | config ARCH_W90X900 | |
549 | bool "Nuvoton W90X900 CPU" | |
550 | select CPU_ARM926T | |
c52d3d68 | 551 | select ARCH_REQUIRE_GPIOLIB |
0e4a34bb | 552 | select COMMON_CLKDEV |
58b5369e | 553 | select GENERIC_CLOCKEVENTS |
788c9700 | 554 | help |
a8bc4ead | 555 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
556 | At present, the w90x900 has been renamed nuc900, regarding | |
557 | the ARM series product line, you can login the following | |
558 | link address to know more. | |
559 | ||
560 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
561 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 562 | |
a62e9030 | 563 | config ARCH_NUC93X |
564 | bool "Nuvoton NUC93X CPU" | |
565 | select CPU_ARM926T | |
a62e9030 | 566 | select COMMON_CLKDEV |
567 | help | |
568 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
569 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
570 | ||
c5f80065 EG |
571 | config ARCH_TEGRA |
572 | bool "NVIDIA Tegra" | |
573 | select GENERIC_TIME | |
574 | select GENERIC_CLOCKEVENTS | |
575 | select GENERIC_GPIO | |
576 | select HAVE_CLK | |
e3f4c0ab | 577 | select HAVE_SCHED_CLOCK |
d8611961 | 578 | select COMMON_CLKDEV |
c5f80065 | 579 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 580 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
581 | help |
582 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
583 | Tegra 6xx and Tegra 2 series). | |
584 | ||
4af6fee1 DS |
585 | config ARCH_PNX4008 |
586 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 587 | select CPU_ARM926T |
6985a5ad | 588 | select COMMON_CLKDEV |
5cfc8ee0 | 589 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
590 | help |
591 | This enables support for Philips PNX4008 mobile platform. | |
592 | ||
1da177e4 | 593 | config ARCH_PXA |
2c8086a5 | 594 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 595 | depends on MMU |
034d2f5a | 596 | select ARCH_MTD_XIP |
89c52ed4 | 597 | select ARCH_HAS_CPUFREQ |
8c3abc7d | 598 | select COMMON_CLKDEV |
7444a72e | 599 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 600 | select GENERIC_CLOCKEVENTS |
7ce83018 | 601 | select HAVE_SCHED_CLOCK |
a88264c2 | 602 | select TICK_ONESHOT |
bd5ce433 | 603 | select PLAT_PXA |
6ac6b817 | 604 | select SPARSE_IRQ |
f999b8bd | 605 | help |
2c8086a5 | 606 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 607 | |
788c9700 RK |
608 | config ARCH_MSM |
609 | bool "Qualcomm MSM" | |
4b536b8d | 610 | select HAVE_CLK |
49cbe786 | 611 | select GENERIC_CLOCKEVENTS |
923a081c | 612 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 613 | help |
4b53eb4f DW |
614 | Support for Qualcomm MSM/QSD based systems. This runs on the |
615 | apps processor of the MSM/QSD and depends on a shared memory | |
616 | interface to the modem processor which runs the baseband | |
617 | stack and controls some vital subsystems | |
618 | (clock and power control, etc). | |
49cbe786 | 619 | |
c793c1b0 MD |
620 | config ARCH_SHMOBILE |
621 | bool "Renesas SH-Mobile" | |
622 | help | |
623 | Support for Renesas's SH-Mobile ARM platforms | |
624 | ||
1da177e4 LT |
625 | config ARCH_RPC |
626 | bool "RiscPC" | |
627 | select ARCH_ACORN | |
628 | select FIQ | |
629 | select TIMER_ACORN | |
a08b6b79 | 630 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 631 | select HAVE_PATA_PLATFORM |
065909b9 | 632 | select ISA_DMA_API |
5ea81769 | 633 | select NO_IOPORT |
07f841b7 | 634 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 635 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
636 | help |
637 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
638 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
639 | ||
640 | config ARCH_SA1100 | |
641 | bool "SA1100-based" | |
c750815e | 642 | select CPU_SA1100 |
f7e68bbf | 643 | select ISA |
05944d74 | 644 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 645 | select ARCH_MTD_XIP |
89c52ed4 | 646 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 647 | select CPU_FREQ |
3e238be2 | 648 | select GENERIC_CLOCKEVENTS |
9483a578 | 649 | select HAVE_CLK |
5094b92f | 650 | select HAVE_SCHED_CLOCK |
3e238be2 | 651 | select TICK_ONESHOT |
7444a72e | 652 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
653 | help |
654 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
655 | |
656 | config ARCH_S3C2410 | |
63b1f51b | 657 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 658 | select GENERIC_GPIO |
9d56c02a | 659 | select ARCH_HAS_CPUFREQ |
9483a578 | 660 | select HAVE_CLK |
5cfc8ee0 | 661 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 662 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
663 | help |
664 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
665 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 666 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 667 | |
63b1f51b BD |
668 | Note, the S3C2416 and the S3C2450 are so close that they even share |
669 | the same SoC ID code. This means that there is no seperate machine | |
670 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
671 | ||
a08ab637 BD |
672 | config ARCH_S3C64XX |
673 | bool "Samsung S3C64XX" | |
89f1fa08 | 674 | select PLAT_SAMSUNG |
89f0ce72 | 675 | select CPU_V6 |
89f0ce72 | 676 | select ARM_VIC |
a08ab637 | 677 | select HAVE_CLK |
89f0ce72 | 678 | select NO_IOPORT |
5cfc8ee0 | 679 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 680 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
681 | select ARCH_REQUIRE_GPIOLIB |
682 | select SAMSUNG_CLKSRC | |
683 | select SAMSUNG_IRQ_VIC_TIMER | |
684 | select SAMSUNG_IRQ_UART | |
685 | select S3C_GPIO_TRACK | |
686 | select S3C_GPIO_PULL_UPDOWN | |
687 | select S3C_GPIO_CFG_S3C24XX | |
688 | select S3C_GPIO_CFG_S3C64XX | |
689 | select S3C_DEV_NAND | |
690 | select USB_ARCH_HAS_OHCI | |
691 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 692 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 693 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
694 | help |
695 | Samsung S3C64XX series based systems | |
696 | ||
49b7a491 KK |
697 | config ARCH_S5P64X0 |
698 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
699 | select CPU_V6 |
700 | select GENERIC_GPIO | |
701 | select HAVE_CLK | |
c39d8d55 | 702 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
925c68cd | 703 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 704 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 705 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 706 | help |
49b7a491 KK |
707 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
708 | SMDK6450. | |
c4ffccdd | 709 | |
550db7f1 KK |
710 | config ARCH_S5P6442 |
711 | bool "Samsung S5P6442" | |
712 | select CPU_V6 | |
713 | select GENERIC_GPIO | |
714 | select HAVE_CLK | |
925c68cd | 715 | select ARCH_USES_GETTIMEOFFSET |
c39d8d55 | 716 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
550db7f1 KK |
717 | help |
718 | Samsung S5P6442 CPU based systems | |
719 | ||
acc84707 MS |
720 | config ARCH_S5PC100 |
721 | bool "Samsung S5PC100" | |
5a7652f2 BM |
722 | select GENERIC_GPIO |
723 | select HAVE_CLK | |
724 | select CPU_V7 | |
d6d502fa | 725 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 726 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 727 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 728 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 729 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 730 | help |
acc84707 | 731 | Samsung S5PC100 series based systems |
5a7652f2 | 732 | |
170f4e42 KK |
733 | config ARCH_S5PV210 |
734 | bool "Samsung S5PV210/S5PC110" | |
735 | select CPU_V7 | |
eecb6a84 | 736 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
737 | select GENERIC_GPIO |
738 | select HAVE_CLK | |
739 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 740 | select ARCH_HAS_CPUFREQ |
925c68cd | 741 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 742 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 743 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 744 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
745 | help |
746 | Samsung S5PV210/S5PC110 series based systems | |
747 | ||
cc0e72b8 CY |
748 | config ARCH_S5PV310 |
749 | bool "Samsung S5PV310/S5PC210" | |
750 | select CPU_V7 | |
f567fa6f | 751 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
752 | select GENERIC_GPIO |
753 | select HAVE_CLK | |
754 | select GENERIC_CLOCKEVENTS | |
754961a8 | 755 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 756 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 757 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 CY |
758 | help |
759 | Samsung S5PV310 series based systems | |
760 | ||
1da177e4 LT |
761 | config ARCH_SHARK |
762 | bool "Shark" | |
c750815e | 763 | select CPU_SA110 |
f7e68bbf RK |
764 | select ISA |
765 | select ISA_DMA | |
3bca103a | 766 | select ZONE_DMA |
f7e68bbf | 767 | select PCI |
5cfc8ee0 | 768 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
769 | help |
770 | Support for the StrongARM based Digital DNARD machine, also known | |
771 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 772 | |
83ef3338 HK |
773 | config ARCH_TCC_926 |
774 | bool "Telechips TCC ARM926-based systems" | |
775 | select CPU_ARM926T | |
776 | select HAVE_CLK | |
777 | select COMMON_CLKDEV | |
778 | select GENERIC_CLOCKEVENTS | |
779 | help | |
780 | Support for Telechips TCC ARM926-based systems. | |
781 | ||
1da177e4 LT |
782 | config ARCH_LH7A40X |
783 | bool "Sharp LH7A40X" | |
c750815e | 784 | select CPU_ARM922T |
4ba3f7c5 | 785 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 786 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
787 | help |
788 | Say Y here for systems based on one of the Sharp LH7A40X | |
789 | System on a Chip processors. These CPUs include an ARM922T | |
790 | core with a wide array of integrated devices for | |
791 | hand-held and low-power applications. | |
792 | ||
d98aac75 LW |
793 | config ARCH_U300 |
794 | bool "ST-Ericsson U300 Series" | |
795 | depends on MMU | |
796 | select CPU_ARM926T | |
5c21b7ca | 797 | select HAVE_SCHED_CLOCK |
bc581770 | 798 | select HAVE_TCM |
d98aac75 LW |
799 | select ARM_AMBA |
800 | select ARM_VIC | |
d98aac75 | 801 | select GENERIC_CLOCKEVENTS |
d98aac75 LW |
802 | select COMMON_CLKDEV |
803 | select GENERIC_GPIO | |
804 | help | |
805 | Support for ST-Ericsson U300 series mobile platforms. | |
806 | ||
ccf50e23 RK |
807 | config ARCH_U8500 |
808 | bool "ST-Ericsson U8500 Series" | |
809 | select CPU_V7 | |
810 | select ARM_AMBA | |
ccf50e23 RK |
811 | select GENERIC_CLOCKEVENTS |
812 | select COMMON_CLKDEV | |
94bdc0e2 | 813 | select ARCH_REQUIRE_GPIOLIB |
ccf50e23 RK |
814 | help |
815 | Support for ST-Ericsson's Ux500 architecture | |
816 | ||
817 | config ARCH_NOMADIK | |
818 | bool "STMicroelectronics Nomadik" | |
819 | select ARM_AMBA | |
820 | select ARM_VIC | |
821 | select CPU_ARM926T | |
ccf50e23 | 822 | select COMMON_CLKDEV |
ccf50e23 | 823 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
824 | select ARCH_REQUIRE_GPIOLIB |
825 | help | |
826 | Support for the Nomadik platform by ST-Ericsson | |
827 | ||
7c6337e2 KH |
828 | config ARCH_DAVINCI |
829 | bool "TI DaVinci" | |
7c6337e2 | 830 | select GENERIC_CLOCKEVENTS |
dce1115b | 831 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 832 | select ZONE_DMA |
9232fcc9 | 833 | select HAVE_IDE |
c5b736d0 | 834 | select COMMON_CLKDEV |
20e9969b | 835 | select GENERIC_ALLOCATOR |
ae88e05a | 836 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
837 | help |
838 | Support for TI's DaVinci platform. | |
839 | ||
3b938be6 RK |
840 | config ARCH_OMAP |
841 | bool "TI OMAP" | |
9483a578 | 842 | select HAVE_CLK |
7444a72e | 843 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 844 | select ARCH_HAS_CPUFREQ |
06cad098 | 845 | select GENERIC_CLOCKEVENTS |
dc548fbb | 846 | select HAVE_SCHED_CLOCK |
9af915da | 847 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 848 | help |
6e457bb0 | 849 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 850 | |
cee37e50 | 851 | config PLAT_SPEAR |
852 | bool "ST SPEAr" | |
853 | select ARM_AMBA | |
854 | select ARCH_REQUIRE_GPIOLIB | |
855 | select COMMON_CLKDEV | |
856 | select GENERIC_CLOCKEVENTS | |
cee37e50 | 857 | select HAVE_CLK |
858 | help | |
859 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
860 | ||
1da177e4 LT |
861 | endchoice |
862 | ||
ccf50e23 RK |
863 | # |
864 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
865 | # Kconfigs may be included either alphabetically (according to the | |
866 | # plat- suffix) or along side the corresponding mach-* source. | |
867 | # | |
95b8f20f RK |
868 | source "arch/arm/mach-aaec2000/Kconfig" |
869 | ||
870 | source "arch/arm/mach-at91/Kconfig" | |
871 | ||
872 | source "arch/arm/mach-bcmring/Kconfig" | |
873 | ||
1da177e4 LT |
874 | source "arch/arm/mach-clps711x/Kconfig" |
875 | ||
d94f944e AV |
876 | source "arch/arm/mach-cns3xxx/Kconfig" |
877 | ||
95b8f20f RK |
878 | source "arch/arm/mach-davinci/Kconfig" |
879 | ||
880 | source "arch/arm/mach-dove/Kconfig" | |
881 | ||
e7736d47 LB |
882 | source "arch/arm/mach-ep93xx/Kconfig" |
883 | ||
1da177e4 LT |
884 | source "arch/arm/mach-footbridge/Kconfig" |
885 | ||
59d3a193 PZ |
886 | source "arch/arm/mach-gemini/Kconfig" |
887 | ||
95b8f20f RK |
888 | source "arch/arm/mach-h720x/Kconfig" |
889 | ||
1da177e4 LT |
890 | source "arch/arm/mach-integrator/Kconfig" |
891 | ||
3f7e5815 LB |
892 | source "arch/arm/mach-iop32x/Kconfig" |
893 | ||
894 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 895 | |
285f5fa7 DW |
896 | source "arch/arm/mach-iop13xx/Kconfig" |
897 | ||
1da177e4 LT |
898 | source "arch/arm/mach-ixp4xx/Kconfig" |
899 | ||
900 | source "arch/arm/mach-ixp2000/Kconfig" | |
901 | ||
c4713074 LB |
902 | source "arch/arm/mach-ixp23xx/Kconfig" |
903 | ||
95b8f20f RK |
904 | source "arch/arm/mach-kirkwood/Kconfig" |
905 | ||
906 | source "arch/arm/mach-ks8695/Kconfig" | |
907 | ||
908 | source "arch/arm/mach-lh7a40x/Kconfig" | |
909 | ||
777f9beb LB |
910 | source "arch/arm/mach-loki/Kconfig" |
911 | ||
40805949 KW |
912 | source "arch/arm/mach-lpc32xx/Kconfig" |
913 | ||
95b8f20f RK |
914 | source "arch/arm/mach-msm/Kconfig" |
915 | ||
794d15b2 SS |
916 | source "arch/arm/mach-mv78xx0/Kconfig" |
917 | ||
95b8f20f | 918 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 919 | |
95b8f20f | 920 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 921 | |
95b8f20f RK |
922 | source "arch/arm/mach-nomadik/Kconfig" |
923 | source "arch/arm/plat-nomadik/Kconfig" | |
924 | ||
925 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 926 | |
186f93ea | 927 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 928 | |
d48af15e TL |
929 | source "arch/arm/plat-omap/Kconfig" |
930 | ||
931 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 932 | |
1dbae815 TL |
933 | source "arch/arm/mach-omap2/Kconfig" |
934 | ||
9dd0b194 | 935 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 936 | |
95b8f20f RK |
937 | source "arch/arm/mach-pxa/Kconfig" |
938 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 939 | |
95b8f20f RK |
940 | source "arch/arm/mach-mmp/Kconfig" |
941 | ||
942 | source "arch/arm/mach-realview/Kconfig" | |
943 | ||
944 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 945 | |
cf383678 | 946 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 947 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 948 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 949 | |
cee37e50 | 950 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 951 | |
83ef3338 HK |
952 | source "arch/arm/plat-tcc/Kconfig" |
953 | ||
a21765a7 BD |
954 | if ARCH_S3C2410 |
955 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 956 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 957 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 958 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 959 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 960 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 961 | endif |
1da177e4 | 962 | |
a08ab637 | 963 | if ARCH_S3C64XX |
431107ea | 964 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
965 | endif |
966 | ||
49b7a491 | 967 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 968 | |
550db7f1 | 969 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 970 | |
5a7652f2 | 971 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 972 | |
170f4e42 KK |
973 | source "arch/arm/mach-s5pv210/Kconfig" |
974 | ||
cc0e72b8 CY |
975 | source "arch/arm/mach-s5pv310/Kconfig" |
976 | ||
882d01f9 | 977 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 978 | |
882d01f9 | 979 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 980 | |
c5f80065 EG |
981 | source "arch/arm/mach-tegra/Kconfig" |
982 | ||
95b8f20f | 983 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 984 | |
95b8f20f | 985 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
986 | |
987 | source "arch/arm/mach-versatile/Kconfig" | |
988 | ||
ceade897 RK |
989 | source "arch/arm/mach-vexpress/Kconfig" |
990 | ||
7ec80ddf | 991 | source "arch/arm/mach-w90x900/Kconfig" |
992 | ||
1da177e4 LT |
993 | # Definitions to make life easier |
994 | config ARCH_ACORN | |
995 | bool | |
996 | ||
7ae1f7ec LB |
997 | config PLAT_IOP |
998 | bool | |
469d3044 | 999 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1000 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1001 | |
69b02f6a LB |
1002 | config PLAT_ORION |
1003 | bool | |
f06a1624 | 1004 | select HAVE_SCHED_CLOCK |
69b02f6a | 1005 | |
bd5ce433 EM |
1006 | config PLAT_PXA |
1007 | bool | |
1008 | ||
f4b8b319 RK |
1009 | config PLAT_VERSATILE |
1010 | bool | |
1011 | ||
e3887714 RK |
1012 | config ARM_TIMER_SP804 |
1013 | bool | |
1014 | ||
1da177e4 LT |
1015 | source arch/arm/mm/Kconfig |
1016 | ||
afe4b25e LB |
1017 | config IWMMXT |
1018 | bool "Enable iWMMXt support" | |
40305a58 EM |
1019 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK |
1020 | default y if PXA27x || PXA3xx || ARCH_MMP | |
afe4b25e LB |
1021 | help |
1022 | Enable support for iWMMXt context switching at run time if | |
1023 | running on a CPU that supports it. | |
1024 | ||
1da177e4 LT |
1025 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1026 | config XSCALE_PMU | |
1027 | bool | |
1028 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1029 | default y | |
1030 | ||
0f4f0672 | 1031 | config CPU_HAS_PMU |
8954bb0d WD |
1032 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
1033 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
1034 | default y |
1035 | bool | |
1036 | ||
3b93e7b0 HC |
1037 | if !MMU |
1038 | source "arch/arm/Kconfig-nommu" | |
1039 | endif | |
1040 | ||
9cba3ccc CM |
1041 | config ARM_ERRATA_411920 |
1042 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
81d11955 | 1043 | depends on CPU_V6 |
9cba3ccc CM |
1044 | help |
1045 | Invalidation of the Instruction Cache operation can | |
1046 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1047 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1048 | recommended workaround. | |
1049 | ||
7ce236fc CM |
1050 | config ARM_ERRATA_430973 |
1051 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1052 | depends on CPU_V7 | |
1053 | help | |
1054 | This option enables the workaround for the 430973 Cortex-A8 | |
1055 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1056 | interworking branch is replaced with another code sequence at the | |
1057 | same virtual address, whether due to self-modifying code or virtual | |
1058 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1059 | stale interworking branch prediction. This results in Cortex-A8 | |
1060 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1061 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1062 | and also flushes the branch target cache at every context switch. | |
1063 | Note that setting specific bits in the ACTLR register may not be | |
1064 | available in non-secure mode. | |
1065 | ||
855c551f CM |
1066 | config ARM_ERRATA_458693 |
1067 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1068 | depends on CPU_V7 | |
1069 | help | |
1070 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1071 | erratum. For very specific sequences of memory operations, it is | |
1072 | possible for a hazard condition intended for a cache line to instead | |
1073 | be incorrectly associated with a different cache line. This false | |
1074 | hazard might then cause a processor deadlock. The workaround enables | |
1075 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1076 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1077 | register may not be available in non-secure mode. | |
1078 | ||
0516e464 CM |
1079 | config ARM_ERRATA_460075 |
1080 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1081 | depends on CPU_V7 | |
1082 | help | |
1083 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1084 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1085 | situation in which recent store transactions to the L2 cache are lost | |
1086 | and overwritten with stale memory contents from external memory. The | |
1087 | workaround disables the write-allocate mode for the L2 cache via the | |
1088 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1089 | may not be available in non-secure mode. | |
1090 | ||
9f05027c WD |
1091 | config ARM_ERRATA_742230 |
1092 | bool "ARM errata: DMB operation may be faulty" | |
1093 | depends on CPU_V7 && SMP | |
1094 | help | |
1095 | This option enables the workaround for the 742230 Cortex-A9 | |
1096 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1097 | between two write operations may not ensure the correct visibility | |
1098 | ordering of the two writes. This workaround sets a specific bit in | |
1099 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1100 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1101 | the two writes. | |
1102 | ||
a672e99b WD |
1103 | config ARM_ERRATA_742231 |
1104 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1105 | depends on CPU_V7 && SMP | |
1106 | help | |
1107 | This option enables the workaround for the 742231 Cortex-A9 | |
1108 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1109 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1110 | accessing some data located in the same cache line, may get corrupted | |
1111 | data due to bad handling of the address hazard when the line gets | |
1112 | replaced from one of the CPUs at the same time as another CPU is | |
1113 | accessing it. This workaround sets specific bits in the diagnostic | |
1114 | register of the Cortex-A9 which reduces the linefill issuing | |
1115 | capabilities of the processor. | |
1116 | ||
9e65582a SS |
1117 | config PL310_ERRATA_588369 |
1118 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
1119 | depends on CACHE_L2X0 && ARCH_OMAP4 | |
1120 | help | |
1121 | The PL310 L2 cache controller implements three types of Clean & | |
1122 | Invalidate maintenance operations: by Physical Address | |
1123 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1124 | They are architecturally defined to behave as the execution of a | |
1125 | clean operation followed immediately by an invalidate operation, | |
1126 | both performing to the same memory location. This functionality | |
1127 | is not correctly implemented in PL310 as clean lines are not | |
1128 | invalidated as a result of these operations. Note that this errata | |
1129 | uses Texas Instrument's secure monitor api. | |
cdf357f1 WD |
1130 | |
1131 | config ARM_ERRATA_720789 | |
1132 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1133 | depends on CPU_V7 && SMP | |
1134 | help | |
1135 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1136 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1137 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1138 | As a consequence of this erratum, some TLB entries which should be | |
1139 | invalidated are not, resulting in an incoherency in the system page | |
1140 | tables. The workaround changes the TLB flushing routines to invalidate | |
1141 | entries regardless of the ASID. | |
475d92fc WD |
1142 | |
1143 | config ARM_ERRATA_743622 | |
1144 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1145 | depends on CPU_V7 | |
1146 | help | |
1147 | This option enables the workaround for the 743622 Cortex-A9 | |
1148 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1149 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1150 | corruption. This workaround sets a specific bit in the diagnostic | |
1151 | register of the Cortex-A9 which disables the Store Buffer | |
1152 | optimisation, preventing the defect from occurring. This has no | |
1153 | visible impact on the overall performance or power consumption of the | |
1154 | processor. | |
1155 | ||
1da177e4 LT |
1156 | endmenu |
1157 | ||
1158 | source "arch/arm/common/Kconfig" | |
1159 | ||
1da177e4 LT |
1160 | menu "Bus support" |
1161 | ||
1162 | config ARM_AMBA | |
1163 | bool | |
1164 | ||
1165 | config ISA | |
1166 | bool | |
1da177e4 LT |
1167 | help |
1168 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1169 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1170 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1171 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1172 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1173 | ||
065909b9 | 1174 | # Select ISA DMA controller support |
1da177e4 LT |
1175 | config ISA_DMA |
1176 | bool | |
065909b9 | 1177 | select ISA_DMA_API |
1da177e4 | 1178 | |
065909b9 | 1179 | # Select ISA DMA interface |
5cae841b AV |
1180 | config ISA_DMA_API |
1181 | bool | |
5cae841b | 1182 | |
1da177e4 | 1183 | config PCI |
b080ac8a | 1184 | bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX || SA1100_NANOENGINE |
1da177e4 LT |
1185 | help |
1186 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1187 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1188 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1189 | VESA. If you have PCI, say Y, otherwise N. | |
1190 | ||
52882173 AV |
1191 | config PCI_DOMAINS |
1192 | bool | |
1193 | depends on PCI | |
1194 | ||
b080ac8a MRJ |
1195 | config PCI_NANOENGINE |
1196 | bool "BSE nanoEngine PCI support" | |
1197 | depends on SA1100_NANOENGINE | |
1198 | help | |
1199 | Enable PCI on the BSE nanoEngine board. | |
1200 | ||
36e23590 MW |
1201 | config PCI_SYSCALL |
1202 | def_bool PCI | |
1203 | ||
1da177e4 LT |
1204 | # Select the host bridge type |
1205 | config PCI_HOST_VIA82C505 | |
1206 | bool | |
1207 | depends on PCI && ARCH_SHARK | |
1208 | default y | |
1209 | ||
a0113a99 MR |
1210 | config PCI_HOST_ITE8152 |
1211 | bool | |
1212 | depends on PCI && MACH_ARMCORE | |
1213 | default y | |
1214 | select DMABOUNCE | |
1215 | ||
1da177e4 LT |
1216 | source "drivers/pci/Kconfig" |
1217 | ||
1218 | source "drivers/pcmcia/Kconfig" | |
1219 | ||
1220 | endmenu | |
1221 | ||
1222 | menu "Kernel Features" | |
1223 | ||
0567a0c0 KH |
1224 | source "kernel/time/Kconfig" |
1225 | ||
1da177e4 LT |
1226 | config SMP |
1227 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
971acb9b | 1228 | depends on EXPERIMENTAL |
bc28248e | 1229 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1230 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf DW |
1231 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1232 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
1233 | ARCH_MSM_SCORPIONMP | |
f6dd9fa5 | 1234 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1235 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1236 | help |
1237 | This enables support for systems with more than one CPU. If you have | |
1238 | a system with only one CPU, like most personal computers, say N. If | |
1239 | you have a system with more than one CPU, say Y. | |
1240 | ||
1241 | If you say N here, the kernel will run on single and multiprocessor | |
1242 | machines, but will use only one CPU of a multiprocessor machine. If | |
1243 | you say Y here, the kernel will run on many, but not all, single | |
1244 | processor machines. On a single processor machine, the kernel will | |
1245 | run faster if you say N here. | |
1246 | ||
03502faa | 1247 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1248 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1249 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1250 | |
1251 | If you don't know what to do here, say N. | |
1252 | ||
f00ec48f RK |
1253 | config SMP_ON_UP |
1254 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1255 | depends on EXPERIMENTAL | |
1256 | depends on SMP && !XIP && !THUMB2_KERNEL | |
1257 | default y | |
1258 | help | |
1259 | SMP kernels contain instructions which fail on non-SMP processors. | |
1260 | Enabling this option allows the kernel to modify itself to make | |
1261 | these instructions safe. Disabling it allows about 1K of space | |
1262 | savings. | |
1263 | ||
1264 | If you don't know what to do here, say Y. | |
1265 | ||
a8cbcd92 RK |
1266 | config HAVE_ARM_SCU |
1267 | bool | |
1268 | depends on SMP | |
1269 | help | |
1270 | This option enables support for the ARM system coherency unit | |
1271 | ||
f32f4ce2 RK |
1272 | config HAVE_ARM_TWD |
1273 | bool | |
1274 | depends on SMP | |
1275 | help | |
1276 | This options enables support for the ARM timer and watchdog unit | |
1277 | ||
8d5796d2 LB |
1278 | choice |
1279 | prompt "Memory split" | |
1280 | default VMSPLIT_3G | |
1281 | help | |
1282 | Select the desired split between kernel and user memory. | |
1283 | ||
1284 | If you are not absolutely sure what you are doing, leave this | |
1285 | option alone! | |
1286 | ||
1287 | config VMSPLIT_3G | |
1288 | bool "3G/1G user/kernel split" | |
1289 | config VMSPLIT_2G | |
1290 | bool "2G/2G user/kernel split" | |
1291 | config VMSPLIT_1G | |
1292 | bool "1G/3G user/kernel split" | |
1293 | endchoice | |
1294 | ||
1295 | config PAGE_OFFSET | |
1296 | hex | |
1297 | default 0x40000000 if VMSPLIT_1G | |
1298 | default 0x80000000 if VMSPLIT_2G | |
1299 | default 0xC0000000 | |
1300 | ||
1da177e4 LT |
1301 | config NR_CPUS |
1302 | int "Maximum number of CPUs (2-32)" | |
1303 | range 2 32 | |
1304 | depends on SMP | |
1305 | default "4" | |
1306 | ||
a054a811 RK |
1307 | config HOTPLUG_CPU |
1308 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1309 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
176bfc44 | 1310 | depends on !ARCH_MSM |
a054a811 RK |
1311 | help |
1312 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1313 | can be controlled through /sys/devices/system/cpu. | |
1314 | ||
37ee16ae RK |
1315 | config LOCAL_TIMERS |
1316 | bool "Use local timer interrupts" | |
971acb9b | 1317 | depends on SMP |
37ee16ae | 1318 | default y |
89c3dedf | 1319 | select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP |
37ee16ae RK |
1320 | help |
1321 | Enable support for local timers on SMP platforms, rather then the | |
1322 | legacy IPI broadcast method. Local timers allows the system | |
1323 | accounting to be spread across the timer interval, preventing a | |
1324 | "thundering herd" at every timer tick. | |
1325 | ||
d45a398f | 1326 | source kernel/Kconfig.preempt |
1da177e4 | 1327 | |
f8065813 RK |
1328 | config HZ |
1329 | int | |
49b7a491 | 1330 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
2192482e | 1331 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
bfe65704 | 1332 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1333 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1334 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1335 | default 100 |
1336 | ||
16c79651 CM |
1337 | config THUMB2_KERNEL |
1338 | bool "Compile the kernel in Thumb-2 mode" | |
6e6fc998 | 1339 | depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL |
16c79651 CM |
1340 | select AEABI |
1341 | select ARM_ASM_UNIFIED | |
1342 | help | |
1343 | By enabling this option, the kernel will be compiled in | |
1344 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1345 | ARM-Thumb syntax is needed. | |
1346 | ||
1347 | If unsure, say N. | |
1348 | ||
0becb088 CM |
1349 | config ARM_ASM_UNIFIED |
1350 | bool | |
1351 | ||
704bdda0 NP |
1352 | config AEABI |
1353 | bool "Use the ARM EABI to compile the kernel" | |
1354 | help | |
1355 | This option allows for the kernel to be compiled using the latest | |
1356 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1357 | space environment that is also compiled with EABI. | |
1358 | ||
1359 | Since there are major incompatibilities between the legacy ABI and | |
1360 | EABI, especially with regard to structure member alignment, this | |
1361 | option also changes the kernel syscall calling convention to | |
1362 | disambiguate both ABIs and allow for backward compatibility support | |
1363 | (selected with CONFIG_OABI_COMPAT). | |
1364 | ||
1365 | To use this you need GCC version 4.0.0 or later. | |
1366 | ||
6c90c872 | 1367 | config OABI_COMPAT |
a73a3ff1 | 1368 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1369 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1370 | default y |
1371 | help | |
1372 | This option preserves the old syscall interface along with the | |
1373 | new (ARM EABI) one. It also provides a compatibility layer to | |
1374 | intercept syscalls that have structure arguments which layout | |
1375 | in memory differs between the legacy ABI and the new ARM EABI | |
1376 | (only for non "thumb" binaries). This option adds a tiny | |
1377 | overhead to all syscalls and produces a slightly larger kernel. | |
1378 | If you know you'll be using only pure EABI user space then you | |
1379 | can say N here. If this option is not selected and you attempt | |
1380 | to execute a legacy ABI binary then the result will be | |
1381 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1382 | at all). If in doubt say Y. | |
1383 | ||
eb33575c | 1384 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1385 | bool |
e80d6a24 | 1386 | |
05944d74 RK |
1387 | config ARCH_SPARSEMEM_ENABLE |
1388 | bool | |
1389 | ||
07a2f737 RK |
1390 | config ARCH_SPARSEMEM_DEFAULT |
1391 | def_bool ARCH_SPARSEMEM_ENABLE | |
1392 | ||
05944d74 | 1393 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1394 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1395 | |
053a96ca NP |
1396 | config HIGHMEM |
1397 | bool "High Memory Support (EXPERIMENTAL)" | |
1398 | depends on MMU && EXPERIMENTAL | |
1399 | help | |
1400 | The address space of ARM processors is only 4 Gigabytes large | |
1401 | and it has to accommodate user address space, kernel address | |
1402 | space as well as some memory mapped IO. That means that, if you | |
1403 | have a large amount of physical memory and/or IO, not all of the | |
1404 | memory can be "permanently mapped" by the kernel. The physical | |
1405 | memory that is not permanently mapped is called "high memory". | |
1406 | ||
1407 | Depending on the selected kernel/user memory split, minimum | |
1408 | vmalloc space and actual amount of RAM, you may not need this | |
1409 | option which should result in a slightly faster kernel. | |
1410 | ||
1411 | If unsure, say n. | |
1412 | ||
65cec8e3 RK |
1413 | config HIGHPTE |
1414 | bool "Allocate 2nd-level pagetables from highmem" | |
1415 | depends on HIGHMEM | |
1416 | depends on !OUTER_CACHE | |
1417 | ||
1b8873a0 JI |
1418 | config HW_PERF_EVENTS |
1419 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1420 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1421 | default y |
1422 | help | |
1423 | Enable hardware performance counter support for perf events. If | |
1424 | disabled, perf events will use software events only. | |
1425 | ||
354e6f72 | 1426 | config SPARSE_IRQ |
c1ba6ba3 | 1427 | def_bool n |
354e6f72 | 1428 | help |
1429 | This enables support for sparse irqs. This is useful in general | |
1430 | as most CPUs have a fairly sparse array of IRQ vectors, which | |
1431 | the irq_desc then maps directly on to. Systems with a high | |
1432 | number of off-chip IRQs will want to treat this as | |
1433 | experimental until they have been independently verified. | |
1434 | ||
3f22ab27 DH |
1435 | source "mm/Kconfig" |
1436 | ||
c1b2d970 MD |
1437 | config FORCE_MAX_ZONEORDER |
1438 | int "Maximum zone order" if ARCH_SHMOBILE | |
1439 | range 11 64 if ARCH_SHMOBILE | |
1440 | default "9" if SA1111 | |
1441 | default "11" | |
1442 | help | |
1443 | The kernel memory allocator divides physically contiguous memory | |
1444 | blocks into "zones", where each zone is a power of two number of | |
1445 | pages. This option selects the largest power of two that the kernel | |
1446 | keeps in the memory allocator. If you need to allocate very large | |
1447 | blocks of physically contiguous memory, then you may need to | |
1448 | increase this value. | |
1449 | ||
1450 | This config option is actually maximum order plus one. For example, | |
1451 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1452 | ||
1da177e4 LT |
1453 | config LEDS |
1454 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1455 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1456 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1457 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1458 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1459 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1460 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1461 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1462 | help |
1463 | If you say Y here, the LEDs on your machine will be used | |
1464 | to provide useful information about your current system status. | |
1465 | ||
1466 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1467 | be able to select which LEDs are active using the options below. If | |
1468 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1469 | red LED will simply flash regularly to indicate that the system is | |
1470 | still functional. It is safe to say Y here if you have a CATS | |
1471 | system, but the driver will do nothing. | |
1472 | ||
1473 | config LEDS_TIMER | |
1474 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1475 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1476 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1477 | depends on LEDS |
0567a0c0 | 1478 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1479 | default y if ARCH_EBSA110 |
1480 | help | |
1481 | If you say Y here, one of the system LEDs (the green one on the | |
1482 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1483 | will flash regularly to indicate that the system is still | |
1484 | operational. This is mainly useful to kernel hackers who are | |
1485 | debugging unstable kernels. | |
1486 | ||
1487 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1488 | functions. You may choose to use both, but the Timer LED function | |
1489 | will overrule the CPU usage LED. | |
1490 | ||
1491 | config LEDS_CPU | |
1492 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1493 | !ARCH_OMAP) \ |
1494 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1495 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1496 | depends on LEDS |
1497 | help | |
1498 | If you say Y here, the red LED will be used to give a good real | |
1499 | time indication of CPU usage, by lighting whenever the idle task | |
1500 | is not currently executing. | |
1501 | ||
1502 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1503 | functions. You may choose to use both, but the Timer LED function | |
1504 | will overrule the CPU usage LED. | |
1505 | ||
1506 | config ALIGNMENT_TRAP | |
1507 | bool | |
f12d0d7c | 1508 | depends on CPU_CP15_MMU |
1da177e4 | 1509 | default y if !ARCH_EBSA110 |
e119bfff | 1510 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1511 | help |
84eb8d06 | 1512 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1513 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1514 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1515 | fetch/store instructions will be emulated in software if you say | |
1516 | here, which has a severe performance impact. This is necessary for | |
1517 | correct operation of some network protocols. With an IP-only | |
1518 | configuration it is safe to say N, otherwise say Y. | |
1519 | ||
39ec58f3 LB |
1520 | config UACCESS_WITH_MEMCPY |
1521 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1522 | depends on MMU && EXPERIMENTAL | |
1523 | default y if CPU_FEROCEON | |
1524 | help | |
1525 | Implement faster copy_to_user and clear_user methods for CPU | |
1526 | cores where a 8-word STM instruction give significantly higher | |
1527 | memory write throughput than a sequence of individual 32bit stores. | |
1528 | ||
1529 | A possible side effect is a slight increase in scheduling latency | |
1530 | between threads sharing the same address space if they invoke | |
1531 | such copy operations with large buffers. | |
1532 | ||
1533 | However, if the CPU data cache is using a write-allocate mode, | |
1534 | this option is unlikely to provide any performance gain. | |
1535 | ||
70c70d97 NP |
1536 | config SECCOMP |
1537 | bool | |
1538 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1539 | ---help--- | |
1540 | This kernel feature is useful for number crunching applications | |
1541 | that may need to compute untrusted bytecode during their | |
1542 | execution. By using pipes or other transports made available to | |
1543 | the process as file descriptors supporting the read/write | |
1544 | syscalls, it's possible to isolate those applications in | |
1545 | their own address space using seccomp. Once seccomp is | |
1546 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1547 | and the task is only allowed to execute a few safe syscalls | |
1548 | defined by each seccomp mode. | |
1549 | ||
c743f380 NP |
1550 | config CC_STACKPROTECTOR |
1551 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
1552 | help | |
1553 | This option turns on the -fstack-protector GCC feature. This | |
1554 | feature puts, at the beginning of functions, a canary value on | |
1555 | the stack just before the return address, and validates | |
1556 | the value just before actually returning. Stack based buffer | |
1557 | overflows (that need to overwrite this return address) now also | |
1558 | overwrite the canary, which gets detected and the attack is then | |
1559 | neutralized via a kernel panic. | |
1560 | This feature requires gcc version 4.2 or above. | |
1561 | ||
73a65b3f UKK |
1562 | config DEPRECATED_PARAM_STRUCT |
1563 | bool "Provide old way to pass kernel parameters" | |
1564 | help | |
1565 | This was deprecated in 2001 and announced to live on for 5 years. | |
1566 | Some old boot loaders still use this way. | |
1567 | ||
1da177e4 LT |
1568 | endmenu |
1569 | ||
1570 | menu "Boot options" | |
1571 | ||
1572 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1573 | # TEXT and BSS so we preserve their values in the config files. | |
1574 | config ZBOOT_ROM_TEXT | |
1575 | hex "Compressed ROM boot loader base address" | |
1576 | default "0" | |
1577 | help | |
1578 | The physical address at which the ROM-able zImage is to be | |
1579 | placed in the target. Platforms which normally make use of | |
1580 | ROM-able zImage formats normally set this to a suitable | |
1581 | value in their defconfig file. | |
1582 | ||
1583 | If ZBOOT_ROM is not enabled, this has no effect. | |
1584 | ||
1585 | config ZBOOT_ROM_BSS | |
1586 | hex "Compressed ROM boot loader BSS address" | |
1587 | default "0" | |
1588 | help | |
f8c440b2 DF |
1589 | The base address of an area of read/write memory in the target |
1590 | for the ROM-able zImage which must be available while the | |
1591 | decompressor is running. It must be large enough to hold the | |
1592 | entire decompressed kernel plus an additional 128 KiB. | |
1593 | Platforms which normally make use of ROM-able zImage formats | |
1594 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1595 | |
1596 | If ZBOOT_ROM is not enabled, this has no effect. | |
1597 | ||
1598 | config ZBOOT_ROM | |
1599 | bool "Compressed boot loader in ROM/flash" | |
1600 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1601 | help | |
1602 | Say Y here if you intend to execute your compressed kernel image | |
1603 | (zImage) directly from ROM or flash. If unsure, say N. | |
1604 | ||
1605 | config CMDLINE | |
1606 | string "Default kernel command string" | |
1607 | default "" | |
1608 | help | |
1609 | On some architectures (EBSA110 and CATS), there is currently no way | |
1610 | for the boot loader to pass arguments to the kernel. For these | |
1611 | architectures, you should supply some command-line options at build | |
1612 | time by entering them here. As a minimum, you should specify the | |
1613 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1614 | ||
92d2040d AH |
1615 | config CMDLINE_FORCE |
1616 | bool "Always use the default kernel command string" | |
1617 | depends on CMDLINE != "" | |
1618 | help | |
1619 | Always use the default kernel command string, even if the boot | |
1620 | loader passes other arguments to the kernel. | |
1621 | This is useful if you cannot or don't want to change the | |
1622 | command-line options your boot loader passes to the kernel. | |
1623 | ||
1624 | If unsure, say N. | |
1625 | ||
1da177e4 LT |
1626 | config XIP_KERNEL |
1627 | bool "Kernel Execute-In-Place from ROM" | |
1628 | depends on !ZBOOT_ROM | |
1629 | help | |
1630 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1631 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1632 | space since the text section of the kernel is not loaded from flash | |
1633 | to RAM. Read-write sections, such as the data section and stack, | |
1634 | are still copied to RAM. The XIP kernel is not compressed since | |
1635 | it has to run directly from flash, so it will take more space to | |
1636 | store it. The flash address used to link the kernel object files, | |
1637 | and for storing it, is configuration dependent. Therefore, if you | |
1638 | say Y here, you must know the proper physical address where to | |
1639 | store the kernel image depending on your own flash memory usage. | |
1640 | ||
1641 | Also note that the make target becomes "make xipImage" rather than | |
1642 | "make zImage" or "make Image". The final kernel binary to put in | |
1643 | ROM memory will be arch/arm/boot/xipImage. | |
1644 | ||
1645 | If unsure, say N. | |
1646 | ||
1647 | config XIP_PHYS_ADDR | |
1648 | hex "XIP Kernel Physical Location" | |
1649 | depends on XIP_KERNEL | |
1650 | default "0x00080000" | |
1651 | help | |
1652 | This is the physical address in your flash memory the kernel will | |
1653 | be linked for and stored to. This address is dependent on your | |
1654 | own flash usage. | |
1655 | ||
c587e4a6 RP |
1656 | config KEXEC |
1657 | bool "Kexec system call (EXPERIMENTAL)" | |
1658 | depends on EXPERIMENTAL | |
1659 | help | |
1660 | kexec is a system call that implements the ability to shutdown your | |
1661 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1662 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1663 | you can start any kernel with it, not just Linux. |
1664 | ||
1665 | It is an ongoing process to be certain the hardware in a machine | |
1666 | is properly shutdown, so do not be surprised if this code does not | |
1667 | initially work for you. It may help to enable device hotplugging | |
1668 | support. | |
1669 | ||
4cd9d6f7 RP |
1670 | config ATAGS_PROC |
1671 | bool "Export atags in procfs" | |
b98d7291 UL |
1672 | depends on KEXEC |
1673 | default y | |
4cd9d6f7 RP |
1674 | help |
1675 | Should the atags used to boot the kernel be exported in an "atags" | |
1676 | file in procfs. Useful with kexec. | |
1677 | ||
cb5d39b3 MW |
1678 | config CRASH_DUMP |
1679 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
1680 | depends on EXPERIMENTAL | |
1681 | help | |
1682 | Generate crash dump after being started by kexec. This should | |
1683 | be normally only set in special crash dump kernels which are | |
1684 | loaded in the main kernel with kexec-tools into a specially | |
1685 | reserved region and then later executed after a crash by | |
1686 | kdump/kexec. The crash dump kernel must be compiled to a | |
1687 | memory address not used by the main kernel | |
1688 | ||
1689 | For more details see Documentation/kdump/kdump.txt | |
1690 | ||
e69edc79 EM |
1691 | config AUTO_ZRELADDR |
1692 | bool "Auto calculation of the decompressed kernel image address" | |
1693 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1694 | help | |
1695 | ZRELADDR is the physical address where the decompressed kernel | |
1696 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1697 | will be determined at run-time by masking the current IP with | |
1698 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1699 | from start of memory. | |
1700 | ||
1da177e4 LT |
1701 | endmenu |
1702 | ||
ac9d7efc | 1703 | menu "CPU Power Management" |
1da177e4 | 1704 | |
89c52ed4 | 1705 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1706 | |
1707 | source "drivers/cpufreq/Kconfig" | |
1708 | ||
64f102b6 YS |
1709 | config CPU_FREQ_IMX |
1710 | tristate "CPUfreq driver for i.MX CPUs" | |
1711 | depends on ARCH_MXC && CPU_FREQ | |
1712 | help | |
1713 | This enables the CPUfreq driver for i.MX CPUs. | |
1714 | ||
1da177e4 LT |
1715 | config CPU_FREQ_SA1100 |
1716 | bool | |
1da177e4 LT |
1717 | |
1718 | config CPU_FREQ_SA1110 | |
1719 | bool | |
1da177e4 LT |
1720 | |
1721 | config CPU_FREQ_INTEGRATOR | |
1722 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1723 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1724 | default y | |
1725 | help | |
1726 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1727 | ||
1728 | For details, take a look at <file:Documentation/cpu-freq>. | |
1729 | ||
1730 | If in doubt, say Y. | |
1731 | ||
9e2697ff RK |
1732 | config CPU_FREQ_PXA |
1733 | bool | |
1734 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1735 | default y | |
1736 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1737 | ||
b3748ddd MB |
1738 | config CPU_FREQ_S3C64XX |
1739 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1740 | depends on CPU_FREQ && CPU_S3C6410 | |
1741 | ||
9d56c02a BD |
1742 | config CPU_FREQ_S3C |
1743 | bool | |
1744 | help | |
1745 | Internal configuration node for common cpufreq on Samsung SoC | |
1746 | ||
1747 | config CPU_FREQ_S3C24XX | |
1748 | bool "CPUfreq driver for Samsung S3C24XX series CPUs" | |
1749 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL | |
1750 | select CPU_FREQ_S3C | |
1751 | help | |
1752 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1753 | of CPUs. | |
1754 | ||
1755 | For details, take a look at <file:Documentation/cpu-freq>. | |
1756 | ||
1757 | If in doubt, say N. | |
1758 | ||
1759 | config CPU_FREQ_S3C24XX_PLL | |
1760 | bool "Support CPUfreq changing of PLL frequency" | |
1761 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL | |
1762 | help | |
1763 | Compile in support for changing the PLL frequency from the | |
1764 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1765 | after a frequency change, so by default it is not enabled. | |
1766 | ||
1767 | This also means that the PLL tables for the selected CPU(s) will | |
1768 | be built which may increase the size of the kernel image. | |
1769 | ||
1770 | config CPU_FREQ_S3C24XX_DEBUG | |
1771 | bool "Debug CPUfreq Samsung driver core" | |
1772 | depends on CPU_FREQ_S3C24XX | |
1773 | help | |
1774 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1775 | ||
1776 | config CPU_FREQ_S3C24XX_IODEBUG | |
1777 | bool "Debug CPUfreq Samsung driver IO timing" | |
1778 | depends on CPU_FREQ_S3C24XX | |
1779 | help | |
1780 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1781 | ||
e6d197a6 BD |
1782 | config CPU_FREQ_S3C24XX_DEBUGFS |
1783 | bool "Export debugfs for CPUFreq" | |
1784 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1785 | help | |
1786 | Export status information via debugfs. | |
1787 | ||
1da177e4 LT |
1788 | endif |
1789 | ||
ac9d7efc RK |
1790 | source "drivers/cpuidle/Kconfig" |
1791 | ||
1792 | endmenu | |
1793 | ||
1da177e4 LT |
1794 | menu "Floating point emulation" |
1795 | ||
1796 | comment "At least one emulation must be selected" | |
1797 | ||
1798 | config FPE_NWFPE | |
1799 | bool "NWFPE math emulation" | |
593c252a | 1800 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
1801 | ---help--- |
1802 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1803 | This is necessary to run most binaries. Linux does not currently | |
1804 | support floating point hardware so you need to say Y here even if | |
1805 | your machine has an FPA or floating point co-processor podule. | |
1806 | ||
1807 | You may say N here if you are going to load the Acorn FPEmulator | |
1808 | early in the bootup. | |
1809 | ||
1810 | config FPE_NWFPE_XP | |
1811 | bool "Support extended precision" | |
bedf142b | 1812 | depends on FPE_NWFPE |
1da177e4 LT |
1813 | help |
1814 | Say Y to include 80-bit support in the kernel floating-point | |
1815 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1816 | Note that gcc does not generate 80-bit operations by default, | |
1817 | so in most cases this option only enlarges the size of the | |
1818 | floating point emulator without any good reason. | |
1819 | ||
1820 | You almost surely want to say N here. | |
1821 | ||
1822 | config FPE_FASTFPE | |
1823 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1824 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1825 | ---help--- |
1826 | Say Y here to include the FAST floating point emulator in the kernel. | |
1827 | This is an experimental much faster emulator which now also has full | |
1828 | precision for the mantissa. It does not support any exceptions. | |
1829 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1830 | ||
1831 | It should be sufficient for most programs. It may be not suitable | |
1832 | for scientific calculations, but you have to check this for yourself. | |
1833 | If you do not feel you need a faster FP emulation you should better | |
1834 | choose NWFPE. | |
1835 | ||
1836 | config VFP | |
1837 | bool "VFP-format floating point maths" | |
c00d4ffd | 1838 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1839 | help |
1840 | Say Y to include VFP support code in the kernel. This is needed | |
1841 | if your hardware includes a VFP unit. | |
1842 | ||
1843 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1844 | release notes and additional status information. | |
1845 | ||
1846 | Say N if your target does not have VFP hardware. | |
1847 | ||
25ebee02 CM |
1848 | config VFPv3 |
1849 | bool | |
1850 | depends on VFP | |
1851 | default y if CPU_V7 | |
1852 | ||
b5872db4 CM |
1853 | config NEON |
1854 | bool "Advanced SIMD (NEON) Extension support" | |
1855 | depends on VFPv3 && CPU_V7 | |
1856 | help | |
1857 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1858 | Extension. | |
1859 | ||
1da177e4 LT |
1860 | endmenu |
1861 | ||
1862 | menu "Userspace binary formats" | |
1863 | ||
1864 | source "fs/Kconfig.binfmt" | |
1865 | ||
1866 | config ARTHUR | |
1867 | tristate "RISC OS personality" | |
704bdda0 | 1868 | depends on !AEABI |
1da177e4 LT |
1869 | help |
1870 | Say Y here to include the kernel code necessary if you want to run | |
1871 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1872 | experimental; if this sounds frightening, say N and sleep in peace. | |
1873 | You can also say M here to compile this support as a module (which | |
1874 | will be called arthur). | |
1875 | ||
1876 | endmenu | |
1877 | ||
1878 | menu "Power management options" | |
1879 | ||
eceab4ac | 1880 | source "kernel/power/Kconfig" |
1da177e4 | 1881 | |
f4cb5700 JB |
1882 | config ARCH_SUSPEND_POSSIBLE |
1883 | def_bool y | |
1884 | ||
1da177e4 LT |
1885 | endmenu |
1886 | ||
d5950b43 SR |
1887 | source "net/Kconfig" |
1888 | ||
ac25150f | 1889 | source "drivers/Kconfig" |
1da177e4 LT |
1890 | |
1891 | source "fs/Kconfig" | |
1892 | ||
1da177e4 LT |
1893 | source "arch/arm/Kconfig.debug" |
1894 | ||
1895 | source "security/Kconfig" | |
1896 | ||
1897 | source "crypto/Kconfig" | |
1898 | ||
1899 | source "lib/Kconfig" |