Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
24056f52 | 5 | select HAVE_DMA_API_DEBUG |
2064c946 | 6 | select HAVE_IDE |
2778f620 | 7 | select HAVE_MEMBLOCK |
12b824fb | 8 | select RTC_LIB |
75e7153a | 9 | select SYS_SUPPORTS_APM_EMULATION |
a41297a0 | 10 | select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) |
fe166148 | 11 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 12 | select HAVE_ARCH_KGDB |
856bc356 | 13 | select HAVE_KPROBES if !XIP_KERNEL |
9edddaa2 | 14 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 15 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 19 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
20 | select HAVE_KERNEL_GZIP |
21 | select HAVE_KERNEL_LZO | |
6e8699f7 | 22 | select HAVE_KERNEL_LZMA |
e360adbe | 23 | select HAVE_IRQ_WORK |
7ada189f JI |
24 | select HAVE_PERF_EVENTS |
25 | select PERF_USE_VMALLOC | |
e513f8bf | 26 | select HAVE_REGS_AND_STACK_ACCESS_API |
e399b1a4 | 27 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) |
ed60453f | 28 | select HAVE_C_RECORDMCOUNT |
e2a93ecc LB |
29 | select HAVE_GENERIC_HARDIRQS |
30 | select HAVE_SPARSE_IRQ | |
25a5662a | 31 | select GENERIC_IRQ_SHOW |
1da177e4 LT |
32 | help |
33 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 34 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 35 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 36 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
37 | Europe. There is an ARM Linux project with a web page at |
38 | <http://www.arm.linux.org.uk/>. | |
39 | ||
74facffe RK |
40 | config ARM_HAS_SG_CHAIN |
41 | bool | |
42 | ||
1a189b97 RK |
43 | config HAVE_PWM |
44 | bool | |
45 | ||
0b05da72 HUK |
46 | config MIGHT_HAVE_PCI |
47 | bool | |
48 | ||
75e7153a RB |
49 | config SYS_SUPPORTS_APM_EMULATION |
50 | bool | |
51 | ||
112f38a4 RK |
52 | config HAVE_SCHED_CLOCK |
53 | bool | |
54 | ||
0a938b97 DB |
55 | config GENERIC_GPIO |
56 | bool | |
0a938b97 | 57 | |
5cfc8ee0 JS |
58 | config ARCH_USES_GETTIMEOFFSET |
59 | bool | |
60 | default n | |
746140c7 | 61 | |
0567a0c0 KH |
62 | config GENERIC_CLOCKEVENTS |
63 | bool | |
0567a0c0 | 64 | |
a8655e83 CM |
65 | config GENERIC_CLOCKEVENTS_BROADCAST |
66 | bool | |
67 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 68 | default y if SMP |
a8655e83 | 69 | |
bf9dd360 RH |
70 | config KTIME_SCALAR |
71 | bool | |
72 | default y | |
73 | ||
bc581770 LW |
74 | config HAVE_TCM |
75 | bool | |
76 | select GENERIC_ALLOCATOR | |
77 | ||
e119bfff RK |
78 | config HAVE_PROC_CPU |
79 | bool | |
80 | ||
5ea81769 AV |
81 | config NO_IOPORT |
82 | bool | |
5ea81769 | 83 | |
1da177e4 LT |
84 | config EISA |
85 | bool | |
86 | ---help--- | |
87 | The Extended Industry Standard Architecture (EISA) bus was | |
88 | developed as an open alternative to the IBM MicroChannel bus. | |
89 | ||
90 | The EISA bus provided some of the features of the IBM MicroChannel | |
91 | bus while maintaining backward compatibility with cards made for | |
92 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
93 | 1995 when it was made obsolete by the PCI bus. | |
94 | ||
95 | Say Y here if you are building a kernel for an EISA-based machine. | |
96 | ||
97 | Otherwise, say N. | |
98 | ||
99 | config SBUS | |
100 | bool | |
101 | ||
102 | config MCA | |
103 | bool | |
104 | help | |
105 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
106 | laptops. It is a bus system similar to PCI or ISA. See | |
107 | <file:Documentation/mca.txt> (and especially the web page given | |
108 | there) before attempting to build an MCA bus kernel. | |
109 | ||
f16fb1ec RK |
110 | config STACKTRACE_SUPPORT |
111 | bool | |
112 | default y | |
113 | ||
f76e9154 NP |
114 | config HAVE_LATENCYTOP_SUPPORT |
115 | bool | |
116 | depends on !SMP | |
117 | default y | |
118 | ||
f16fb1ec RK |
119 | config LOCKDEP_SUPPORT |
120 | bool | |
121 | default y | |
122 | ||
7ad1bcb2 RK |
123 | config TRACE_IRQFLAGS_SUPPORT |
124 | bool | |
125 | default y | |
126 | ||
4a2581a0 TG |
127 | config HARDIRQS_SW_RESEND |
128 | bool | |
129 | default y | |
130 | ||
131 | config GENERIC_IRQ_PROBE | |
132 | bool | |
133 | default y | |
134 | ||
95c354fe NP |
135 | config GENERIC_LOCKBREAK |
136 | bool | |
137 | default y | |
138 | depends on SMP && PREEMPT | |
139 | ||
1da177e4 LT |
140 | config RWSEM_GENERIC_SPINLOCK |
141 | bool | |
142 | default y | |
143 | ||
144 | config RWSEM_XCHGADD_ALGORITHM | |
145 | bool | |
146 | ||
f0d1b0b3 DH |
147 | config ARCH_HAS_ILOG2_U32 |
148 | bool | |
f0d1b0b3 DH |
149 | |
150 | config ARCH_HAS_ILOG2_U64 | |
151 | bool | |
f0d1b0b3 | 152 | |
89c52ed4 BD |
153 | config ARCH_HAS_CPUFREQ |
154 | bool | |
155 | help | |
156 | Internal node to signify that the ARCH has CPUFREQ support | |
157 | and that the relevant menu configurations are displayed for | |
158 | it. | |
159 | ||
c7b0aff4 KH |
160 | config ARCH_HAS_CPU_IDLE_WAIT |
161 | def_bool y | |
162 | ||
b89c3b16 AM |
163 | config GENERIC_HWEIGHT |
164 | bool | |
165 | default y | |
166 | ||
1da177e4 LT |
167 | config GENERIC_CALIBRATE_DELAY |
168 | bool | |
169 | default y | |
170 | ||
a08b6b79 Z |
171 | config ARCH_MAY_HAVE_PC_FDC |
172 | bool | |
173 | ||
5ac6da66 CL |
174 | config ZONE_DMA |
175 | bool | |
5ac6da66 | 176 | |
ccd7ab7f FT |
177 | config NEED_DMA_MAP_STATE |
178 | def_bool y | |
179 | ||
1da177e4 LT |
180 | config GENERIC_ISA_DMA |
181 | bool | |
182 | ||
1da177e4 LT |
183 | config FIQ |
184 | bool | |
185 | ||
034d2f5a AV |
186 | config ARCH_MTD_XIP |
187 | bool | |
188 | ||
c760fc19 HC |
189 | config VECTORS_BASE |
190 | hex | |
6afd6fae | 191 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
192 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
193 | default 0x00000000 | |
194 | help | |
195 | The base address of exception vectors. | |
196 | ||
dc21af99 RK |
197 | config ARM_PATCH_PHYS_VIRT |
198 | bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" | |
199 | depends on EXPERIMENTAL | |
b511d75d | 200 | depends on !XIP_KERNEL && MMU |
dc21af99 RK |
201 | depends on !ARCH_REALVIEW || !SPARSEMEM |
202 | help | |
111e9a5c RK |
203 | Patch phys-to-virt and virt-to-phys translation functions at |
204 | boot and module load time according to the position of the | |
205 | kernel in system memory. | |
dc21af99 | 206 | |
111e9a5c RK |
207 | This can only be used with non-XIP MMU kernels where the base |
208 | of physical memory is at a 16MB boundary, or theoretically 64K | |
209 | for the MSM machine class. | |
dc21af99 | 210 | |
cada3c08 RK |
211 | config ARM_PATCH_PHYS_VIRT_16BIT |
212 | def_bool y | |
213 | depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM | |
111e9a5c RK |
214 | help |
215 | This option extends the physical to virtual translation patching | |
216 | to allow physical memory down to a theoretical minimum of 64K | |
217 | boundaries. | |
cada3c08 | 218 | |
1da177e4 LT |
219 | source "init/Kconfig" |
220 | ||
dc52ddc0 MH |
221 | source "kernel/Kconfig.freezer" |
222 | ||
1da177e4 LT |
223 | menu "System Type" |
224 | ||
3c427975 HC |
225 | config MMU |
226 | bool "MMU-based Paged Memory Management Support" | |
227 | default y | |
228 | help | |
229 | Select if you want MMU-based virtualised addressing space | |
230 | support by paged memory management. If unsure, say 'Y'. | |
231 | ||
ccf50e23 RK |
232 | # |
233 | # The "ARM system type" choice list is ordered alphabetically by option | |
234 | # text. Please add new entries in the option alphabetic order. | |
235 | # | |
1da177e4 LT |
236 | choice |
237 | prompt "ARM system type" | |
6a0e2430 | 238 | default ARCH_VERSATILE |
1da177e4 | 239 | |
4af6fee1 DS |
240 | config ARCH_INTEGRATOR |
241 | bool "ARM Ltd. Integrator family" | |
242 | select ARM_AMBA | |
89c52ed4 | 243 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 244 | select CLKDEV_LOOKUP |
c5a0adb5 | 245 | select ICST |
13edd86d | 246 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 247 | select PLAT_VERSATILE |
c41b16f8 | 248 | select PLAT_VERSATILE_FPGA_IRQ |
4af6fee1 DS |
249 | help |
250 | Support for ARM's Integrator platform. | |
251 | ||
252 | config ARCH_REALVIEW | |
253 | bool "ARM Ltd. RealView family" | |
254 | select ARM_AMBA | |
6d803ba7 | 255 | select CLKDEV_LOOKUP |
c5a0adb5 | 256 | select ICST |
ae30ceac | 257 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 258 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 259 | select PLAT_VERSATILE |
3cb5ee49 | 260 | select PLAT_VERSATILE_CLCD |
e3887714 | 261 | select ARM_TIMER_SP804 |
b56ba8aa | 262 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
263 | help |
264 | This enables support for ARM Ltd RealView boards. | |
265 | ||
266 | config ARCH_VERSATILE | |
267 | bool "ARM Ltd. Versatile family" | |
268 | select ARM_AMBA | |
269 | select ARM_VIC | |
6d803ba7 | 270 | select CLKDEV_LOOKUP |
c5a0adb5 | 271 | select ICST |
89df1272 | 272 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 273 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 274 | select PLAT_VERSATILE |
3414ba8c | 275 | select PLAT_VERSATILE_CLCD |
c41b16f8 | 276 | select PLAT_VERSATILE_FPGA_IRQ |
e3887714 | 277 | select ARM_TIMER_SP804 |
4af6fee1 DS |
278 | help |
279 | This enables support for ARM Ltd Versatile board. | |
280 | ||
ceade897 RK |
281 | config ARCH_VEXPRESS |
282 | bool "ARM Ltd. Versatile Express family" | |
283 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
284 | select ARM_AMBA | |
285 | select ARM_TIMER_SP804 | |
6d803ba7 | 286 | select CLKDEV_LOOKUP |
ceade897 | 287 | select GENERIC_CLOCKEVENTS |
ceade897 | 288 | select HAVE_CLK |
95c34f83 | 289 | select HAVE_PATA_PLATFORM |
ceade897 RK |
290 | select ICST |
291 | select PLAT_VERSATILE | |
0fb44b91 | 292 | select PLAT_VERSATILE_CLCD |
ceade897 RK |
293 | help |
294 | This enables support for the ARM Ltd Versatile Express boards. | |
295 | ||
8fc5ffa0 AV |
296 | config ARCH_AT91 |
297 | bool "Atmel AT91" | |
f373e8c0 | 298 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 299 | select HAVE_CLK |
bd602995 | 300 | select CLKDEV_LOOKUP |
3d51f259 | 301 | select ARM_PATCH_PHYS_VIRT if MMU |
4af6fee1 | 302 | help |
2b3b3516 AV |
303 | This enables support for systems based on the Atmel AT91RM9200, |
304 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 305 | |
ccf50e23 RK |
306 | config ARCH_BCMRING |
307 | bool "Broadcom BCMRING" | |
308 | depends on MMU | |
309 | select CPU_V6 | |
310 | select ARM_AMBA | |
82d63734 | 311 | select ARM_TIMER_SP804 |
6d803ba7 | 312 | select CLKDEV_LOOKUP |
ccf50e23 RK |
313 | select GENERIC_CLOCKEVENTS |
314 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
315 | help | |
316 | Support for Broadcom's BCMRing platform. | |
317 | ||
1da177e4 | 318 | config ARCH_CLPS711X |
4af6fee1 | 319 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 320 | select CPU_ARM720T |
5cfc8ee0 | 321 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
322 | help |
323 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 324 | |
d94f944e AV |
325 | config ARCH_CNS3XXX |
326 | bool "Cavium Networks CNS3XXX family" | |
327 | select CPU_V6 | |
d94f944e AV |
328 | select GENERIC_CLOCKEVENTS |
329 | select ARM_GIC | |
0b05da72 | 330 | select MIGHT_HAVE_PCI |
5f32f7a0 | 331 | select PCI_DOMAINS if PCI |
d94f944e AV |
332 | help |
333 | Support for Cavium Networks CNS3XXX platform. | |
334 | ||
788c9700 RK |
335 | config ARCH_GEMINI |
336 | bool "Cortina Systems Gemini" | |
337 | select CPU_FA526 | |
788c9700 | 338 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 339 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
340 | help |
341 | Support for the Cortina Systems Gemini family SoCs | |
342 | ||
1da177e4 LT |
343 | config ARCH_EBSA110 |
344 | bool "EBSA-110" | |
c750815e | 345 | select CPU_SA110 |
f7e68bbf | 346 | select ISA |
c5eb2a2b | 347 | select NO_IOPORT |
5cfc8ee0 | 348 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
349 | help |
350 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 351 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
352 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
353 | parallel port. | |
354 | ||
e7736d47 LB |
355 | config ARCH_EP93XX |
356 | bool "EP93xx-based" | |
c750815e | 357 | select CPU_ARM920T |
e7736d47 LB |
358 | select ARM_AMBA |
359 | select ARM_VIC | |
6d803ba7 | 360 | select CLKDEV_LOOKUP |
7444a72e | 361 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 362 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 363 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
364 | help |
365 | This enables support for the Cirrus EP93xx series of CPUs. | |
366 | ||
1da177e4 LT |
367 | config ARCH_FOOTBRIDGE |
368 | bool "FootBridge" | |
c750815e | 369 | select CPU_SA110 |
1da177e4 | 370 | select FOOTBRIDGE |
4e8d7637 | 371 | select GENERIC_CLOCKEVENTS |
f999b8bd MM |
372 | help |
373 | Support for systems based on the DC21285 companion chip | |
374 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 375 | |
788c9700 RK |
376 | config ARCH_MXC |
377 | bool "Freescale MXC/iMX-based" | |
788c9700 | 378 | select GENERIC_CLOCKEVENTS |
788c9700 | 379 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 380 | select CLKDEV_LOOKUP |
234b6ced | 381 | select CLKSRC_MMIO |
c124befc | 382 | select HAVE_SCHED_CLOCK |
788c9700 RK |
383 | help |
384 | Support for Freescale MXC/iMX-based family of processors | |
385 | ||
1d3f33d5 SG |
386 | config ARCH_MXS |
387 | bool "Freescale MXS-based" | |
388 | select GENERIC_CLOCKEVENTS | |
389 | select ARCH_REQUIRE_GPIOLIB | |
b9214b97 | 390 | select CLKDEV_LOOKUP |
5c61ddcf | 391 | select CLKSRC_MMIO |
1d3f33d5 SG |
392 | help |
393 | Support for Freescale MXS-based family of processors | |
394 | ||
4af6fee1 DS |
395 | config ARCH_NETX |
396 | bool "Hilscher NetX based" | |
234b6ced | 397 | select CLKSRC_MMIO |
c750815e | 398 | select CPU_ARM926T |
4af6fee1 | 399 | select ARM_VIC |
2fcfe6b8 | 400 | select GENERIC_CLOCKEVENTS |
f999b8bd | 401 | help |
4af6fee1 DS |
402 | This enables support for systems based on the Hilscher NetX Soc |
403 | ||
404 | config ARCH_H720X | |
405 | bool "Hynix HMS720x-based" | |
c750815e | 406 | select CPU_ARM720T |
4af6fee1 | 407 | select ISA_DMA_API |
5cfc8ee0 | 408 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
409 | help |
410 | This enables support for systems based on the Hynix HMS720x | |
411 | ||
3b938be6 RK |
412 | config ARCH_IOP13XX |
413 | bool "IOP13xx-based" | |
414 | depends on MMU | |
c750815e | 415 | select CPU_XSC3 |
3b938be6 RK |
416 | select PLAT_IOP |
417 | select PCI | |
418 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 419 | select VMSPLIT_1G |
3b938be6 RK |
420 | help |
421 | Support for Intel's IOP13XX (XScale) family of processors. | |
422 | ||
3f7e5815 LB |
423 | config ARCH_IOP32X |
424 | bool "IOP32x-based" | |
a4f7e763 | 425 | depends on MMU |
c750815e | 426 | select CPU_XSCALE |
7ae1f7ec | 427 | select PLAT_IOP |
f7e68bbf | 428 | select PCI |
bb2b180c | 429 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 430 | help |
3f7e5815 LB |
431 | Support for Intel's 80219 and IOP32X (XScale) family of |
432 | processors. | |
433 | ||
434 | config ARCH_IOP33X | |
435 | bool "IOP33x-based" | |
436 | depends on MMU | |
c750815e | 437 | select CPU_XSCALE |
7ae1f7ec | 438 | select PLAT_IOP |
3f7e5815 | 439 | select PCI |
bb2b180c | 440 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
441 | help |
442 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 443 | |
3b938be6 RK |
444 | config ARCH_IXP23XX |
445 | bool "IXP23XX-based" | |
a4f7e763 | 446 | depends on MMU |
c750815e | 447 | select CPU_XSC3 |
3b938be6 | 448 | select PCI |
5cfc8ee0 | 449 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 450 | help |
3b938be6 | 451 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
452 | |
453 | config ARCH_IXP2000 | |
454 | bool "IXP2400/2800-based" | |
a4f7e763 | 455 | depends on MMU |
c750815e | 456 | select CPU_XSCALE |
f7e68bbf | 457 | select PCI |
5cfc8ee0 | 458 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
459 | help |
460 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 461 | |
3b938be6 RK |
462 | config ARCH_IXP4XX |
463 | bool "IXP4xx-based" | |
a4f7e763 | 464 | depends on MMU |
234b6ced | 465 | select CLKSRC_MMIO |
c750815e | 466 | select CPU_XSCALE |
8858e9af | 467 | select GENERIC_GPIO |
3b938be6 | 468 | select GENERIC_CLOCKEVENTS |
5b0d495c | 469 | select HAVE_SCHED_CLOCK |
0b05da72 | 470 | select MIGHT_HAVE_PCI |
485bdde7 | 471 | select DMABOUNCE if PCI |
c4713074 | 472 | help |
3b938be6 | 473 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 474 | |
edabd38e SB |
475 | config ARCH_DOVE |
476 | bool "Marvell Dove" | |
7b769bb3 | 477 | select CPU_V7 |
edabd38e | 478 | select PCI |
edabd38e | 479 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
480 | select GENERIC_CLOCKEVENTS |
481 | select PLAT_ORION | |
482 | help | |
483 | Support for the Marvell Dove SoC 88AP510 | |
484 | ||
651c74c7 SB |
485 | config ARCH_KIRKWOOD |
486 | bool "Marvell Kirkwood" | |
c750815e | 487 | select CPU_FEROCEON |
651c74c7 | 488 | select PCI |
a8865655 | 489 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
490 | select GENERIC_CLOCKEVENTS |
491 | select PLAT_ORION | |
492 | help | |
493 | Support for the following Marvell Kirkwood series SoCs: | |
494 | 88F6180, 88F6192 and 88F6281. | |
495 | ||
777f9beb LB |
496 | config ARCH_LOKI |
497 | bool "Marvell Loki (88RC8480)" | |
c750815e | 498 | select CPU_FEROCEON |
777f9beb LB |
499 | select GENERIC_CLOCKEVENTS |
500 | select PLAT_ORION | |
501 | help | |
502 | Support for the Marvell Loki (88RC8480) SoC. | |
503 | ||
40805949 KW |
504 | config ARCH_LPC32XX |
505 | bool "NXP LPC32XX" | |
234b6ced | 506 | select CLKSRC_MMIO |
40805949 KW |
507 | select CPU_ARM926T |
508 | select ARCH_REQUIRE_GPIOLIB | |
509 | select HAVE_IDE | |
510 | select ARM_AMBA | |
511 | select USB_ARCH_HAS_OHCI | |
6d803ba7 | 512 | select CLKDEV_LOOKUP |
40805949 KW |
513 | select GENERIC_TIME |
514 | select GENERIC_CLOCKEVENTS | |
515 | help | |
516 | Support for the NXP LPC32XX family of processors | |
517 | ||
794d15b2 SS |
518 | config ARCH_MV78XX0 |
519 | bool "Marvell MV78xx0" | |
c750815e | 520 | select CPU_FEROCEON |
794d15b2 | 521 | select PCI |
a8865655 | 522 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
523 | select GENERIC_CLOCKEVENTS |
524 | select PLAT_ORION | |
525 | help | |
526 | Support for the following Marvell MV78xx0 series SoCs: | |
527 | MV781x0, MV782x0. | |
528 | ||
9dd0b194 | 529 | config ARCH_ORION5X |
585cf175 TP |
530 | bool "Marvell Orion" |
531 | depends on MMU | |
c750815e | 532 | select CPU_FEROCEON |
038ee083 | 533 | select PCI |
a8865655 | 534 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 535 | select GENERIC_CLOCKEVENTS |
69b02f6a | 536 | select PLAT_ORION |
585cf175 | 537 | help |
9dd0b194 | 538 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 539 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 540 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 541 | |
788c9700 | 542 | config ARCH_MMP |
2f7e8fae | 543 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 544 | depends on MMU |
788c9700 | 545 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 546 | select CLKDEV_LOOKUP |
788c9700 | 547 | select GENERIC_CLOCKEVENTS |
28bb7bc6 | 548 | select HAVE_SCHED_CLOCK |
788c9700 RK |
549 | select TICK_ONESHOT |
550 | select PLAT_PXA | |
0bd86961 | 551 | select SPARSE_IRQ |
788c9700 | 552 | help |
2f7e8fae | 553 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
554 | |
555 | config ARCH_KS8695 | |
556 | bool "Micrel/Kendin KS8695" | |
557 | select CPU_ARM922T | |
98830bc9 | 558 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 559 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
560 | help |
561 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
562 | System-on-Chip devices. | |
563 | ||
788c9700 RK |
564 | config ARCH_W90X900 |
565 | bool "Nuvoton W90X900 CPU" | |
566 | select CPU_ARM926T | |
c52d3d68 | 567 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 568 | select CLKDEV_LOOKUP |
6fa5d5f7 | 569 | select CLKSRC_MMIO |
58b5369e | 570 | select GENERIC_CLOCKEVENTS |
788c9700 | 571 | help |
a8bc4ead | 572 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
573 | At present, the w90x900 has been renamed nuc900, regarding | |
574 | the ARM series product line, you can login the following | |
575 | link address to know more. | |
576 | ||
577 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
578 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 579 | |
a62e9030 | 580 | config ARCH_NUC93X |
581 | bool "Nuvoton NUC93X CPU" | |
582 | select CPU_ARM926T | |
6d803ba7 | 583 | select CLKDEV_LOOKUP |
a62e9030 | 584 | help |
585 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
586 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
587 | ||
c5f80065 EG |
588 | config ARCH_TEGRA |
589 | bool "NVIDIA Tegra" | |
4073723a | 590 | select CLKDEV_LOOKUP |
234b6ced | 591 | select CLKSRC_MMIO |
c5f80065 EG |
592 | select GENERIC_TIME |
593 | select GENERIC_CLOCKEVENTS | |
594 | select GENERIC_GPIO | |
595 | select HAVE_CLK | |
e3f4c0ab | 596 | select HAVE_SCHED_CLOCK |
c5f80065 | 597 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 598 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
599 | help |
600 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
601 | Tegra 6xx and Tegra 2 series). | |
602 | ||
4af6fee1 DS |
603 | config ARCH_PNX4008 |
604 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 605 | select CPU_ARM926T |
6d803ba7 | 606 | select CLKDEV_LOOKUP |
5cfc8ee0 | 607 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
608 | help |
609 | This enables support for Philips PNX4008 mobile platform. | |
610 | ||
1da177e4 | 611 | config ARCH_PXA |
2c8086a5 | 612 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 613 | depends on MMU |
034d2f5a | 614 | select ARCH_MTD_XIP |
89c52ed4 | 615 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 616 | select CLKDEV_LOOKUP |
234b6ced | 617 | select CLKSRC_MMIO |
7444a72e | 618 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 619 | select GENERIC_CLOCKEVENTS |
7ce83018 | 620 | select HAVE_SCHED_CLOCK |
a88264c2 | 621 | select TICK_ONESHOT |
bd5ce433 | 622 | select PLAT_PXA |
6ac6b817 | 623 | select SPARSE_IRQ |
f999b8bd | 624 | help |
2c8086a5 | 625 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 626 | |
788c9700 RK |
627 | config ARCH_MSM |
628 | bool "Qualcomm MSM" | |
4b536b8d | 629 | select HAVE_CLK |
49cbe786 | 630 | select GENERIC_CLOCKEVENTS |
923a081c | 631 | select ARCH_REQUIRE_GPIOLIB |
bd32344a | 632 | select CLKDEV_LOOKUP |
49cbe786 | 633 | help |
4b53eb4f DW |
634 | Support for Qualcomm MSM/QSD based systems. This runs on the |
635 | apps processor of the MSM/QSD and depends on a shared memory | |
636 | interface to the modem processor which runs the baseband | |
637 | stack and controls some vital subsystems | |
638 | (clock and power control, etc). | |
49cbe786 | 639 | |
c793c1b0 | 640 | config ARCH_SHMOBILE |
6d72ad35 PM |
641 | bool "Renesas SH-Mobile / R-Mobile" |
642 | select HAVE_CLK | |
5e93c6b4 | 643 | select CLKDEV_LOOKUP |
6d72ad35 PM |
644 | select GENERIC_CLOCKEVENTS |
645 | select NO_IOPORT | |
646 | select SPARSE_IRQ | |
60f1435c | 647 | select MULTI_IRQ_HANDLER |
e3e01091 | 648 | select PM_GENERIC_DOMAINS if PM |
c793c1b0 | 649 | help |
6d72ad35 | 650 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 651 | |
1da177e4 LT |
652 | config ARCH_RPC |
653 | bool "RiscPC" | |
654 | select ARCH_ACORN | |
655 | select FIQ | |
656 | select TIMER_ACORN | |
a08b6b79 | 657 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 658 | select HAVE_PATA_PLATFORM |
065909b9 | 659 | select ISA_DMA_API |
5ea81769 | 660 | select NO_IOPORT |
07f841b7 | 661 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 662 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
663 | help |
664 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
665 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
666 | ||
667 | config ARCH_SA1100 | |
668 | bool "SA1100-based" | |
234b6ced | 669 | select CLKSRC_MMIO |
c750815e | 670 | select CPU_SA1100 |
f7e68bbf | 671 | select ISA |
05944d74 | 672 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 673 | select ARCH_MTD_XIP |
89c52ed4 | 674 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 675 | select CPU_FREQ |
3e238be2 | 676 | select GENERIC_CLOCKEVENTS |
9483a578 | 677 | select HAVE_CLK |
5094b92f | 678 | select HAVE_SCHED_CLOCK |
3e238be2 | 679 | select TICK_ONESHOT |
7444a72e | 680 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
681 | help |
682 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
683 | |
684 | config ARCH_S3C2410 | |
63b1f51b | 685 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 686 | select GENERIC_GPIO |
9d56c02a | 687 | select ARCH_HAS_CPUFREQ |
9483a578 | 688 | select HAVE_CLK |
5cfc8ee0 | 689 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 690 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
691 | help |
692 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
693 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 694 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 695 | |
63b1f51b | 696 | Note, the S3C2416 and the S3C2450 are so close that they even share |
25985edc | 697 | the same SoC ID code. This means that there is no separate machine |
63b1f51b BD |
698 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. |
699 | ||
a08ab637 BD |
700 | config ARCH_S3C64XX |
701 | bool "Samsung S3C64XX" | |
89f1fa08 | 702 | select PLAT_SAMSUNG |
89f0ce72 | 703 | select CPU_V6 |
89f0ce72 | 704 | select ARM_VIC |
a08ab637 | 705 | select HAVE_CLK |
89f0ce72 | 706 | select NO_IOPORT |
5cfc8ee0 | 707 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 708 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
709 | select ARCH_REQUIRE_GPIOLIB |
710 | select SAMSUNG_CLKSRC | |
711 | select SAMSUNG_IRQ_VIC_TIMER | |
712 | select SAMSUNG_IRQ_UART | |
713 | select S3C_GPIO_TRACK | |
714 | select S3C_GPIO_PULL_UPDOWN | |
715 | select S3C_GPIO_CFG_S3C24XX | |
716 | select S3C_GPIO_CFG_S3C64XX | |
717 | select S3C_DEV_NAND | |
718 | select USB_ARCH_HAS_OHCI | |
719 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 720 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 721 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
722 | help |
723 | Samsung S3C64XX series based systems | |
724 | ||
49b7a491 KK |
725 | config ARCH_S5P64X0 |
726 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
727 | select CPU_V6 |
728 | select GENERIC_GPIO | |
729 | select HAVE_CLK | |
c39d8d55 | 730 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
9e65bbf2 SK |
731 | select GENERIC_CLOCKEVENTS |
732 | select HAVE_SCHED_CLOCK | |
20676c15 | 733 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 734 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 735 | help |
49b7a491 KK |
736 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
737 | SMDK6450. | |
c4ffccdd | 738 | |
acc84707 MS |
739 | config ARCH_S5PC100 |
740 | bool "Samsung S5PC100" | |
5a7652f2 BM |
741 | select GENERIC_GPIO |
742 | select HAVE_CLK | |
743 | select CPU_V7 | |
d6d502fa | 744 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 745 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 746 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 747 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 748 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 749 | help |
acc84707 | 750 | Samsung S5PC100 series based systems |
5a7652f2 | 751 | |
170f4e42 KK |
752 | config ARCH_S5PV210 |
753 | bool "Samsung S5PV210/S5PC110" | |
754 | select CPU_V7 | |
eecb6a84 | 755 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
756 | select GENERIC_GPIO |
757 | select HAVE_CLK | |
758 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 759 | select ARCH_HAS_CPUFREQ |
9e65bbf2 SK |
760 | select GENERIC_CLOCKEVENTS |
761 | select HAVE_SCHED_CLOCK | |
20676c15 | 762 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 763 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 764 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
765 | help |
766 | Samsung S5PV210/S5PC110 series based systems | |
767 | ||
10606aad KK |
768 | config ARCH_EXYNOS4 |
769 | bool "Samsung EXYNOS4" | |
cc0e72b8 | 770 | select CPU_V7 |
f567fa6f | 771 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
772 | select GENERIC_GPIO |
773 | select HAVE_CLK | |
b333fb16 | 774 | select ARCH_HAS_CPUFREQ |
cc0e72b8 | 775 | select GENERIC_CLOCKEVENTS |
754961a8 | 776 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 777 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 778 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 | 779 | help |
10606aad | 780 | Samsung EXYNOS4 series based systems |
cc0e72b8 | 781 | |
1da177e4 LT |
782 | config ARCH_SHARK |
783 | bool "Shark" | |
c750815e | 784 | select CPU_SA110 |
f7e68bbf RK |
785 | select ISA |
786 | select ISA_DMA | |
3bca103a | 787 | select ZONE_DMA |
f7e68bbf | 788 | select PCI |
5cfc8ee0 | 789 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
790 | help |
791 | Support for the StrongARM based Digital DNARD machine, also known | |
792 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 793 | |
83ef3338 HK |
794 | config ARCH_TCC_926 |
795 | bool "Telechips TCC ARM926-based systems" | |
234b6ced | 796 | select CLKSRC_MMIO |
83ef3338 HK |
797 | select CPU_ARM926T |
798 | select HAVE_CLK | |
6d803ba7 | 799 | select CLKDEV_LOOKUP |
83ef3338 HK |
800 | select GENERIC_CLOCKEVENTS |
801 | help | |
802 | Support for Telechips TCC ARM926-based systems. | |
803 | ||
d98aac75 LW |
804 | config ARCH_U300 |
805 | bool "ST-Ericsson U300 Series" | |
806 | depends on MMU | |
234b6ced | 807 | select CLKSRC_MMIO |
d98aac75 | 808 | select CPU_ARM926T |
5c21b7ca | 809 | select HAVE_SCHED_CLOCK |
bc581770 | 810 | select HAVE_TCM |
d98aac75 LW |
811 | select ARM_AMBA |
812 | select ARM_VIC | |
d98aac75 | 813 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 814 | select CLKDEV_LOOKUP |
d98aac75 LW |
815 | select GENERIC_GPIO |
816 | help | |
817 | Support for ST-Ericsson U300 series mobile platforms. | |
818 | ||
ccf50e23 RK |
819 | config ARCH_U8500 |
820 | bool "ST-Ericsson U8500 Series" | |
821 | select CPU_V7 | |
822 | select ARM_AMBA | |
ccf50e23 | 823 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 824 | select CLKDEV_LOOKUP |
94bdc0e2 | 825 | select ARCH_REQUIRE_GPIOLIB |
7c1a70e9 | 826 | select ARCH_HAS_CPUFREQ |
ccf50e23 RK |
827 | help |
828 | Support for ST-Ericsson's Ux500 architecture | |
829 | ||
830 | config ARCH_NOMADIK | |
831 | bool "STMicroelectronics Nomadik" | |
832 | select ARM_AMBA | |
833 | select ARM_VIC | |
834 | select CPU_ARM926T | |
6d803ba7 | 835 | select CLKDEV_LOOKUP |
ccf50e23 | 836 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
837 | select ARCH_REQUIRE_GPIOLIB |
838 | help | |
839 | Support for the Nomadik platform by ST-Ericsson | |
840 | ||
7c6337e2 KH |
841 | config ARCH_DAVINCI |
842 | bool "TI DaVinci" | |
7c6337e2 | 843 | select GENERIC_CLOCKEVENTS |
dce1115b | 844 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 845 | select ZONE_DMA |
9232fcc9 | 846 | select HAVE_IDE |
6d803ba7 | 847 | select CLKDEV_LOOKUP |
20e9969b | 848 | select GENERIC_ALLOCATOR |
dc7ad3b3 | 849 | select GENERIC_IRQ_CHIP |
ae88e05a | 850 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
851 | help |
852 | Support for TI's DaVinci platform. | |
853 | ||
3b938be6 RK |
854 | config ARCH_OMAP |
855 | bool "TI OMAP" | |
9483a578 | 856 | select HAVE_CLK |
7444a72e | 857 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 858 | select ARCH_HAS_CPUFREQ |
06cad098 | 859 | select GENERIC_CLOCKEVENTS |
dc548fbb | 860 | select HAVE_SCHED_CLOCK |
9af915da | 861 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 862 | help |
6e457bb0 | 863 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 864 | |
cee37e50 | 865 | config PLAT_SPEAR |
866 | bool "ST SPEAr" | |
867 | select ARM_AMBA | |
868 | select ARCH_REQUIRE_GPIOLIB | |
6d803ba7 | 869 | select CLKDEV_LOOKUP |
d6e15d78 | 870 | select CLKSRC_MMIO |
cee37e50 | 871 | select GENERIC_CLOCKEVENTS |
cee37e50 | 872 | select HAVE_CLK |
873 | help | |
874 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
875 | ||
21f47fbc AC |
876 | config ARCH_VT8500 |
877 | bool "VIA/WonderMedia 85xx" | |
878 | select CPU_ARM926T | |
879 | select GENERIC_GPIO | |
880 | select ARCH_HAS_CPUFREQ | |
881 | select GENERIC_CLOCKEVENTS | |
882 | select ARCH_REQUIRE_GPIOLIB | |
883 | select HAVE_PWM | |
884 | help | |
885 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. | |
1da177e4 LT |
886 | endchoice |
887 | ||
ccf50e23 RK |
888 | # |
889 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
890 | # Kconfigs may be included either alphabetically (according to the | |
891 | # plat- suffix) or along side the corresponding mach-* source. | |
892 | # | |
95b8f20f RK |
893 | source "arch/arm/mach-at91/Kconfig" |
894 | ||
895 | source "arch/arm/mach-bcmring/Kconfig" | |
896 | ||
1da177e4 LT |
897 | source "arch/arm/mach-clps711x/Kconfig" |
898 | ||
d94f944e AV |
899 | source "arch/arm/mach-cns3xxx/Kconfig" |
900 | ||
95b8f20f RK |
901 | source "arch/arm/mach-davinci/Kconfig" |
902 | ||
903 | source "arch/arm/mach-dove/Kconfig" | |
904 | ||
e7736d47 LB |
905 | source "arch/arm/mach-ep93xx/Kconfig" |
906 | ||
1da177e4 LT |
907 | source "arch/arm/mach-footbridge/Kconfig" |
908 | ||
59d3a193 PZ |
909 | source "arch/arm/mach-gemini/Kconfig" |
910 | ||
95b8f20f RK |
911 | source "arch/arm/mach-h720x/Kconfig" |
912 | ||
1da177e4 LT |
913 | source "arch/arm/mach-integrator/Kconfig" |
914 | ||
3f7e5815 LB |
915 | source "arch/arm/mach-iop32x/Kconfig" |
916 | ||
917 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 918 | |
285f5fa7 DW |
919 | source "arch/arm/mach-iop13xx/Kconfig" |
920 | ||
1da177e4 LT |
921 | source "arch/arm/mach-ixp4xx/Kconfig" |
922 | ||
923 | source "arch/arm/mach-ixp2000/Kconfig" | |
924 | ||
c4713074 LB |
925 | source "arch/arm/mach-ixp23xx/Kconfig" |
926 | ||
95b8f20f RK |
927 | source "arch/arm/mach-kirkwood/Kconfig" |
928 | ||
929 | source "arch/arm/mach-ks8695/Kconfig" | |
930 | ||
777f9beb LB |
931 | source "arch/arm/mach-loki/Kconfig" |
932 | ||
40805949 KW |
933 | source "arch/arm/mach-lpc32xx/Kconfig" |
934 | ||
95b8f20f RK |
935 | source "arch/arm/mach-msm/Kconfig" |
936 | ||
794d15b2 SS |
937 | source "arch/arm/mach-mv78xx0/Kconfig" |
938 | ||
95b8f20f | 939 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 940 | |
1d3f33d5 SG |
941 | source "arch/arm/mach-mxs/Kconfig" |
942 | ||
95b8f20f | 943 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 944 | |
95b8f20f RK |
945 | source "arch/arm/mach-nomadik/Kconfig" |
946 | source "arch/arm/plat-nomadik/Kconfig" | |
947 | ||
186f93ea | 948 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 949 | |
d48af15e TL |
950 | source "arch/arm/plat-omap/Kconfig" |
951 | ||
952 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 953 | |
1dbae815 TL |
954 | source "arch/arm/mach-omap2/Kconfig" |
955 | ||
9dd0b194 | 956 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 957 | |
95b8f20f RK |
958 | source "arch/arm/mach-pxa/Kconfig" |
959 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 960 | |
95b8f20f RK |
961 | source "arch/arm/mach-mmp/Kconfig" |
962 | ||
963 | source "arch/arm/mach-realview/Kconfig" | |
964 | ||
965 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 966 | |
cf383678 | 967 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 968 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 969 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 970 | |
cee37e50 | 971 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 972 | |
83ef3338 HK |
973 | source "arch/arm/plat-tcc/Kconfig" |
974 | ||
a21765a7 BD |
975 | if ARCH_S3C2410 |
976 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 977 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 978 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 979 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 980 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 981 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 982 | endif |
1da177e4 | 983 | |
a08ab637 | 984 | if ARCH_S3C64XX |
431107ea | 985 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
986 | endif |
987 | ||
49b7a491 | 988 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 989 | |
5a7652f2 | 990 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 991 | |
170f4e42 KK |
992 | source "arch/arm/mach-s5pv210/Kconfig" |
993 | ||
10606aad | 994 | source "arch/arm/mach-exynos4/Kconfig" |
cc0e72b8 | 995 | |
882d01f9 | 996 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 997 | |
c5f80065 EG |
998 | source "arch/arm/mach-tegra/Kconfig" |
999 | ||
95b8f20f | 1000 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1001 | |
95b8f20f | 1002 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1003 | |
1004 | source "arch/arm/mach-versatile/Kconfig" | |
1005 | ||
ceade897 | 1006 | source "arch/arm/mach-vexpress/Kconfig" |
420c34e4 | 1007 | source "arch/arm/plat-versatile/Kconfig" |
ceade897 | 1008 | |
21f47fbc AC |
1009 | source "arch/arm/mach-vt8500/Kconfig" |
1010 | ||
7ec80ddf | 1011 | source "arch/arm/mach-w90x900/Kconfig" |
1012 | ||
1da177e4 LT |
1013 | # Definitions to make life easier |
1014 | config ARCH_ACORN | |
1015 | bool | |
1016 | ||
7ae1f7ec LB |
1017 | config PLAT_IOP |
1018 | bool | |
469d3044 | 1019 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1020 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1021 | |
69b02f6a LB |
1022 | config PLAT_ORION |
1023 | bool | |
bfe45e0b | 1024 | select CLKSRC_MMIO |
dc7ad3b3 | 1025 | select GENERIC_IRQ_CHIP |
f06a1624 | 1026 | select HAVE_SCHED_CLOCK |
69b02f6a | 1027 | |
bd5ce433 EM |
1028 | config PLAT_PXA |
1029 | bool | |
1030 | ||
f4b8b319 RK |
1031 | config PLAT_VERSATILE |
1032 | bool | |
1033 | ||
e3887714 RK |
1034 | config ARM_TIMER_SP804 |
1035 | bool | |
bfe45e0b | 1036 | select CLKSRC_MMIO |
e3887714 | 1037 | |
1da177e4 LT |
1038 | source arch/arm/mm/Kconfig |
1039 | ||
afe4b25e LB |
1040 | config IWMMXT |
1041 | bool "Enable iWMMXt support" | |
ef6c8445 HZ |
1042 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1043 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | |
afe4b25e LB |
1044 | help |
1045 | Enable support for iWMMXt context switching at run time if | |
1046 | running on a CPU that supports it. | |
1047 | ||
1da177e4 LT |
1048 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1049 | config XSCALE_PMU | |
1050 | bool | |
1051 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1052 | default y | |
1053 | ||
0f4f0672 | 1054 | config CPU_HAS_PMU |
e399b1a4 | 1055 | depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ |
8954bb0d | 1056 | (!ARCH_OMAP3 || OMAP3_EMU) |
0f4f0672 JI |
1057 | default y |
1058 | bool | |
1059 | ||
52108641 | 1060 | config MULTI_IRQ_HANDLER |
1061 | bool | |
1062 | help | |
1063 | Allow each machine to specify it's own IRQ handler at run time. | |
1064 | ||
3b93e7b0 HC |
1065 | if !MMU |
1066 | source "arch/arm/Kconfig-nommu" | |
1067 | endif | |
1068 | ||
9cba3ccc CM |
1069 | config ARM_ERRATA_411920 |
1070 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
e399b1a4 | 1071 | depends on CPU_V6 || CPU_V6K |
9cba3ccc CM |
1072 | help |
1073 | Invalidation of the Instruction Cache operation can | |
1074 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1075 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1076 | recommended workaround. | |
1077 | ||
7ce236fc CM |
1078 | config ARM_ERRATA_430973 |
1079 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1080 | depends on CPU_V7 | |
1081 | help | |
1082 | This option enables the workaround for the 430973 Cortex-A8 | |
1083 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1084 | interworking branch is replaced with another code sequence at the | |
1085 | same virtual address, whether due to self-modifying code or virtual | |
1086 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1087 | stale interworking branch prediction. This results in Cortex-A8 | |
1088 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1089 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1090 | and also flushes the branch target cache at every context switch. | |
1091 | Note that setting specific bits in the ACTLR register may not be | |
1092 | available in non-secure mode. | |
1093 | ||
855c551f CM |
1094 | config ARM_ERRATA_458693 |
1095 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1096 | depends on CPU_V7 | |
1097 | help | |
1098 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1099 | erratum. For very specific sequences of memory operations, it is | |
1100 | possible for a hazard condition intended for a cache line to instead | |
1101 | be incorrectly associated with a different cache line. This false | |
1102 | hazard might then cause a processor deadlock. The workaround enables | |
1103 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1104 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1105 | register may not be available in non-secure mode. | |
1106 | ||
0516e464 CM |
1107 | config ARM_ERRATA_460075 |
1108 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1109 | depends on CPU_V7 | |
1110 | help | |
1111 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1112 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1113 | situation in which recent store transactions to the L2 cache are lost | |
1114 | and overwritten with stale memory contents from external memory. The | |
1115 | workaround disables the write-allocate mode for the L2 cache via the | |
1116 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1117 | may not be available in non-secure mode. | |
1118 | ||
9f05027c WD |
1119 | config ARM_ERRATA_742230 |
1120 | bool "ARM errata: DMB operation may be faulty" | |
1121 | depends on CPU_V7 && SMP | |
1122 | help | |
1123 | This option enables the workaround for the 742230 Cortex-A9 | |
1124 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1125 | between two write operations may not ensure the correct visibility | |
1126 | ordering of the two writes. This workaround sets a specific bit in | |
1127 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1128 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1129 | the two writes. | |
1130 | ||
a672e99b WD |
1131 | config ARM_ERRATA_742231 |
1132 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1133 | depends on CPU_V7 && SMP | |
1134 | help | |
1135 | This option enables the workaround for the 742231 Cortex-A9 | |
1136 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1137 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1138 | accessing some data located in the same cache line, may get corrupted | |
1139 | data due to bad handling of the address hazard when the line gets | |
1140 | replaced from one of the CPUs at the same time as another CPU is | |
1141 | accessing it. This workaround sets specific bits in the diagnostic | |
1142 | register of the Cortex-A9 which reduces the linefill issuing | |
1143 | capabilities of the processor. | |
1144 | ||
9e65582a SS |
1145 | config PL310_ERRATA_588369 |
1146 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
2839e06c | 1147 | depends on CACHE_L2X0 |
9e65582a SS |
1148 | help |
1149 | The PL310 L2 cache controller implements three types of Clean & | |
1150 | Invalidate maintenance operations: by Physical Address | |
1151 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1152 | They are architecturally defined to behave as the execution of a | |
1153 | clean operation followed immediately by an invalidate operation, | |
1154 | both performing to the same memory location. This functionality | |
1155 | is not correctly implemented in PL310 as clean lines are not | |
2839e06c | 1156 | invalidated as a result of these operations. |
cdf357f1 WD |
1157 | |
1158 | config ARM_ERRATA_720789 | |
1159 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1160 | depends on CPU_V7 && SMP | |
1161 | help | |
1162 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1163 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1164 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1165 | As a consequence of this erratum, some TLB entries which should be | |
1166 | invalidated are not, resulting in an incoherency in the system page | |
1167 | tables. The workaround changes the TLB flushing routines to invalidate | |
1168 | entries regardless of the ASID. | |
475d92fc | 1169 | |
1f0090a1 RK |
1170 | config PL310_ERRATA_727915 |
1171 | bool "Background Clean & Invalidate by Way operation can cause data corruption" | |
1172 | depends on CACHE_L2X0 | |
1173 | help | |
1174 | PL310 implements the Clean & Invalidate by Way L2 cache maintenance | |
1175 | operation (offset 0x7FC). This operation runs in background so that | |
1176 | PL310 can handle normal accesses while it is in progress. Under very | |
1177 | rare circumstances, due to this erratum, write data can be lost when | |
1178 | PL310 treats a cacheable write transaction during a Clean & | |
1179 | Invalidate by Way operation. | |
1180 | ||
475d92fc WD |
1181 | config ARM_ERRATA_743622 |
1182 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1183 | depends on CPU_V7 | |
1184 | help | |
1185 | This option enables the workaround for the 743622 Cortex-A9 | |
1186 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1187 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1188 | corruption. This workaround sets a specific bit in the diagnostic | |
1189 | register of the Cortex-A9 which disables the Store Buffer | |
1190 | optimisation, preventing the defect from occurring. This has no | |
1191 | visible impact on the overall performance or power consumption of the | |
1192 | processor. | |
1193 | ||
9a27c27c WD |
1194 | config ARM_ERRATA_751472 |
1195 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | |
1196 | depends on CPU_V7 && SMP | |
1197 | help | |
1198 | This option enables the workaround for the 751472 Cortex-A9 (prior | |
1199 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | |
1200 | completion of a following broadcasted operation if the second | |
1201 | operation is received by a CPU before the ICIALLUIS has completed, | |
1202 | potentially leading to corrupted entries in the cache or TLB. | |
1203 | ||
885028e4 SK |
1204 | config ARM_ERRATA_753970 |
1205 | bool "ARM errata: cache sync operation may be faulty" | |
1206 | depends on CACHE_PL310 | |
1207 | help | |
1208 | This option enables the workaround for the 753970 PL310 (r3p0) erratum. | |
1209 | ||
1210 | Under some condition the effect of cache sync operation on | |
1211 | the store buffer still remains when the operation completes. | |
1212 | This means that the store buffer is always asked to drain and | |
1213 | this prevents it from merging any further writes. The workaround | |
1214 | is to replace the normal offset of cache sync operation (0x730) | |
1215 | by another offset targeting an unmapped PL310 register 0x740. | |
1216 | This has the same effect as the cache sync operation: store buffer | |
1217 | drain and waiting for all buffers empty. | |
1218 | ||
fcbdc5fe WD |
1219 | config ARM_ERRATA_754322 |
1220 | bool "ARM errata: possible faulty MMU translations following an ASID switch" | |
1221 | depends on CPU_V7 | |
1222 | help | |
1223 | This option enables the workaround for the 754322 Cortex-A9 (r2p*, | |
1224 | r3p*) erratum. A speculative memory access may cause a page table walk | |
1225 | which starts prior to an ASID switch but completes afterwards. This | |
1226 | can populate the micro-TLB with a stale entry which may be hit with | |
1227 | the new ASID. This workaround places two dsb instructions in the mm | |
1228 | switching code so that no page table walks can cross the ASID switch. | |
1229 | ||
5dab26af WD |
1230 | config ARM_ERRATA_754327 |
1231 | bool "ARM errata: no automatic Store Buffer drain" | |
1232 | depends on CPU_V7 && SMP | |
1233 | help | |
1234 | This option enables the workaround for the 754327 Cortex-A9 (prior to | |
1235 | r2p0) erratum. The Store Buffer does not have any automatic draining | |
1236 | mechanism and therefore a livelock may occur if an external agent | |
1237 | continuously polls a memory location waiting to observe an update. | |
1238 | This workaround defines cpu_relax() as smp_mb(), preventing correctly | |
1239 | written polling loops from denying visibility of updates to memory. | |
1240 | ||
1da177e4 LT |
1241 | endmenu |
1242 | ||
1243 | source "arch/arm/common/Kconfig" | |
1244 | ||
1da177e4 LT |
1245 | menu "Bus support" |
1246 | ||
1247 | config ARM_AMBA | |
1248 | bool | |
1249 | ||
1250 | config ISA | |
1251 | bool | |
1da177e4 LT |
1252 | help |
1253 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1254 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1255 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1256 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1257 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1258 | ||
065909b9 | 1259 | # Select ISA DMA controller support |
1da177e4 LT |
1260 | config ISA_DMA |
1261 | bool | |
065909b9 | 1262 | select ISA_DMA_API |
1da177e4 | 1263 | |
065909b9 | 1264 | # Select ISA DMA interface |
5cae841b AV |
1265 | config ISA_DMA_API |
1266 | bool | |
5cae841b | 1267 | |
1da177e4 | 1268 | config PCI |
0b05da72 | 1269 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1270 | help |
1271 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1272 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1273 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1274 | VESA. If you have PCI, say Y, otherwise N. | |
1275 | ||
52882173 AV |
1276 | config PCI_DOMAINS |
1277 | bool | |
1278 | depends on PCI | |
1279 | ||
b080ac8a MRJ |
1280 | config PCI_NANOENGINE |
1281 | bool "BSE nanoEngine PCI support" | |
1282 | depends on SA1100_NANOENGINE | |
1283 | help | |
1284 | Enable PCI on the BSE nanoEngine board. | |
1285 | ||
36e23590 MW |
1286 | config PCI_SYSCALL |
1287 | def_bool PCI | |
1288 | ||
1da177e4 LT |
1289 | # Select the host bridge type |
1290 | config PCI_HOST_VIA82C505 | |
1291 | bool | |
1292 | depends on PCI && ARCH_SHARK | |
1293 | default y | |
1294 | ||
a0113a99 MR |
1295 | config PCI_HOST_ITE8152 |
1296 | bool | |
1297 | depends on PCI && MACH_ARMCORE | |
1298 | default y | |
1299 | select DMABOUNCE | |
1300 | ||
1da177e4 LT |
1301 | source "drivers/pci/Kconfig" |
1302 | ||
1303 | source "drivers/pcmcia/Kconfig" | |
1304 | ||
1305 | endmenu | |
1306 | ||
1307 | menu "Kernel Features" | |
1308 | ||
0567a0c0 KH |
1309 | source "kernel/time/Kconfig" |
1310 | ||
1da177e4 | 1311 | config SMP |
bb2d8130 | 1312 | bool "Symmetric Multi-Processing" |
fbb4ddac | 1313 | depends on CPU_V6K || CPU_V7 |
bc28248e | 1314 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1315 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf | 1316 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
10606aad | 1317 | ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ |
e9d728f5 | 1318 | ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE |
f6dd9fa5 | 1319 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1320 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1321 | help |
1322 | This enables support for systems with more than one CPU. If you have | |
1323 | a system with only one CPU, like most personal computers, say N. If | |
1324 | you have a system with more than one CPU, say Y. | |
1325 | ||
1326 | If you say N here, the kernel will run on single and multiprocessor | |
1327 | machines, but will use only one CPU of a multiprocessor machine. If | |
1328 | you say Y here, the kernel will run on many, but not all, single | |
1329 | processor machines. On a single processor machine, the kernel will | |
1330 | run faster if you say N here. | |
1331 | ||
03502faa | 1332 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1333 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1334 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1335 | |
1336 | If you don't know what to do here, say N. | |
1337 | ||
f00ec48f RK |
1338 | config SMP_ON_UP |
1339 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1340 | depends on EXPERIMENTAL | |
4d2692a7 | 1341 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1342 | default y |
1343 | help | |
1344 | SMP kernels contain instructions which fail on non-SMP processors. | |
1345 | Enabling this option allows the kernel to modify itself to make | |
1346 | these instructions safe. Disabling it allows about 1K of space | |
1347 | savings. | |
1348 | ||
1349 | If you don't know what to do here, say Y. | |
1350 | ||
a8cbcd92 RK |
1351 | config HAVE_ARM_SCU |
1352 | bool | |
a8cbcd92 RK |
1353 | help |
1354 | This option enables support for the ARM system coherency unit | |
1355 | ||
f32f4ce2 RK |
1356 | config HAVE_ARM_TWD |
1357 | bool | |
1358 | depends on SMP | |
15095bb0 | 1359 | select TICK_ONESHOT |
f32f4ce2 RK |
1360 | help |
1361 | This options enables support for the ARM timer and watchdog unit | |
1362 | ||
8d5796d2 LB |
1363 | choice |
1364 | prompt "Memory split" | |
1365 | default VMSPLIT_3G | |
1366 | help | |
1367 | Select the desired split between kernel and user memory. | |
1368 | ||
1369 | If you are not absolutely sure what you are doing, leave this | |
1370 | option alone! | |
1371 | ||
1372 | config VMSPLIT_3G | |
1373 | bool "3G/1G user/kernel split" | |
1374 | config VMSPLIT_2G | |
1375 | bool "2G/2G user/kernel split" | |
1376 | config VMSPLIT_1G | |
1377 | bool "1G/3G user/kernel split" | |
1378 | endchoice | |
1379 | ||
1380 | config PAGE_OFFSET | |
1381 | hex | |
1382 | default 0x40000000 if VMSPLIT_1G | |
1383 | default 0x80000000 if VMSPLIT_2G | |
1384 | default 0xC0000000 | |
1385 | ||
1da177e4 LT |
1386 | config NR_CPUS |
1387 | int "Maximum number of CPUs (2-32)" | |
1388 | range 2 32 | |
1389 | depends on SMP | |
1390 | default "4" | |
1391 | ||
a054a811 RK |
1392 | config HOTPLUG_CPU |
1393 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1394 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
1395 | help | |
1396 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1397 | can be controlled through /sys/devices/system/cpu. | |
1398 | ||
37ee16ae RK |
1399 | config LOCAL_TIMERS |
1400 | bool "Use local timer interrupts" | |
971acb9b | 1401 | depends on SMP |
37ee16ae | 1402 | default y |
30d8bead | 1403 | select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) |
37ee16ae RK |
1404 | help |
1405 | Enable support for local timers on SMP platforms, rather then the | |
1406 | legacy IPI broadcast method. Local timers allows the system | |
1407 | accounting to be spread across the timer interval, preventing a | |
1408 | "thundering herd" at every timer tick. | |
1409 | ||
d45a398f | 1410 | source kernel/Kconfig.preempt |
1da177e4 | 1411 | |
f8065813 RK |
1412 | config HZ |
1413 | int | |
49b7a491 | 1414 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
a73ddc61 | 1415 | ARCH_S5PV210 || ARCH_EXYNOS4 |
bfe65704 | 1416 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1417 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1418 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1419 | default 100 |
1420 | ||
16c79651 | 1421 | config THUMB2_KERNEL |
4a50bfe3 | 1422 | bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" |
e399b1a4 | 1423 | depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL |
16c79651 CM |
1424 | select AEABI |
1425 | select ARM_ASM_UNIFIED | |
1426 | help | |
1427 | By enabling this option, the kernel will be compiled in | |
1428 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1429 | ARM-Thumb syntax is needed. | |
1430 | ||
1431 | If unsure, say N. | |
1432 | ||
6f685c5c DM |
1433 | config THUMB2_AVOID_R_ARM_THM_JUMP11 |
1434 | bool "Work around buggy Thumb-2 short branch relocations in gas" | |
1435 | depends on THUMB2_KERNEL && MODULES | |
1436 | default y | |
1437 | help | |
1438 | Various binutils versions can resolve Thumb-2 branches to | |
1439 | locally-defined, preemptible global symbols as short-range "b.n" | |
1440 | branch instructions. | |
1441 | ||
1442 | This is a problem, because there's no guarantee the final | |
1443 | destination of the symbol, or any candidate locations for a | |
1444 | trampoline, are within range of the branch. For this reason, the | |
1445 | kernel does not support fixing up the R_ARM_THM_JUMP11 (102) | |
1446 | relocation in modules at all, and it makes little sense to add | |
1447 | support. | |
1448 | ||
1449 | The symptom is that the kernel fails with an "unsupported | |
1450 | relocation" error when loading some modules. | |
1451 | ||
1452 | Until fixed tools are available, passing | |
1453 | -fno-optimize-sibling-calls to gcc should prevent gcc generating | |
1454 | code which hits this problem, at the cost of a bit of extra runtime | |
1455 | stack usage in some cases. | |
1456 | ||
1457 | The problem is described in more detail at: | |
1458 | https://bugs.launchpad.net/binutils-linaro/+bug/725126 | |
1459 | ||
1460 | Only Thumb-2 kernels are affected. | |
1461 | ||
1462 | Unless you are sure your tools don't have this problem, say Y. | |
1463 | ||
0becb088 CM |
1464 | config ARM_ASM_UNIFIED |
1465 | bool | |
1466 | ||
704bdda0 NP |
1467 | config AEABI |
1468 | bool "Use the ARM EABI to compile the kernel" | |
1469 | help | |
1470 | This option allows for the kernel to be compiled using the latest | |
1471 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1472 | space environment that is also compiled with EABI. | |
1473 | ||
1474 | Since there are major incompatibilities between the legacy ABI and | |
1475 | EABI, especially with regard to structure member alignment, this | |
1476 | option also changes the kernel syscall calling convention to | |
1477 | disambiguate both ABIs and allow for backward compatibility support | |
1478 | (selected with CONFIG_OABI_COMPAT). | |
1479 | ||
1480 | To use this you need GCC version 4.0.0 or later. | |
1481 | ||
6c90c872 | 1482 | config OABI_COMPAT |
a73a3ff1 | 1483 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
9bc433a1 | 1484 | depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL |
6c90c872 NP |
1485 | default y |
1486 | help | |
1487 | This option preserves the old syscall interface along with the | |
1488 | new (ARM EABI) one. It also provides a compatibility layer to | |
1489 | intercept syscalls that have structure arguments which layout | |
1490 | in memory differs between the legacy ABI and the new ARM EABI | |
1491 | (only for non "thumb" binaries). This option adds a tiny | |
1492 | overhead to all syscalls and produces a slightly larger kernel. | |
1493 | If you know you'll be using only pure EABI user space then you | |
1494 | can say N here. If this option is not selected and you attempt | |
1495 | to execute a legacy ABI binary then the result will be | |
1496 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1497 | at all). If in doubt say Y. | |
1498 | ||
eb33575c | 1499 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1500 | bool |
e80d6a24 | 1501 | |
05944d74 RK |
1502 | config ARCH_SPARSEMEM_ENABLE |
1503 | bool | |
1504 | ||
07a2f737 RK |
1505 | config ARCH_SPARSEMEM_DEFAULT |
1506 | def_bool ARCH_SPARSEMEM_ENABLE | |
1507 | ||
05944d74 | 1508 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1509 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1510 | |
7b7bf499 WD |
1511 | config HAVE_ARCH_PFN_VALID |
1512 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM | |
1513 | ||
053a96ca | 1514 | config HIGHMEM |
e8db89a2 RK |
1515 | bool "High Memory Support" |
1516 | depends on MMU | |
053a96ca NP |
1517 | help |
1518 | The address space of ARM processors is only 4 Gigabytes large | |
1519 | and it has to accommodate user address space, kernel address | |
1520 | space as well as some memory mapped IO. That means that, if you | |
1521 | have a large amount of physical memory and/or IO, not all of the | |
1522 | memory can be "permanently mapped" by the kernel. The physical | |
1523 | memory that is not permanently mapped is called "high memory". | |
1524 | ||
1525 | Depending on the selected kernel/user memory split, minimum | |
1526 | vmalloc space and actual amount of RAM, you may not need this | |
1527 | option which should result in a slightly faster kernel. | |
1528 | ||
1529 | If unsure, say n. | |
1530 | ||
65cec8e3 RK |
1531 | config HIGHPTE |
1532 | bool "Allocate 2nd-level pagetables from highmem" | |
1533 | depends on HIGHMEM | |
65cec8e3 | 1534 | |
1b8873a0 JI |
1535 | config HW_PERF_EVENTS |
1536 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1537 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1538 | default y |
1539 | help | |
1540 | Enable hardware performance counter support for perf events. If | |
1541 | disabled, perf events will use software events only. | |
1542 | ||
3f22ab27 DH |
1543 | source "mm/Kconfig" |
1544 | ||
c1b2d970 MD |
1545 | config FORCE_MAX_ZONEORDER |
1546 | int "Maximum zone order" if ARCH_SHMOBILE | |
1547 | range 11 64 if ARCH_SHMOBILE | |
1548 | default "9" if SA1111 | |
1549 | default "11" | |
1550 | help | |
1551 | The kernel memory allocator divides physically contiguous memory | |
1552 | blocks into "zones", where each zone is a power of two number of | |
1553 | pages. This option selects the largest power of two that the kernel | |
1554 | keeps in the memory allocator. If you need to allocate very large | |
1555 | blocks of physically contiguous memory, then you may need to | |
1556 | increase this value. | |
1557 | ||
1558 | This config option is actually maximum order plus one. For example, | |
1559 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1560 | ||
1da177e4 LT |
1561 | config LEDS |
1562 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1563 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1564 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1565 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1566 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1567 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1568 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1569 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1570 | help |
1571 | If you say Y here, the LEDs on your machine will be used | |
1572 | to provide useful information about your current system status. | |
1573 | ||
1574 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1575 | be able to select which LEDs are active using the options below. If | |
1576 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1577 | red LED will simply flash regularly to indicate that the system is | |
1578 | still functional. It is safe to say Y here if you have a CATS | |
1579 | system, but the driver will do nothing. | |
1580 | ||
1581 | config LEDS_TIMER | |
1582 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1583 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1584 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1585 | depends on LEDS |
0567a0c0 | 1586 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1587 | default y if ARCH_EBSA110 |
1588 | help | |
1589 | If you say Y here, one of the system LEDs (the green one on the | |
1590 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1591 | will flash regularly to indicate that the system is still | |
1592 | operational. This is mainly useful to kernel hackers who are | |
1593 | debugging unstable kernels. | |
1594 | ||
1595 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1596 | functions. You may choose to use both, but the Timer LED function | |
1597 | will overrule the CPU usage LED. | |
1598 | ||
1599 | config LEDS_CPU | |
1600 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1601 | !ARCH_OMAP) \ |
1602 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1603 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1604 | depends on LEDS |
1605 | help | |
1606 | If you say Y here, the red LED will be used to give a good real | |
1607 | time indication of CPU usage, by lighting whenever the idle task | |
1608 | is not currently executing. | |
1609 | ||
1610 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1611 | functions. You may choose to use both, but the Timer LED function | |
1612 | will overrule the CPU usage LED. | |
1613 | ||
1614 | config ALIGNMENT_TRAP | |
1615 | bool | |
f12d0d7c | 1616 | depends on CPU_CP15_MMU |
1da177e4 | 1617 | default y if !ARCH_EBSA110 |
e119bfff | 1618 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1619 | help |
84eb8d06 | 1620 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1621 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1622 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1623 | fetch/store instructions will be emulated in software if you say | |
1624 | here, which has a severe performance impact. This is necessary for | |
1625 | correct operation of some network protocols. With an IP-only | |
1626 | configuration it is safe to say N, otherwise say Y. | |
1627 | ||
39ec58f3 LB |
1628 | config UACCESS_WITH_MEMCPY |
1629 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1630 | depends on MMU && EXPERIMENTAL | |
1631 | default y if CPU_FEROCEON | |
1632 | help | |
1633 | Implement faster copy_to_user and clear_user methods for CPU | |
1634 | cores where a 8-word STM instruction give significantly higher | |
1635 | memory write throughput than a sequence of individual 32bit stores. | |
1636 | ||
1637 | A possible side effect is a slight increase in scheduling latency | |
1638 | between threads sharing the same address space if they invoke | |
1639 | such copy operations with large buffers. | |
1640 | ||
1641 | However, if the CPU data cache is using a write-allocate mode, | |
1642 | this option is unlikely to provide any performance gain. | |
1643 | ||
70c70d97 NP |
1644 | config SECCOMP |
1645 | bool | |
1646 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1647 | ---help--- | |
1648 | This kernel feature is useful for number crunching applications | |
1649 | that may need to compute untrusted bytecode during their | |
1650 | execution. By using pipes or other transports made available to | |
1651 | the process as file descriptors supporting the read/write | |
1652 | syscalls, it's possible to isolate those applications in | |
1653 | their own address space using seccomp. Once seccomp is | |
1654 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1655 | and the task is only allowed to execute a few safe syscalls | |
1656 | defined by each seccomp mode. | |
1657 | ||
c743f380 NP |
1658 | config CC_STACKPROTECTOR |
1659 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1660 | depends on EXPERIMENTAL |
c743f380 NP |
1661 | help |
1662 | This option turns on the -fstack-protector GCC feature. This | |
1663 | feature puts, at the beginning of functions, a canary value on | |
1664 | the stack just before the return address, and validates | |
1665 | the value just before actually returning. Stack based buffer | |
1666 | overflows (that need to overwrite this return address) now also | |
1667 | overwrite the canary, which gets detected and the attack is then | |
1668 | neutralized via a kernel panic. | |
1669 | This feature requires gcc version 4.2 or above. | |
1670 | ||
73a65b3f UKK |
1671 | config DEPRECATED_PARAM_STRUCT |
1672 | bool "Provide old way to pass kernel parameters" | |
1673 | help | |
1674 | This was deprecated in 2001 and announced to live on for 5 years. | |
1675 | Some old boot loaders still use this way. | |
1676 | ||
1da177e4 LT |
1677 | endmenu |
1678 | ||
1679 | menu "Boot options" | |
1680 | ||
9eb8f674 GL |
1681 | config USE_OF |
1682 | bool "Flattened Device Tree support" | |
1683 | select OF | |
1684 | select OF_EARLY_FLATTREE | |
1685 | help | |
1686 | Include support for flattened device tree machine descriptions. | |
1687 | ||
1da177e4 LT |
1688 | # Compressed boot loader in ROM. Yes, we really want to ask about |
1689 | # TEXT and BSS so we preserve their values in the config files. | |
1690 | config ZBOOT_ROM_TEXT | |
1691 | hex "Compressed ROM boot loader base address" | |
1692 | default "0" | |
1693 | help | |
1694 | The physical address at which the ROM-able zImage is to be | |
1695 | placed in the target. Platforms which normally make use of | |
1696 | ROM-able zImage formats normally set this to a suitable | |
1697 | value in their defconfig file. | |
1698 | ||
1699 | If ZBOOT_ROM is not enabled, this has no effect. | |
1700 | ||
1701 | config ZBOOT_ROM_BSS | |
1702 | hex "Compressed ROM boot loader BSS address" | |
1703 | default "0" | |
1704 | help | |
f8c440b2 DF |
1705 | The base address of an area of read/write memory in the target |
1706 | for the ROM-able zImage which must be available while the | |
1707 | decompressor is running. It must be large enough to hold the | |
1708 | entire decompressed kernel plus an additional 128 KiB. | |
1709 | Platforms which normally make use of ROM-able zImage formats | |
1710 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1711 | |
1712 | If ZBOOT_ROM is not enabled, this has no effect. | |
1713 | ||
1714 | config ZBOOT_ROM | |
1715 | bool "Compressed boot loader in ROM/flash" | |
1716 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1717 | help | |
1718 | Say Y here if you intend to execute your compressed kernel image | |
1719 | (zImage) directly from ROM or flash. If unsure, say N. | |
1720 | ||
090ab3ff SH |
1721 | choice |
1722 | prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" | |
1723 | depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL | |
1724 | default ZBOOT_ROM_NONE | |
1725 | help | |
1726 | Include experimental SD/MMC loading code in the ROM-able zImage. | |
1727 | With this enabled it is possible to write the the ROM-able zImage | |
1728 | kernel image to an MMC or SD card and boot the kernel straight | |
1729 | from the reset vector. At reset the processor Mask ROM will load | |
1730 | the first part of the the ROM-able zImage which in turn loads the | |
1731 | rest the kernel image to RAM. | |
1732 | ||
1733 | config ZBOOT_ROM_NONE | |
1734 | bool "No SD/MMC loader in zImage (EXPERIMENTAL)" | |
1735 | help | |
1736 | Do not load image from SD or MMC | |
1737 | ||
f45b1149 SH |
1738 | config ZBOOT_ROM_MMCIF |
1739 | bool "Include MMCIF loader in zImage (EXPERIMENTAL)" | |
f45b1149 | 1740 | help |
090ab3ff SH |
1741 | Load image from MMCIF hardware block. |
1742 | ||
1743 | config ZBOOT_ROM_SH_MOBILE_SDHI | |
1744 | bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" | |
1745 | help | |
1746 | Load image from SDHI hardware block | |
1747 | ||
1748 | endchoice | |
f45b1149 | 1749 | |
1da177e4 LT |
1750 | config CMDLINE |
1751 | string "Default kernel command string" | |
1752 | default "" | |
1753 | help | |
1754 | On some architectures (EBSA110 and CATS), there is currently no way | |
1755 | for the boot loader to pass arguments to the kernel. For these | |
1756 | architectures, you should supply some command-line options at build | |
1757 | time by entering them here. As a minimum, you should specify the | |
1758 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1759 | ||
4394c124 VB |
1760 | choice |
1761 | prompt "Kernel command line type" if CMDLINE != "" | |
1762 | default CMDLINE_FROM_BOOTLOADER | |
1763 | ||
1764 | config CMDLINE_FROM_BOOTLOADER | |
1765 | bool "Use bootloader kernel arguments if available" | |
1766 | help | |
1767 | Uses the command-line options passed by the boot loader. If | |
1768 | the boot loader doesn't provide any, the default kernel command | |
1769 | string provided in CMDLINE will be used. | |
1770 | ||
1771 | config CMDLINE_EXTEND | |
1772 | bool "Extend bootloader kernel arguments" | |
1773 | help | |
1774 | The command-line arguments provided by the boot loader will be | |
1775 | appended to the default kernel command string. | |
1776 | ||
92d2040d AH |
1777 | config CMDLINE_FORCE |
1778 | bool "Always use the default kernel command string" | |
92d2040d AH |
1779 | help |
1780 | Always use the default kernel command string, even if the boot | |
1781 | loader passes other arguments to the kernel. | |
1782 | This is useful if you cannot or don't want to change the | |
1783 | command-line options your boot loader passes to the kernel. | |
4394c124 | 1784 | endchoice |
92d2040d | 1785 | |
1da177e4 LT |
1786 | config XIP_KERNEL |
1787 | bool "Kernel Execute-In-Place from ROM" | |
1788 | depends on !ZBOOT_ROM | |
1789 | help | |
1790 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1791 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1792 | space since the text section of the kernel is not loaded from flash | |
1793 | to RAM. Read-write sections, such as the data section and stack, | |
1794 | are still copied to RAM. The XIP kernel is not compressed since | |
1795 | it has to run directly from flash, so it will take more space to | |
1796 | store it. The flash address used to link the kernel object files, | |
1797 | and for storing it, is configuration dependent. Therefore, if you | |
1798 | say Y here, you must know the proper physical address where to | |
1799 | store the kernel image depending on your own flash memory usage. | |
1800 | ||
1801 | Also note that the make target becomes "make xipImage" rather than | |
1802 | "make zImage" or "make Image". The final kernel binary to put in | |
1803 | ROM memory will be arch/arm/boot/xipImage. | |
1804 | ||
1805 | If unsure, say N. | |
1806 | ||
1807 | config XIP_PHYS_ADDR | |
1808 | hex "XIP Kernel Physical Location" | |
1809 | depends on XIP_KERNEL | |
1810 | default "0x00080000" | |
1811 | help | |
1812 | This is the physical address in your flash memory the kernel will | |
1813 | be linked for and stored to. This address is dependent on your | |
1814 | own flash usage. | |
1815 | ||
c587e4a6 RP |
1816 | config KEXEC |
1817 | bool "Kexec system call (EXPERIMENTAL)" | |
1818 | depends on EXPERIMENTAL | |
1819 | help | |
1820 | kexec is a system call that implements the ability to shutdown your | |
1821 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1822 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1823 | you can start any kernel with it, not just Linux. |
1824 | ||
1825 | It is an ongoing process to be certain the hardware in a machine | |
1826 | is properly shutdown, so do not be surprised if this code does not | |
1827 | initially work for you. It may help to enable device hotplugging | |
1828 | support. | |
1829 | ||
4cd9d6f7 RP |
1830 | config ATAGS_PROC |
1831 | bool "Export atags in procfs" | |
b98d7291 UL |
1832 | depends on KEXEC |
1833 | default y | |
4cd9d6f7 RP |
1834 | help |
1835 | Should the atags used to boot the kernel be exported in an "atags" | |
1836 | file in procfs. Useful with kexec. | |
1837 | ||
cb5d39b3 MW |
1838 | config CRASH_DUMP |
1839 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
1840 | depends on EXPERIMENTAL | |
1841 | help | |
1842 | Generate crash dump after being started by kexec. This should | |
1843 | be normally only set in special crash dump kernels which are | |
1844 | loaded in the main kernel with kexec-tools into a specially | |
1845 | reserved region and then later executed after a crash by | |
1846 | kdump/kexec. The crash dump kernel must be compiled to a | |
1847 | memory address not used by the main kernel | |
1848 | ||
1849 | For more details see Documentation/kdump/kdump.txt | |
1850 | ||
e69edc79 EM |
1851 | config AUTO_ZRELADDR |
1852 | bool "Auto calculation of the decompressed kernel image address" | |
1853 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1854 | help | |
1855 | ZRELADDR is the physical address where the decompressed kernel | |
1856 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1857 | will be determined at run-time by masking the current IP with | |
1858 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1859 | from start of memory. | |
1860 | ||
1da177e4 LT |
1861 | endmenu |
1862 | ||
ac9d7efc | 1863 | menu "CPU Power Management" |
1da177e4 | 1864 | |
89c52ed4 | 1865 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1866 | |
1867 | source "drivers/cpufreq/Kconfig" | |
1868 | ||
64f102b6 YS |
1869 | config CPU_FREQ_IMX |
1870 | tristate "CPUfreq driver for i.MX CPUs" | |
1871 | depends on ARCH_MXC && CPU_FREQ | |
1872 | help | |
1873 | This enables the CPUfreq driver for i.MX CPUs. | |
1874 | ||
1da177e4 LT |
1875 | config CPU_FREQ_SA1100 |
1876 | bool | |
1da177e4 LT |
1877 | |
1878 | config CPU_FREQ_SA1110 | |
1879 | bool | |
1da177e4 LT |
1880 | |
1881 | config CPU_FREQ_INTEGRATOR | |
1882 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1883 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1884 | default y | |
1885 | help | |
1886 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1887 | ||
1888 | For details, take a look at <file:Documentation/cpu-freq>. | |
1889 | ||
1890 | If in doubt, say Y. | |
1891 | ||
9e2697ff RK |
1892 | config CPU_FREQ_PXA |
1893 | bool | |
1894 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1895 | default y | |
1896 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1897 | ||
b3748ddd MB |
1898 | config CPU_FREQ_S3C64XX |
1899 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1900 | depends on CPU_FREQ && CPU_S3C6410 | |
1901 | ||
9d56c02a BD |
1902 | config CPU_FREQ_S3C |
1903 | bool | |
1904 | help | |
1905 | Internal configuration node for common cpufreq on Samsung SoC | |
1906 | ||
1907 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 1908 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
9d56c02a BD |
1909 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL |
1910 | select CPU_FREQ_S3C | |
1911 | help | |
1912 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1913 | of CPUs. | |
1914 | ||
1915 | For details, take a look at <file:Documentation/cpu-freq>. | |
1916 | ||
1917 | If in doubt, say N. | |
1918 | ||
1919 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 1920 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
1921 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
1922 | help | |
1923 | Compile in support for changing the PLL frequency from the | |
1924 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1925 | after a frequency change, so by default it is not enabled. | |
1926 | ||
1927 | This also means that the PLL tables for the selected CPU(s) will | |
1928 | be built which may increase the size of the kernel image. | |
1929 | ||
1930 | config CPU_FREQ_S3C24XX_DEBUG | |
1931 | bool "Debug CPUfreq Samsung driver core" | |
1932 | depends on CPU_FREQ_S3C24XX | |
1933 | help | |
1934 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1935 | ||
1936 | config CPU_FREQ_S3C24XX_IODEBUG | |
1937 | bool "Debug CPUfreq Samsung driver IO timing" | |
1938 | depends on CPU_FREQ_S3C24XX | |
1939 | help | |
1940 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1941 | ||
e6d197a6 BD |
1942 | config CPU_FREQ_S3C24XX_DEBUGFS |
1943 | bool "Export debugfs for CPUFreq" | |
1944 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1945 | help | |
1946 | Export status information via debugfs. | |
1947 | ||
1da177e4 LT |
1948 | endif |
1949 | ||
ac9d7efc RK |
1950 | source "drivers/cpuidle/Kconfig" |
1951 | ||
1952 | endmenu | |
1953 | ||
1da177e4 LT |
1954 | menu "Floating point emulation" |
1955 | ||
1956 | comment "At least one emulation must be selected" | |
1957 | ||
1958 | config FPE_NWFPE | |
1959 | bool "NWFPE math emulation" | |
593c252a | 1960 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
1961 | ---help--- |
1962 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1963 | This is necessary to run most binaries. Linux does not currently | |
1964 | support floating point hardware so you need to say Y here even if | |
1965 | your machine has an FPA or floating point co-processor podule. | |
1966 | ||
1967 | You may say N here if you are going to load the Acorn FPEmulator | |
1968 | early in the bootup. | |
1969 | ||
1970 | config FPE_NWFPE_XP | |
1971 | bool "Support extended precision" | |
bedf142b | 1972 | depends on FPE_NWFPE |
1da177e4 LT |
1973 | help |
1974 | Say Y to include 80-bit support in the kernel floating-point | |
1975 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1976 | Note that gcc does not generate 80-bit operations by default, | |
1977 | so in most cases this option only enlarges the size of the | |
1978 | floating point emulator without any good reason. | |
1979 | ||
1980 | You almost surely want to say N here. | |
1981 | ||
1982 | config FPE_FASTFPE | |
1983 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1984 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1985 | ---help--- |
1986 | Say Y here to include the FAST floating point emulator in the kernel. | |
1987 | This is an experimental much faster emulator which now also has full | |
1988 | precision for the mantissa. It does not support any exceptions. | |
1989 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1990 | ||
1991 | It should be sufficient for most programs. It may be not suitable | |
1992 | for scientific calculations, but you have to check this for yourself. | |
1993 | If you do not feel you need a faster FP emulation you should better | |
1994 | choose NWFPE. | |
1995 | ||
1996 | config VFP | |
1997 | bool "VFP-format floating point maths" | |
e399b1a4 | 1998 | depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1999 | help |
2000 | Say Y to include VFP support code in the kernel. This is needed | |
2001 | if your hardware includes a VFP unit. | |
2002 | ||
2003 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
2004 | release notes and additional status information. | |
2005 | ||
2006 | Say N if your target does not have VFP hardware. | |
2007 | ||
25ebee02 CM |
2008 | config VFPv3 |
2009 | bool | |
2010 | depends on VFP | |
2011 | default y if CPU_V7 | |
2012 | ||
b5872db4 CM |
2013 | config NEON |
2014 | bool "Advanced SIMD (NEON) Extension support" | |
2015 | depends on VFPv3 && CPU_V7 | |
2016 | help | |
2017 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
2018 | Extension. | |
2019 | ||
1da177e4 LT |
2020 | endmenu |
2021 | ||
2022 | menu "Userspace binary formats" | |
2023 | ||
2024 | source "fs/Kconfig.binfmt" | |
2025 | ||
2026 | config ARTHUR | |
2027 | tristate "RISC OS personality" | |
704bdda0 | 2028 | depends on !AEABI |
1da177e4 LT |
2029 | help |
2030 | Say Y here to include the kernel code necessary if you want to run | |
2031 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
2032 | experimental; if this sounds frightening, say N and sleep in peace. | |
2033 | You can also say M here to compile this support as a module (which | |
2034 | will be called arthur). | |
2035 | ||
2036 | endmenu | |
2037 | ||
2038 | menu "Power management options" | |
2039 | ||
eceab4ac | 2040 | source "kernel/power/Kconfig" |
1da177e4 | 2041 | |
f4cb5700 | 2042 | config ARCH_SUSPEND_POSSIBLE |
586893eb | 2043 | depends on !ARCH_S5P64X0 && !ARCH_S5PC100 |
6a786182 RK |
2044 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
2045 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE | |
f4cb5700 JB |
2046 | def_bool y |
2047 | ||
1da177e4 LT |
2048 | endmenu |
2049 | ||
d5950b43 SR |
2050 | source "net/Kconfig" |
2051 | ||
ac25150f | 2052 | source "drivers/Kconfig" |
1da177e4 LT |
2053 | |
2054 | source "fs/Kconfig" | |
2055 | ||
1da177e4 LT |
2056 | source "arch/arm/Kconfig.debug" |
2057 | ||
2058 | source "security/Kconfig" | |
2059 | ||
2060 | source "crypto/Kconfig" | |
2061 | ||
2062 | source "lib/Kconfig" |