Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
24056f52 | 5 | select HAVE_DMA_API_DEBUG |
d0ee9f40 | 6 | select HAVE_IDE if PCI || ISA || PCMCIA |
2778f620 | 7 | select HAVE_MEMBLOCK |
12b824fb | 8 | select RTC_LIB |
75e7153a | 9 | select SYS_SUPPORTS_APM_EMULATION |
a41297a0 | 10 | select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) |
fe166148 | 11 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 12 | select HAVE_ARCH_KGDB |
856bc356 | 13 | select HAVE_KPROBES if !XIP_KERNEL |
9edddaa2 | 14 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 15 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
e39f5602 | 19 | select ARCH_BINFMT_ELF_RANDOMIZE_PIE |
1fe53268 | 20 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
21 | select HAVE_KERNEL_GZIP |
22 | select HAVE_KERNEL_LZO | |
6e8699f7 | 23 | select HAVE_KERNEL_LZMA |
e360adbe | 24 | select HAVE_IRQ_WORK |
7ada189f JI |
25 | select HAVE_PERF_EVENTS |
26 | select PERF_USE_VMALLOC | |
e513f8bf | 27 | select HAVE_REGS_AND_STACK_ACCESS_API |
e399b1a4 | 28 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) |
ed60453f | 29 | select HAVE_C_RECORDMCOUNT |
e2a93ecc LB |
30 | select HAVE_GENERIC_HARDIRQS |
31 | select HAVE_SPARSE_IRQ | |
25a5662a | 32 | select GENERIC_IRQ_SHOW |
1fb90263 | 33 | select CPU_PM if (SUSPEND || CPU_IDLE) |
e5bfb72c | 34 | select GENERIC_PCI_IOMAP |
1da177e4 LT |
35 | help |
36 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 37 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 38 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 39 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
40 | Europe. There is an ARM Linux project with a web page at |
41 | <http://www.arm.linux.org.uk/>. | |
42 | ||
74facffe RK |
43 | config ARM_HAS_SG_CHAIN |
44 | bool | |
45 | ||
1a189b97 RK |
46 | config HAVE_PWM |
47 | bool | |
48 | ||
0b05da72 HUK |
49 | config MIGHT_HAVE_PCI |
50 | bool | |
51 | ||
75e7153a RB |
52 | config SYS_SUPPORTS_APM_EMULATION |
53 | bool | |
54 | ||
112f38a4 RK |
55 | config HAVE_SCHED_CLOCK |
56 | bool | |
57 | ||
0a938b97 DB |
58 | config GENERIC_GPIO |
59 | bool | |
0a938b97 | 60 | |
5cfc8ee0 JS |
61 | config ARCH_USES_GETTIMEOFFSET |
62 | bool | |
63 | default n | |
746140c7 | 64 | |
0567a0c0 KH |
65 | config GENERIC_CLOCKEVENTS |
66 | bool | |
0567a0c0 | 67 | |
a8655e83 CM |
68 | config GENERIC_CLOCKEVENTS_BROADCAST |
69 | bool | |
70 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 71 | default y if SMP |
a8655e83 | 72 | |
bf9dd360 RH |
73 | config KTIME_SCALAR |
74 | bool | |
75 | default y | |
76 | ||
bc581770 LW |
77 | config HAVE_TCM |
78 | bool | |
79 | select GENERIC_ALLOCATOR | |
80 | ||
e119bfff RK |
81 | config HAVE_PROC_CPU |
82 | bool | |
83 | ||
5ea81769 AV |
84 | config NO_IOPORT |
85 | bool | |
5ea81769 | 86 | |
1da177e4 LT |
87 | config EISA |
88 | bool | |
89 | ---help--- | |
90 | The Extended Industry Standard Architecture (EISA) bus was | |
91 | developed as an open alternative to the IBM MicroChannel bus. | |
92 | ||
93 | The EISA bus provided some of the features of the IBM MicroChannel | |
94 | bus while maintaining backward compatibility with cards made for | |
95 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
96 | 1995 when it was made obsolete by the PCI bus. | |
97 | ||
98 | Say Y here if you are building a kernel for an EISA-based machine. | |
99 | ||
100 | Otherwise, say N. | |
101 | ||
102 | config SBUS | |
103 | bool | |
104 | ||
105 | config MCA | |
106 | bool | |
107 | help | |
108 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
109 | laptops. It is a bus system similar to PCI or ISA. See | |
110 | <file:Documentation/mca.txt> (and especially the web page given | |
111 | there) before attempting to build an MCA bus kernel. | |
112 | ||
f16fb1ec RK |
113 | config STACKTRACE_SUPPORT |
114 | bool | |
115 | default y | |
116 | ||
f76e9154 NP |
117 | config HAVE_LATENCYTOP_SUPPORT |
118 | bool | |
119 | depends on !SMP | |
120 | default y | |
121 | ||
f16fb1ec RK |
122 | config LOCKDEP_SUPPORT |
123 | bool | |
124 | default y | |
125 | ||
7ad1bcb2 RK |
126 | config TRACE_IRQFLAGS_SUPPORT |
127 | bool | |
128 | default y | |
129 | ||
4a2581a0 TG |
130 | config HARDIRQS_SW_RESEND |
131 | bool | |
132 | default y | |
133 | ||
134 | config GENERIC_IRQ_PROBE | |
135 | bool | |
136 | default y | |
137 | ||
95c354fe NP |
138 | config GENERIC_LOCKBREAK |
139 | bool | |
140 | default y | |
141 | depends on SMP && PREEMPT | |
142 | ||
1da177e4 LT |
143 | config RWSEM_GENERIC_SPINLOCK |
144 | bool | |
145 | default y | |
146 | ||
147 | config RWSEM_XCHGADD_ALGORITHM | |
148 | bool | |
149 | ||
f0d1b0b3 DH |
150 | config ARCH_HAS_ILOG2_U32 |
151 | bool | |
f0d1b0b3 DH |
152 | |
153 | config ARCH_HAS_ILOG2_U64 | |
154 | bool | |
f0d1b0b3 | 155 | |
89c52ed4 BD |
156 | config ARCH_HAS_CPUFREQ |
157 | bool | |
158 | help | |
159 | Internal node to signify that the ARCH has CPUFREQ support | |
160 | and that the relevant menu configurations are displayed for | |
161 | it. | |
162 | ||
c7b0aff4 KH |
163 | config ARCH_HAS_CPU_IDLE_WAIT |
164 | def_bool y | |
165 | ||
b89c3b16 AM |
166 | config GENERIC_HWEIGHT |
167 | bool | |
168 | default y | |
169 | ||
1da177e4 LT |
170 | config GENERIC_CALIBRATE_DELAY |
171 | bool | |
172 | default y | |
173 | ||
a08b6b79 Z |
174 | config ARCH_MAY_HAVE_PC_FDC |
175 | bool | |
176 | ||
5ac6da66 CL |
177 | config ZONE_DMA |
178 | bool | |
5ac6da66 | 179 | |
ccd7ab7f FT |
180 | config NEED_DMA_MAP_STATE |
181 | def_bool y | |
182 | ||
1da177e4 LT |
183 | config GENERIC_ISA_DMA |
184 | bool | |
185 | ||
1da177e4 LT |
186 | config FIQ |
187 | bool | |
188 | ||
13a5045d RH |
189 | config NEED_RET_TO_USER |
190 | bool | |
191 | ||
034d2f5a AV |
192 | config ARCH_MTD_XIP |
193 | bool | |
194 | ||
c760fc19 HC |
195 | config VECTORS_BASE |
196 | hex | |
6afd6fae | 197 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
198 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
199 | default 0x00000000 | |
200 | help | |
201 | The base address of exception vectors. | |
202 | ||
dc21af99 | 203 | config ARM_PATCH_PHYS_VIRT |
c1becedc RK |
204 | bool "Patch physical to virtual translations at runtime" if EMBEDDED |
205 | default y | |
b511d75d | 206 | depends on !XIP_KERNEL && MMU |
dc21af99 RK |
207 | depends on !ARCH_REALVIEW || !SPARSEMEM |
208 | help | |
111e9a5c RK |
209 | Patch phys-to-virt and virt-to-phys translation functions at |
210 | boot and module load time according to the position of the | |
211 | kernel in system memory. | |
dc21af99 | 212 | |
111e9a5c | 213 | This can only be used with non-XIP MMU kernels where the base |
daece596 | 214 | of physical memory is at a 16MB boundary. |
dc21af99 | 215 | |
c1becedc RK |
216 | Only disable this option if you know that you do not require |
217 | this feature (eg, building a kernel for a single machine) and | |
218 | you need to shrink the kernel to the minimal size. | |
dc21af99 | 219 | |
c334bc15 RH |
220 | config NEED_MACH_IO_H |
221 | bool | |
222 | help | |
223 | Select this when mach/io.h is required to provide special | |
224 | definitions for this platform. The need for mach/io.h should | |
225 | be avoided when possible. | |
226 | ||
0cdc8b92 | 227 | config NEED_MACH_MEMORY_H |
1b9f95f8 NP |
228 | bool |
229 | help | |
0cdc8b92 NP |
230 | Select this when mach/memory.h is required to provide special |
231 | definitions for this platform. The need for mach/memory.h should | |
232 | be avoided when possible. | |
dc21af99 | 233 | |
1b9f95f8 | 234 | config PHYS_OFFSET |
974c0724 | 235 | hex "Physical address of main memory" if MMU |
0cdc8b92 | 236 | depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H |
974c0724 | 237 | default DRAM_BASE if !MMU |
111e9a5c | 238 | help |
1b9f95f8 NP |
239 | Please provide the physical address corresponding to the |
240 | location of main memory in your system. | |
cada3c08 | 241 | |
87e040b6 SG |
242 | config GENERIC_BUG |
243 | def_bool y | |
244 | depends on BUG | |
245 | ||
1da177e4 LT |
246 | source "init/Kconfig" |
247 | ||
dc52ddc0 MH |
248 | source "kernel/Kconfig.freezer" |
249 | ||
1da177e4 LT |
250 | menu "System Type" |
251 | ||
3c427975 HC |
252 | config MMU |
253 | bool "MMU-based Paged Memory Management Support" | |
254 | default y | |
255 | help | |
256 | Select if you want MMU-based virtualised addressing space | |
257 | support by paged memory management. If unsure, say 'Y'. | |
258 | ||
ccf50e23 RK |
259 | # |
260 | # The "ARM system type" choice list is ordered alphabetically by option | |
261 | # text. Please add new entries in the option alphabetic order. | |
262 | # | |
1da177e4 LT |
263 | choice |
264 | prompt "ARM system type" | |
6a0e2430 | 265 | default ARCH_VERSATILE |
1da177e4 | 266 | |
4af6fee1 DS |
267 | config ARCH_INTEGRATOR |
268 | bool "ARM Ltd. Integrator family" | |
269 | select ARM_AMBA | |
89c52ed4 | 270 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 271 | select CLKDEV_LOOKUP |
aa3831cf | 272 | select HAVE_MACH_CLKDEV |
9904f793 | 273 | select HAVE_TCM |
c5a0adb5 | 274 | select ICST |
13edd86d | 275 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 276 | select PLAT_VERSATILE |
c41b16f8 | 277 | select PLAT_VERSATILE_FPGA_IRQ |
c334bc15 | 278 | select NEED_MACH_IO_H |
0cdc8b92 | 279 | select NEED_MACH_MEMORY_H |
4af6fee1 DS |
280 | help |
281 | Support for ARM's Integrator platform. | |
282 | ||
283 | config ARCH_REALVIEW | |
284 | bool "ARM Ltd. RealView family" | |
285 | select ARM_AMBA | |
6d803ba7 | 286 | select CLKDEV_LOOKUP |
aa3831cf | 287 | select HAVE_MACH_CLKDEV |
c5a0adb5 | 288 | select ICST |
ae30ceac | 289 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 290 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 291 | select PLAT_VERSATILE |
3cb5ee49 | 292 | select PLAT_VERSATILE_CLCD |
e3887714 | 293 | select ARM_TIMER_SP804 |
b56ba8aa | 294 | select GPIO_PL061 if GPIOLIB |
0cdc8b92 | 295 | select NEED_MACH_MEMORY_H |
4af6fee1 DS |
296 | help |
297 | This enables support for ARM Ltd RealView boards. | |
298 | ||
299 | config ARCH_VERSATILE | |
300 | bool "ARM Ltd. Versatile family" | |
301 | select ARM_AMBA | |
302 | select ARM_VIC | |
6d803ba7 | 303 | select CLKDEV_LOOKUP |
aa3831cf | 304 | select HAVE_MACH_CLKDEV |
c5a0adb5 | 305 | select ICST |
89df1272 | 306 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 307 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 308 | select PLAT_VERSATILE |
3414ba8c | 309 | select PLAT_VERSATILE_CLCD |
c41b16f8 | 310 | select PLAT_VERSATILE_FPGA_IRQ |
e3887714 | 311 | select ARM_TIMER_SP804 |
4af6fee1 DS |
312 | help |
313 | This enables support for ARM Ltd Versatile board. | |
314 | ||
ceade897 RK |
315 | config ARCH_VEXPRESS |
316 | bool "ARM Ltd. Versatile Express family" | |
317 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
318 | select ARM_AMBA | |
319 | select ARM_TIMER_SP804 | |
6d803ba7 | 320 | select CLKDEV_LOOKUP |
aa3831cf | 321 | select HAVE_MACH_CLKDEV |
ceade897 | 322 | select GENERIC_CLOCKEVENTS |
ceade897 | 323 | select HAVE_CLK |
95c34f83 | 324 | select HAVE_PATA_PLATFORM |
ceade897 RK |
325 | select ICST |
326 | select PLAT_VERSATILE | |
0fb44b91 | 327 | select PLAT_VERSATILE_CLCD |
ceade897 RK |
328 | help |
329 | This enables support for the ARM Ltd Versatile Express boards. | |
330 | ||
8fc5ffa0 AV |
331 | config ARCH_AT91 |
332 | bool "Atmel AT91" | |
f373e8c0 | 333 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 334 | select HAVE_CLK |
bd602995 | 335 | select CLKDEV_LOOKUP |
4af6fee1 | 336 | help |
2b3b3516 | 337 | This enables support for systems based on the Atmel AT91RM9200, |
9918ceaf | 338 | AT91SAM9 processors. |
4af6fee1 | 339 | |
ccf50e23 RK |
340 | config ARCH_BCMRING |
341 | bool "Broadcom BCMRING" | |
342 | depends on MMU | |
343 | select CPU_V6 | |
344 | select ARM_AMBA | |
82d63734 | 345 | select ARM_TIMER_SP804 |
6d803ba7 | 346 | select CLKDEV_LOOKUP |
ccf50e23 RK |
347 | select GENERIC_CLOCKEVENTS |
348 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
349 | help | |
350 | Support for Broadcom's BCMRing platform. | |
351 | ||
220e6cf7 RH |
352 | config ARCH_HIGHBANK |
353 | bool "Calxeda Highbank-based" | |
354 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
355 | select ARM_AMBA | |
356 | select ARM_GIC | |
357 | select ARM_TIMER_SP804 | |
22d80379 | 358 | select CACHE_L2X0 |
220e6cf7 RH |
359 | select CLKDEV_LOOKUP |
360 | select CPU_V7 | |
361 | select GENERIC_CLOCKEVENTS | |
362 | select HAVE_ARM_SCU | |
3b55658a | 363 | select HAVE_SMP |
220e6cf7 RH |
364 | select USE_OF |
365 | help | |
366 | Support for the Calxeda Highbank SoC based boards. | |
367 | ||
1da177e4 | 368 | config ARCH_CLPS711X |
4af6fee1 | 369 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 370 | select CPU_ARM720T |
5cfc8ee0 | 371 | select ARCH_USES_GETTIMEOFFSET |
0cdc8b92 | 372 | select NEED_MACH_MEMORY_H |
f999b8bd MM |
373 | help |
374 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 375 | |
d94f944e AV |
376 | config ARCH_CNS3XXX |
377 | bool "Cavium Networks CNS3XXX family" | |
00d2711d | 378 | select CPU_V6K |
d94f944e AV |
379 | select GENERIC_CLOCKEVENTS |
380 | select ARM_GIC | |
ce5ea9f3 | 381 | select MIGHT_HAVE_CACHE_L2X0 |
0b05da72 | 382 | select MIGHT_HAVE_PCI |
5f32f7a0 | 383 | select PCI_DOMAINS if PCI |
d94f944e AV |
384 | help |
385 | Support for Cavium Networks CNS3XXX platform. | |
386 | ||
788c9700 RK |
387 | config ARCH_GEMINI |
388 | bool "Cortina Systems Gemini" | |
389 | select CPU_FA526 | |
788c9700 | 390 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 391 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
392 | help |
393 | Support for the Cortina Systems Gemini family SoCs | |
394 | ||
3a6cb8ce AB |
395 | config ARCH_PRIMA2 |
396 | bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" | |
397 | select CPU_V7 | |
3a6cb8ce AB |
398 | select NO_IOPORT |
399 | select GENERIC_CLOCKEVENTS | |
400 | select CLKDEV_LOOKUP | |
401 | select GENERIC_IRQ_CHIP | |
ce5ea9f3 | 402 | select MIGHT_HAVE_CACHE_L2X0 |
3a6cb8ce AB |
403 | select USE_OF |
404 | select ZONE_DMA | |
405 | help | |
406 | Support for CSR SiRFSoC ARM Cortex A9 Platform | |
407 | ||
1da177e4 LT |
408 | config ARCH_EBSA110 |
409 | bool "EBSA-110" | |
c750815e | 410 | select CPU_SA110 |
f7e68bbf | 411 | select ISA |
c5eb2a2b | 412 | select NO_IOPORT |
5cfc8ee0 | 413 | select ARCH_USES_GETTIMEOFFSET |
c334bc15 | 414 | select NEED_MACH_IO_H |
0cdc8b92 | 415 | select NEED_MACH_MEMORY_H |
1da177e4 LT |
416 | help |
417 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 418 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
419 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
420 | parallel port. | |
421 | ||
e7736d47 LB |
422 | config ARCH_EP93XX |
423 | bool "EP93xx-based" | |
c750815e | 424 | select CPU_ARM920T |
e7736d47 LB |
425 | select ARM_AMBA |
426 | select ARM_VIC | |
6d803ba7 | 427 | select CLKDEV_LOOKUP |
7444a72e | 428 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 429 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 430 | select ARCH_USES_GETTIMEOFFSET |
5725aeae | 431 | select NEED_MACH_MEMORY_H |
e7736d47 LB |
432 | help |
433 | This enables support for the Cirrus EP93xx series of CPUs. | |
434 | ||
1da177e4 LT |
435 | config ARCH_FOOTBRIDGE |
436 | bool "FootBridge" | |
c750815e | 437 | select CPU_SA110 |
1da177e4 | 438 | select FOOTBRIDGE |
4e8d7637 | 439 | select GENERIC_CLOCKEVENTS |
d0ee9f40 | 440 | select HAVE_IDE |
c334bc15 | 441 | select NEED_MACH_IO_H |
0cdc8b92 | 442 | select NEED_MACH_MEMORY_H |
f999b8bd MM |
443 | help |
444 | Support for systems based on the DC21285 companion chip | |
445 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 446 | |
788c9700 RK |
447 | config ARCH_MXC |
448 | bool "Freescale MXC/iMX-based" | |
788c9700 | 449 | select GENERIC_CLOCKEVENTS |
788c9700 | 450 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 451 | select CLKDEV_LOOKUP |
234b6ced | 452 | select CLKSRC_MMIO |
8b6c44f1 | 453 | select GENERIC_IRQ_CHIP |
c124befc | 454 | select HAVE_SCHED_CLOCK |
ffa2ea3f | 455 | select MULTI_IRQ_HANDLER |
788c9700 RK |
456 | help |
457 | Support for Freescale MXC/iMX-based family of processors | |
458 | ||
1d3f33d5 SG |
459 | config ARCH_MXS |
460 | bool "Freescale MXS-based" | |
461 | select GENERIC_CLOCKEVENTS | |
462 | select ARCH_REQUIRE_GPIOLIB | |
b9214b97 | 463 | select CLKDEV_LOOKUP |
5c61ddcf | 464 | select CLKSRC_MMIO |
6abda3e1 | 465 | select HAVE_CLK_PREPARE |
1d3f33d5 SG |
466 | help |
467 | Support for Freescale MXS-based family of processors | |
468 | ||
4af6fee1 DS |
469 | config ARCH_NETX |
470 | bool "Hilscher NetX based" | |
234b6ced | 471 | select CLKSRC_MMIO |
c750815e | 472 | select CPU_ARM926T |
4af6fee1 | 473 | select ARM_VIC |
2fcfe6b8 | 474 | select GENERIC_CLOCKEVENTS |
f999b8bd | 475 | help |
4af6fee1 DS |
476 | This enables support for systems based on the Hilscher NetX Soc |
477 | ||
478 | config ARCH_H720X | |
479 | bool "Hynix HMS720x-based" | |
c750815e | 480 | select CPU_ARM720T |
4af6fee1 | 481 | select ISA_DMA_API |
5cfc8ee0 | 482 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
483 | help |
484 | This enables support for systems based on the Hynix HMS720x | |
485 | ||
3b938be6 RK |
486 | config ARCH_IOP13XX |
487 | bool "IOP13xx-based" | |
488 | depends on MMU | |
c750815e | 489 | select CPU_XSC3 |
3b938be6 RK |
490 | select PLAT_IOP |
491 | select PCI | |
492 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 493 | select VMSPLIT_1G |
c334bc15 | 494 | select NEED_MACH_IO_H |
0cdc8b92 | 495 | select NEED_MACH_MEMORY_H |
13a5045d | 496 | select NEED_RET_TO_USER |
3b938be6 RK |
497 | help |
498 | Support for Intel's IOP13XX (XScale) family of processors. | |
499 | ||
3f7e5815 LB |
500 | config ARCH_IOP32X |
501 | bool "IOP32x-based" | |
a4f7e763 | 502 | depends on MMU |
c750815e | 503 | select CPU_XSCALE |
c334bc15 | 504 | select NEED_MACH_IO_H |
13a5045d | 505 | select NEED_RET_TO_USER |
7ae1f7ec | 506 | select PLAT_IOP |
f7e68bbf | 507 | select PCI |
bb2b180c | 508 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 509 | help |
3f7e5815 LB |
510 | Support for Intel's 80219 and IOP32X (XScale) family of |
511 | processors. | |
512 | ||
513 | config ARCH_IOP33X | |
514 | bool "IOP33x-based" | |
515 | depends on MMU | |
c750815e | 516 | select CPU_XSCALE |
c334bc15 | 517 | select NEED_MACH_IO_H |
13a5045d | 518 | select NEED_RET_TO_USER |
7ae1f7ec | 519 | select PLAT_IOP |
3f7e5815 | 520 | select PCI |
bb2b180c | 521 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
522 | help |
523 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 524 | |
3b938be6 RK |
525 | config ARCH_IXP23XX |
526 | bool "IXP23XX-based" | |
a4f7e763 | 527 | depends on MMU |
c750815e | 528 | select CPU_XSC3 |
3b938be6 | 529 | select PCI |
5cfc8ee0 | 530 | select ARCH_USES_GETTIMEOFFSET |
c334bc15 | 531 | select NEED_MACH_IO_H |
0cdc8b92 | 532 | select NEED_MACH_MEMORY_H |
f999b8bd | 533 | help |
3b938be6 | 534 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
535 | |
536 | config ARCH_IXP2000 | |
537 | bool "IXP2400/2800-based" | |
a4f7e763 | 538 | depends on MMU |
c750815e | 539 | select CPU_XSCALE |
f7e68bbf | 540 | select PCI |
5cfc8ee0 | 541 | select ARCH_USES_GETTIMEOFFSET |
c334bc15 | 542 | select NEED_MACH_IO_H |
0cdc8b92 | 543 | select NEED_MACH_MEMORY_H |
f999b8bd MM |
544 | help |
545 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 546 | |
3b938be6 RK |
547 | config ARCH_IXP4XX |
548 | bool "IXP4xx-based" | |
a4f7e763 | 549 | depends on MMU |
234b6ced | 550 | select CLKSRC_MMIO |
c750815e | 551 | select CPU_XSCALE |
8858e9af | 552 | select GENERIC_GPIO |
3b938be6 | 553 | select GENERIC_CLOCKEVENTS |
5b0d495c | 554 | select HAVE_SCHED_CLOCK |
0b05da72 | 555 | select MIGHT_HAVE_PCI |
c334bc15 | 556 | select NEED_MACH_IO_H |
485bdde7 | 557 | select DMABOUNCE if PCI |
c4713074 | 558 | help |
3b938be6 | 559 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 560 | |
edabd38e SB |
561 | config ARCH_DOVE |
562 | bool "Marvell Dove" | |
7b769bb3 | 563 | select CPU_V7 |
edabd38e | 564 | select PCI |
edabd38e | 565 | select ARCH_REQUIRE_GPIOLIB |
edabd38e | 566 | select GENERIC_CLOCKEVENTS |
c334bc15 | 567 | select NEED_MACH_IO_H |
edabd38e SB |
568 | select PLAT_ORION |
569 | help | |
570 | Support for the Marvell Dove SoC 88AP510 | |
571 | ||
651c74c7 SB |
572 | config ARCH_KIRKWOOD |
573 | bool "Marvell Kirkwood" | |
c750815e | 574 | select CPU_FEROCEON |
651c74c7 | 575 | select PCI |
a8865655 | 576 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 | 577 | select GENERIC_CLOCKEVENTS |
c334bc15 | 578 | select NEED_MACH_IO_H |
651c74c7 SB |
579 | select PLAT_ORION |
580 | help | |
581 | Support for the following Marvell Kirkwood series SoCs: | |
582 | 88F6180, 88F6192 and 88F6281. | |
583 | ||
40805949 KW |
584 | config ARCH_LPC32XX |
585 | bool "NXP LPC32XX" | |
234b6ced | 586 | select CLKSRC_MMIO |
40805949 KW |
587 | select CPU_ARM926T |
588 | select ARCH_REQUIRE_GPIOLIB | |
589 | select HAVE_IDE | |
590 | select ARM_AMBA | |
591 | select USB_ARCH_HAS_OHCI | |
6d803ba7 | 592 | select CLKDEV_LOOKUP |
40805949 KW |
593 | select GENERIC_CLOCKEVENTS |
594 | help | |
595 | Support for the NXP LPC32XX family of processors | |
596 | ||
794d15b2 SS |
597 | config ARCH_MV78XX0 |
598 | bool "Marvell MV78xx0" | |
c750815e | 599 | select CPU_FEROCEON |
794d15b2 | 600 | select PCI |
a8865655 | 601 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 | 602 | select GENERIC_CLOCKEVENTS |
c334bc15 | 603 | select NEED_MACH_IO_H |
794d15b2 SS |
604 | select PLAT_ORION |
605 | help | |
606 | Support for the following Marvell MV78xx0 series SoCs: | |
607 | MV781x0, MV782x0. | |
608 | ||
9dd0b194 | 609 | config ARCH_ORION5X |
585cf175 TP |
610 | bool "Marvell Orion" |
611 | depends on MMU | |
c750815e | 612 | select CPU_FEROCEON |
038ee083 | 613 | select PCI |
a8865655 | 614 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 615 | select GENERIC_CLOCKEVENTS |
69b02f6a | 616 | select PLAT_ORION |
585cf175 | 617 | help |
9dd0b194 | 618 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 619 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 620 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 621 | |
788c9700 | 622 | config ARCH_MMP |
2f7e8fae | 623 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 624 | depends on MMU |
788c9700 | 625 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 626 | select CLKDEV_LOOKUP |
788c9700 | 627 | select GENERIC_CLOCKEVENTS |
157d2644 | 628 | select GPIO_PXA |
28bb7bc6 | 629 | select HAVE_SCHED_CLOCK |
788c9700 RK |
630 | select TICK_ONESHOT |
631 | select PLAT_PXA | |
0bd86961 | 632 | select SPARSE_IRQ |
3c7241bd | 633 | select GENERIC_ALLOCATOR |
788c9700 | 634 | help |
2f7e8fae | 635 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
636 | |
637 | config ARCH_KS8695 | |
638 | bool "Micrel/Kendin KS8695" | |
639 | select CPU_ARM922T | |
98830bc9 | 640 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 641 | select ARCH_USES_GETTIMEOFFSET |
0cdc8b92 | 642 | select NEED_MACH_MEMORY_H |
788c9700 RK |
643 | help |
644 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
645 | System-on-Chip devices. | |
646 | ||
788c9700 RK |
647 | config ARCH_W90X900 |
648 | bool "Nuvoton W90X900 CPU" | |
649 | select CPU_ARM926T | |
c52d3d68 | 650 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 651 | select CLKDEV_LOOKUP |
6fa5d5f7 | 652 | select CLKSRC_MMIO |
58b5369e | 653 | select GENERIC_CLOCKEVENTS |
788c9700 | 654 | help |
a8bc4ead | 655 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
656 | At present, the w90x900 has been renamed nuc900, regarding | |
657 | the ARM series product line, you can login the following | |
658 | link address to know more. | |
659 | ||
660 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
661 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 662 | |
c5f80065 EG |
663 | config ARCH_TEGRA |
664 | bool "NVIDIA Tegra" | |
4073723a | 665 | select CLKDEV_LOOKUP |
234b6ced | 666 | select CLKSRC_MMIO |
c5f80065 EG |
667 | select GENERIC_CLOCKEVENTS |
668 | select GENERIC_GPIO | |
669 | select HAVE_CLK | |
e3f4c0ab | 670 | select HAVE_SCHED_CLOCK |
3b55658a | 671 | select HAVE_SMP |
ce5ea9f3 | 672 | select MIGHT_HAVE_CACHE_L2X0 |
c334bc15 | 673 | select NEED_MACH_IO_H if PCI |
7056d423 | 674 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
675 | help |
676 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
677 | Tegra 6xx and Tegra 2 series). | |
678 | ||
af75655c JI |
679 | config ARCH_PICOXCELL |
680 | bool "Picochip picoXcell" | |
681 | select ARCH_REQUIRE_GPIOLIB | |
682 | select ARM_PATCH_PHYS_VIRT | |
683 | select ARM_VIC | |
684 | select CPU_V6K | |
685 | select DW_APB_TIMER | |
686 | select GENERIC_CLOCKEVENTS | |
687 | select GENERIC_GPIO | |
688 | select HAVE_SCHED_CLOCK | |
689 | select HAVE_TCM | |
690 | select NO_IOPORT | |
98e27a5c | 691 | select SPARSE_IRQ |
af75655c JI |
692 | select USE_OF |
693 | help | |
694 | This enables support for systems based on the Picochip picoXcell | |
695 | family of Femtocell devices. The picoxcell support requires device tree | |
696 | for all boards. | |
697 | ||
4af6fee1 DS |
698 | config ARCH_PNX4008 |
699 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 700 | select CPU_ARM926T |
6d803ba7 | 701 | select CLKDEV_LOOKUP |
5cfc8ee0 | 702 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
703 | help |
704 | This enables support for Philips PNX4008 mobile platform. | |
705 | ||
1da177e4 | 706 | config ARCH_PXA |
2c8086a5 | 707 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 708 | depends on MMU |
034d2f5a | 709 | select ARCH_MTD_XIP |
89c52ed4 | 710 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 711 | select CLKDEV_LOOKUP |
234b6ced | 712 | select CLKSRC_MMIO |
7444a72e | 713 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 714 | select GENERIC_CLOCKEVENTS |
157d2644 | 715 | select GPIO_PXA |
7ce83018 | 716 | select HAVE_SCHED_CLOCK |
a88264c2 | 717 | select TICK_ONESHOT |
bd5ce433 | 718 | select PLAT_PXA |
6ac6b817 | 719 | select SPARSE_IRQ |
4e234cc0 | 720 | select AUTO_ZRELADDR |
8a97ae2f | 721 | select MULTI_IRQ_HANDLER |
15e0d9e3 | 722 | select ARM_CPU_SUSPEND if PM |
d0ee9f40 | 723 | select HAVE_IDE |
f999b8bd | 724 | help |
2c8086a5 | 725 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 726 | |
788c9700 RK |
727 | config ARCH_MSM |
728 | bool "Qualcomm MSM" | |
4b536b8d | 729 | select HAVE_CLK |
49cbe786 | 730 | select GENERIC_CLOCKEVENTS |
923a081c | 731 | select ARCH_REQUIRE_GPIOLIB |
bd32344a | 732 | select CLKDEV_LOOKUP |
49cbe786 | 733 | help |
4b53eb4f DW |
734 | Support for Qualcomm MSM/QSD based systems. This runs on the |
735 | apps processor of the MSM/QSD and depends on a shared memory | |
736 | interface to the modem processor which runs the baseband | |
737 | stack and controls some vital subsystems | |
738 | (clock and power control, etc). | |
49cbe786 | 739 | |
c793c1b0 | 740 | config ARCH_SHMOBILE |
6d72ad35 PM |
741 | bool "Renesas SH-Mobile / R-Mobile" |
742 | select HAVE_CLK | |
5e93c6b4 | 743 | select CLKDEV_LOOKUP |
aa3831cf | 744 | select HAVE_MACH_CLKDEV |
3b55658a | 745 | select HAVE_SMP |
6d72ad35 | 746 | select GENERIC_CLOCKEVENTS |
ce5ea9f3 | 747 | select MIGHT_HAVE_CACHE_L2X0 |
6d72ad35 PM |
748 | select NO_IOPORT |
749 | select SPARSE_IRQ | |
60f1435c | 750 | select MULTI_IRQ_HANDLER |
e3e01091 | 751 | select PM_GENERIC_DOMAINS if PM |
0cdc8b92 | 752 | select NEED_MACH_MEMORY_H |
c793c1b0 | 753 | help |
6d72ad35 | 754 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 755 | |
1da177e4 LT |
756 | config ARCH_RPC |
757 | bool "RiscPC" | |
758 | select ARCH_ACORN | |
759 | select FIQ | |
760 | select TIMER_ACORN | |
a08b6b79 | 761 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 762 | select HAVE_PATA_PLATFORM |
065909b9 | 763 | select ISA_DMA_API |
5ea81769 | 764 | select NO_IOPORT |
07f841b7 | 765 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 766 | select ARCH_USES_GETTIMEOFFSET |
d0ee9f40 | 767 | select HAVE_IDE |
c334bc15 | 768 | select NEED_MACH_IO_H |
0cdc8b92 | 769 | select NEED_MACH_MEMORY_H |
1da177e4 LT |
770 | help |
771 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
772 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
773 | ||
774 | config ARCH_SA1100 | |
775 | bool "SA1100-based" | |
234b6ced | 776 | select CLKSRC_MMIO |
c750815e | 777 | select CPU_SA1100 |
f7e68bbf | 778 | select ISA |
05944d74 | 779 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 780 | select ARCH_MTD_XIP |
89c52ed4 | 781 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 782 | select CPU_FREQ |
3e238be2 | 783 | select GENERIC_CLOCKEVENTS |
8bd92669 | 784 | select HAVE_CLK |
5094b92f | 785 | select HAVE_SCHED_CLOCK |
3e238be2 | 786 | select TICK_ONESHOT |
7444a72e | 787 | select ARCH_REQUIRE_GPIOLIB |
d0ee9f40 | 788 | select HAVE_IDE |
0cdc8b92 | 789 | select NEED_MACH_MEMORY_H |
f999b8bd MM |
790 | help |
791 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
792 | |
793 | config ARCH_S3C2410 | |
63b1f51b | 794 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 795 | select GENERIC_GPIO |
9d56c02a | 796 | select ARCH_HAS_CPUFREQ |
9483a578 | 797 | select HAVE_CLK |
e83626f2 | 798 | select CLKDEV_LOOKUP |
5cfc8ee0 | 799 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 800 | select HAVE_S3C2410_I2C if I2C |
c334bc15 | 801 | select NEED_MACH_IO_H |
1da177e4 LT |
802 | help |
803 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
804 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 805 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 806 | |
63b1f51b | 807 | Note, the S3C2416 and the S3C2450 are so close that they even share |
25985edc | 808 | the same SoC ID code. This means that there is no separate machine |
63b1f51b BD |
809 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. |
810 | ||
a08ab637 BD |
811 | config ARCH_S3C64XX |
812 | bool "Samsung S3C64XX" | |
89f1fa08 | 813 | select PLAT_SAMSUNG |
89f0ce72 | 814 | select CPU_V6 |
89f0ce72 | 815 | select ARM_VIC |
a08ab637 | 816 | select HAVE_CLK |
6700397a | 817 | select HAVE_TCM |
226e85f4 | 818 | select CLKDEV_LOOKUP |
89f0ce72 | 819 | select NO_IOPORT |
5cfc8ee0 | 820 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 821 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
822 | select ARCH_REQUIRE_GPIOLIB |
823 | select SAMSUNG_CLKSRC | |
824 | select SAMSUNG_IRQ_VIC_TIMER | |
89f0ce72 | 825 | select S3C_GPIO_TRACK |
89f0ce72 BD |
826 | select S3C_DEV_NAND |
827 | select USB_ARCH_HAS_OHCI | |
828 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 829 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 830 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
831 | help |
832 | Samsung S3C64XX series based systems | |
833 | ||
49b7a491 KK |
834 | config ARCH_S5P64X0 |
835 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
836 | select CPU_V6 |
837 | select GENERIC_GPIO | |
838 | select HAVE_CLK | |
d8b22d25 | 839 | select CLKDEV_LOOKUP |
0665ccc4 | 840 | select CLKSRC_MMIO |
c39d8d55 | 841 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
9e65bbf2 SK |
842 | select GENERIC_CLOCKEVENTS |
843 | select HAVE_SCHED_CLOCK | |
20676c15 | 844 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 845 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 846 | help |
49b7a491 KK |
847 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
848 | SMDK6450. | |
c4ffccdd | 849 | |
acc84707 MS |
850 | config ARCH_S5PC100 |
851 | bool "Samsung S5PC100" | |
5a7652f2 BM |
852 | select GENERIC_GPIO |
853 | select HAVE_CLK | |
29e8eb0f | 854 | select CLKDEV_LOOKUP |
5a7652f2 | 855 | select CPU_V7 |
925c68cd | 856 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 857 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 858 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 859 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 860 | help |
acc84707 | 861 | Samsung S5PC100 series based systems |
5a7652f2 | 862 | |
170f4e42 KK |
863 | config ARCH_S5PV210 |
864 | bool "Samsung S5PV210/S5PC110" | |
865 | select CPU_V7 | |
eecb6a84 | 866 | select ARCH_SPARSEMEM_ENABLE |
0f75a96b | 867 | select ARCH_HAS_HOLES_MEMORYMODEL |
170f4e42 KK |
868 | select GENERIC_GPIO |
869 | select HAVE_CLK | |
b2a9dd46 | 870 | select CLKDEV_LOOKUP |
0665ccc4 | 871 | select CLKSRC_MMIO |
d8144aea | 872 | select ARCH_HAS_CPUFREQ |
9e65bbf2 SK |
873 | select GENERIC_CLOCKEVENTS |
874 | select HAVE_SCHED_CLOCK | |
20676c15 | 875 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 876 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 877 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
0cdc8b92 | 878 | select NEED_MACH_MEMORY_H |
170f4e42 KK |
879 | help |
880 | Samsung S5PV210/S5PC110 series based systems | |
881 | ||
83014579 KK |
882 | config ARCH_EXYNOS |
883 | bool "SAMSUNG EXYNOS" | |
cc0e72b8 | 884 | select CPU_V7 |
f567fa6f | 885 | select ARCH_SPARSEMEM_ENABLE |
0f75a96b | 886 | select ARCH_HAS_HOLES_MEMORYMODEL |
cc0e72b8 CY |
887 | select GENERIC_GPIO |
888 | select HAVE_CLK | |
badc4f2d | 889 | select CLKDEV_LOOKUP |
b333fb16 | 890 | select ARCH_HAS_CPUFREQ |
cc0e72b8 | 891 | select GENERIC_CLOCKEVENTS |
754961a8 | 892 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 893 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 894 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
0cdc8b92 | 895 | select NEED_MACH_MEMORY_H |
cc0e72b8 | 896 | help |
83014579 | 897 | Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) |
cc0e72b8 | 898 | |
1da177e4 LT |
899 | config ARCH_SHARK |
900 | bool "Shark" | |
c750815e | 901 | select CPU_SA110 |
f7e68bbf RK |
902 | select ISA |
903 | select ISA_DMA | |
3bca103a | 904 | select ZONE_DMA |
f7e68bbf | 905 | select PCI |
5cfc8ee0 | 906 | select ARCH_USES_GETTIMEOFFSET |
0cdc8b92 | 907 | select NEED_MACH_MEMORY_H |
c334bc15 | 908 | select NEED_MACH_IO_H |
f999b8bd MM |
909 | help |
910 | Support for the StrongARM based Digital DNARD machine, also known | |
911 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 912 | |
d98aac75 LW |
913 | config ARCH_U300 |
914 | bool "ST-Ericsson U300 Series" | |
915 | depends on MMU | |
234b6ced | 916 | select CLKSRC_MMIO |
d98aac75 | 917 | select CPU_ARM926T |
5c21b7ca | 918 | select HAVE_SCHED_CLOCK |
bc581770 | 919 | select HAVE_TCM |
d98aac75 | 920 | select ARM_AMBA |
5485c1e0 | 921 | select ARM_PATCH_PHYS_VIRT |
d98aac75 | 922 | select ARM_VIC |
d98aac75 | 923 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 924 | select CLKDEV_LOOKUP |
aa3831cf | 925 | select HAVE_MACH_CLKDEV |
d98aac75 | 926 | select GENERIC_GPIO |
cc890cd7 | 927 | select ARCH_REQUIRE_GPIOLIB |
d98aac75 LW |
928 | help |
929 | Support for ST-Ericsson U300 series mobile platforms. | |
930 | ||
ccf50e23 RK |
931 | config ARCH_U8500 |
932 | bool "ST-Ericsson U8500 Series" | |
933 | select CPU_V7 | |
934 | select ARM_AMBA | |
ccf50e23 | 935 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 936 | select CLKDEV_LOOKUP |
94bdc0e2 | 937 | select ARCH_REQUIRE_GPIOLIB |
7c1a70e9 | 938 | select ARCH_HAS_CPUFREQ |
3b55658a | 939 | select HAVE_SMP |
ce5ea9f3 | 940 | select MIGHT_HAVE_CACHE_L2X0 |
ccf50e23 RK |
941 | help |
942 | Support for ST-Ericsson's Ux500 architecture | |
943 | ||
944 | config ARCH_NOMADIK | |
945 | bool "STMicroelectronics Nomadik" | |
946 | select ARM_AMBA | |
947 | select ARM_VIC | |
948 | select CPU_ARM926T | |
6d803ba7 | 949 | select CLKDEV_LOOKUP |
ccf50e23 | 950 | select GENERIC_CLOCKEVENTS |
ce5ea9f3 | 951 | select MIGHT_HAVE_CACHE_L2X0 |
ccf50e23 RK |
952 | select ARCH_REQUIRE_GPIOLIB |
953 | help | |
954 | Support for the Nomadik platform by ST-Ericsson | |
955 | ||
7c6337e2 KH |
956 | config ARCH_DAVINCI |
957 | bool "TI DaVinci" | |
7c6337e2 | 958 | select GENERIC_CLOCKEVENTS |
dce1115b | 959 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 960 | select ZONE_DMA |
9232fcc9 | 961 | select HAVE_IDE |
6d803ba7 | 962 | select CLKDEV_LOOKUP |
20e9969b | 963 | select GENERIC_ALLOCATOR |
dc7ad3b3 | 964 | select GENERIC_IRQ_CHIP |
ae88e05a | 965 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
966 | help |
967 | Support for TI's DaVinci platform. | |
968 | ||
3b938be6 RK |
969 | config ARCH_OMAP |
970 | bool "TI OMAP" | |
9483a578 | 971 | select HAVE_CLK |
7444a72e | 972 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 973 | select ARCH_HAS_CPUFREQ |
354a183f | 974 | select CLKSRC_MMIO |
06cad098 | 975 | select GENERIC_CLOCKEVENTS |
dc548fbb | 976 | select HAVE_SCHED_CLOCK |
9af915da | 977 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 978 | help |
6e457bb0 | 979 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 980 | |
cee37e50 | 981 | config PLAT_SPEAR |
982 | bool "ST SPEAr" | |
983 | select ARM_AMBA | |
984 | select ARCH_REQUIRE_GPIOLIB | |
6d803ba7 | 985 | select CLKDEV_LOOKUP |
d6e15d78 | 986 | select CLKSRC_MMIO |
cee37e50 | 987 | select GENERIC_CLOCKEVENTS |
cee37e50 | 988 | select HAVE_CLK |
989 | help | |
990 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
991 | ||
21f47fbc AC |
992 | config ARCH_VT8500 |
993 | bool "VIA/WonderMedia 85xx" | |
994 | select CPU_ARM926T | |
995 | select GENERIC_GPIO | |
996 | select ARCH_HAS_CPUFREQ | |
997 | select GENERIC_CLOCKEVENTS | |
998 | select ARCH_REQUIRE_GPIOLIB | |
999 | select HAVE_PWM | |
1000 | help | |
1001 | Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. | |
02c981c0 | 1002 | |
b85a3ef4 JL |
1003 | config ARCH_ZYNQ |
1004 | bool "Xilinx Zynq ARM Cortex A9 Platform" | |
02c981c0 | 1005 | select CPU_V7 |
02c981c0 BD |
1006 | select GENERIC_CLOCKEVENTS |
1007 | select CLKDEV_LOOKUP | |
b85a3ef4 JL |
1008 | select ARM_GIC |
1009 | select ARM_AMBA | |
1010 | select ICST | |
ce5ea9f3 | 1011 | select MIGHT_HAVE_CACHE_L2X0 |
02c981c0 | 1012 | select USE_OF |
02c981c0 | 1013 | help |
b85a3ef4 | 1014 | Support for Xilinx Zynq ARM Cortex A9 Platform |
1da177e4 LT |
1015 | endchoice |
1016 | ||
ccf50e23 RK |
1017 | # |
1018 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
1019 | # Kconfigs may be included either alphabetically (according to the | |
1020 | # plat- suffix) or along side the corresponding mach-* source. | |
1021 | # | |
95b8f20f RK |
1022 | source "arch/arm/mach-at91/Kconfig" |
1023 | ||
1024 | source "arch/arm/mach-bcmring/Kconfig" | |
1025 | ||
1da177e4 LT |
1026 | source "arch/arm/mach-clps711x/Kconfig" |
1027 | ||
d94f944e AV |
1028 | source "arch/arm/mach-cns3xxx/Kconfig" |
1029 | ||
95b8f20f RK |
1030 | source "arch/arm/mach-davinci/Kconfig" |
1031 | ||
1032 | source "arch/arm/mach-dove/Kconfig" | |
1033 | ||
e7736d47 LB |
1034 | source "arch/arm/mach-ep93xx/Kconfig" |
1035 | ||
1da177e4 LT |
1036 | source "arch/arm/mach-footbridge/Kconfig" |
1037 | ||
59d3a193 PZ |
1038 | source "arch/arm/mach-gemini/Kconfig" |
1039 | ||
95b8f20f RK |
1040 | source "arch/arm/mach-h720x/Kconfig" |
1041 | ||
1da177e4 LT |
1042 | source "arch/arm/mach-integrator/Kconfig" |
1043 | ||
3f7e5815 LB |
1044 | source "arch/arm/mach-iop32x/Kconfig" |
1045 | ||
1046 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 1047 | |
285f5fa7 DW |
1048 | source "arch/arm/mach-iop13xx/Kconfig" |
1049 | ||
1da177e4 LT |
1050 | source "arch/arm/mach-ixp4xx/Kconfig" |
1051 | ||
1052 | source "arch/arm/mach-ixp2000/Kconfig" | |
1053 | ||
c4713074 LB |
1054 | source "arch/arm/mach-ixp23xx/Kconfig" |
1055 | ||
95b8f20f RK |
1056 | source "arch/arm/mach-kirkwood/Kconfig" |
1057 | ||
1058 | source "arch/arm/mach-ks8695/Kconfig" | |
1059 | ||
40805949 KW |
1060 | source "arch/arm/mach-lpc32xx/Kconfig" |
1061 | ||
95b8f20f RK |
1062 | source "arch/arm/mach-msm/Kconfig" |
1063 | ||
794d15b2 SS |
1064 | source "arch/arm/mach-mv78xx0/Kconfig" |
1065 | ||
95b8f20f | 1066 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 1067 | |
1d3f33d5 SG |
1068 | source "arch/arm/mach-mxs/Kconfig" |
1069 | ||
95b8f20f | 1070 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 1071 | |
95b8f20f RK |
1072 | source "arch/arm/mach-nomadik/Kconfig" |
1073 | source "arch/arm/plat-nomadik/Kconfig" | |
1074 | ||
d48af15e TL |
1075 | source "arch/arm/plat-omap/Kconfig" |
1076 | ||
1077 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 1078 | |
1dbae815 TL |
1079 | source "arch/arm/mach-omap2/Kconfig" |
1080 | ||
9dd0b194 | 1081 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 1082 | |
95b8f20f RK |
1083 | source "arch/arm/mach-pxa/Kconfig" |
1084 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 1085 | |
95b8f20f RK |
1086 | source "arch/arm/mach-mmp/Kconfig" |
1087 | ||
1088 | source "arch/arm/mach-realview/Kconfig" | |
1089 | ||
1090 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 1091 | |
cf383678 | 1092 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 1093 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 1094 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 1095 | |
cee37e50 | 1096 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 BD |
1097 | |
1098 | if ARCH_S3C2410 | |
1da177e4 | 1099 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 1100 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 1101 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 1102 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 1103 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 1104 | endif |
1da177e4 | 1105 | |
a08ab637 | 1106 | if ARCH_S3C64XX |
431107ea | 1107 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
1108 | endif |
1109 | ||
49b7a491 | 1110 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 1111 | |
5a7652f2 | 1112 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 1113 | |
170f4e42 KK |
1114 | source "arch/arm/mach-s5pv210/Kconfig" |
1115 | ||
83014579 | 1116 | source "arch/arm/mach-exynos/Kconfig" |
cc0e72b8 | 1117 | |
882d01f9 | 1118 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 1119 | |
c5f80065 EG |
1120 | source "arch/arm/mach-tegra/Kconfig" |
1121 | ||
95b8f20f | 1122 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1123 | |
95b8f20f | 1124 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1125 | |
1126 | source "arch/arm/mach-versatile/Kconfig" | |
1127 | ||
ceade897 | 1128 | source "arch/arm/mach-vexpress/Kconfig" |
420c34e4 | 1129 | source "arch/arm/plat-versatile/Kconfig" |
ceade897 | 1130 | |
21f47fbc AC |
1131 | source "arch/arm/mach-vt8500/Kconfig" |
1132 | ||
7ec80ddf | 1133 | source "arch/arm/mach-w90x900/Kconfig" |
1134 | ||
1da177e4 LT |
1135 | # Definitions to make life easier |
1136 | config ARCH_ACORN | |
1137 | bool | |
1138 | ||
7ae1f7ec LB |
1139 | config PLAT_IOP |
1140 | bool | |
469d3044 | 1141 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1142 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1143 | |
69b02f6a LB |
1144 | config PLAT_ORION |
1145 | bool | |
bfe45e0b | 1146 | select CLKSRC_MMIO |
dc7ad3b3 | 1147 | select GENERIC_IRQ_CHIP |
f06a1624 | 1148 | select HAVE_SCHED_CLOCK |
69b02f6a | 1149 | |
bd5ce433 EM |
1150 | config PLAT_PXA |
1151 | bool | |
1152 | ||
f4b8b319 RK |
1153 | config PLAT_VERSATILE |
1154 | bool | |
1155 | ||
e3887714 RK |
1156 | config ARM_TIMER_SP804 |
1157 | bool | |
bfe45e0b | 1158 | select CLKSRC_MMIO |
e3887714 | 1159 | |
1da177e4 LT |
1160 | source arch/arm/mm/Kconfig |
1161 | ||
958cab0f RK |
1162 | config ARM_NR_BANKS |
1163 | int | |
1164 | default 16 if ARCH_EP93XX | |
1165 | default 8 | |
1166 | ||
afe4b25e LB |
1167 | config IWMMXT |
1168 | bool "Enable iWMMXt support" | |
ef6c8445 HZ |
1169 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1170 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | |
afe4b25e LB |
1171 | help |
1172 | Enable support for iWMMXt context switching at run time if | |
1173 | running on a CPU that supports it. | |
1174 | ||
1da177e4 LT |
1175 | config XSCALE_PMU |
1176 | bool | |
bfc994b5 | 1177 | depends on CPU_XSCALE |
1da177e4 LT |
1178 | default y |
1179 | ||
0f4f0672 | 1180 | config CPU_HAS_PMU |
e399b1a4 | 1181 | depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \ |
8954bb0d | 1182 | (!ARCH_OMAP3 || OMAP3_EMU) |
0f4f0672 JI |
1183 | default y |
1184 | bool | |
1185 | ||
52108641 | 1186 | config MULTI_IRQ_HANDLER |
1187 | bool | |
1188 | help | |
1189 | Allow each machine to specify it's own IRQ handler at run time. | |
1190 | ||
3b93e7b0 HC |
1191 | if !MMU |
1192 | source "arch/arm/Kconfig-nommu" | |
1193 | endif | |
1194 | ||
9cba3ccc CM |
1195 | config ARM_ERRATA_411920 |
1196 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
e399b1a4 | 1197 | depends on CPU_V6 || CPU_V6K |
9cba3ccc CM |
1198 | help |
1199 | Invalidation of the Instruction Cache operation can | |
1200 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1201 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1202 | recommended workaround. | |
1203 | ||
7ce236fc CM |
1204 | config ARM_ERRATA_430973 |
1205 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1206 | depends on CPU_V7 | |
1207 | help | |
1208 | This option enables the workaround for the 430973 Cortex-A8 | |
1209 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1210 | interworking branch is replaced with another code sequence at the | |
1211 | same virtual address, whether due to self-modifying code or virtual | |
1212 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1213 | stale interworking branch prediction. This results in Cortex-A8 | |
1214 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1215 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1216 | and also flushes the branch target cache at every context switch. | |
1217 | Note that setting specific bits in the ACTLR register may not be | |
1218 | available in non-secure mode. | |
1219 | ||
855c551f CM |
1220 | config ARM_ERRATA_458693 |
1221 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1222 | depends on CPU_V7 | |
1223 | help | |
1224 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1225 | erratum. For very specific sequences of memory operations, it is | |
1226 | possible for a hazard condition intended for a cache line to instead | |
1227 | be incorrectly associated with a different cache line. This false | |
1228 | hazard might then cause a processor deadlock. The workaround enables | |
1229 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1230 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1231 | register may not be available in non-secure mode. | |
1232 | ||
0516e464 CM |
1233 | config ARM_ERRATA_460075 |
1234 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1235 | depends on CPU_V7 | |
1236 | help | |
1237 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1238 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1239 | situation in which recent store transactions to the L2 cache are lost | |
1240 | and overwritten with stale memory contents from external memory. The | |
1241 | workaround disables the write-allocate mode for the L2 cache via the | |
1242 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1243 | may not be available in non-secure mode. | |
1244 | ||
9f05027c WD |
1245 | config ARM_ERRATA_742230 |
1246 | bool "ARM errata: DMB operation may be faulty" | |
1247 | depends on CPU_V7 && SMP | |
1248 | help | |
1249 | This option enables the workaround for the 742230 Cortex-A9 | |
1250 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1251 | between two write operations may not ensure the correct visibility | |
1252 | ordering of the two writes. This workaround sets a specific bit in | |
1253 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1254 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1255 | the two writes. | |
1256 | ||
a672e99b WD |
1257 | config ARM_ERRATA_742231 |
1258 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1259 | depends on CPU_V7 && SMP | |
1260 | help | |
1261 | This option enables the workaround for the 742231 Cortex-A9 | |
1262 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1263 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1264 | accessing some data located in the same cache line, may get corrupted | |
1265 | data due to bad handling of the address hazard when the line gets | |
1266 | replaced from one of the CPUs at the same time as another CPU is | |
1267 | accessing it. This workaround sets specific bits in the diagnostic | |
1268 | register of the Cortex-A9 which reduces the linefill issuing | |
1269 | capabilities of the processor. | |
1270 | ||
9e65582a | 1271 | config PL310_ERRATA_588369 |
fa0ce403 | 1272 | bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" |
2839e06c | 1273 | depends on CACHE_L2X0 |
9e65582a SS |
1274 | help |
1275 | The PL310 L2 cache controller implements three types of Clean & | |
1276 | Invalidate maintenance operations: by Physical Address | |
1277 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1278 | They are architecturally defined to behave as the execution of a | |
1279 | clean operation followed immediately by an invalidate operation, | |
1280 | both performing to the same memory location. This functionality | |
1281 | is not correctly implemented in PL310 as clean lines are not | |
2839e06c | 1282 | invalidated as a result of these operations. |
cdf357f1 WD |
1283 | |
1284 | config ARM_ERRATA_720789 | |
1285 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
e66dc745 | 1286 | depends on CPU_V7 |
cdf357f1 WD |
1287 | help |
1288 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1289 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1290 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1291 | As a consequence of this erratum, some TLB entries which should be | |
1292 | invalidated are not, resulting in an incoherency in the system page | |
1293 | tables. The workaround changes the TLB flushing routines to invalidate | |
1294 | entries regardless of the ASID. | |
475d92fc | 1295 | |
1f0090a1 | 1296 | config PL310_ERRATA_727915 |
fa0ce403 | 1297 | bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption" |
1f0090a1 RK |
1298 | depends on CACHE_L2X0 |
1299 | help | |
1300 | PL310 implements the Clean & Invalidate by Way L2 cache maintenance | |
1301 | operation (offset 0x7FC). This operation runs in background so that | |
1302 | PL310 can handle normal accesses while it is in progress. Under very | |
1303 | rare circumstances, due to this erratum, write data can be lost when | |
1304 | PL310 treats a cacheable write transaction during a Clean & | |
1305 | Invalidate by Way operation. | |
1306 | ||
475d92fc WD |
1307 | config ARM_ERRATA_743622 |
1308 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1309 | depends on CPU_V7 | |
1310 | help | |
1311 | This option enables the workaround for the 743622 Cortex-A9 | |
1312 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1313 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1314 | corruption. This workaround sets a specific bit in the diagnostic | |
1315 | register of the Cortex-A9 which disables the Store Buffer | |
1316 | optimisation, preventing the defect from occurring. This has no | |
1317 | visible impact on the overall performance or power consumption of the | |
1318 | processor. | |
1319 | ||
9a27c27c WD |
1320 | config ARM_ERRATA_751472 |
1321 | bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation" | |
ba90c516 | 1322 | depends on CPU_V7 |
9a27c27c WD |
1323 | help |
1324 | This option enables the workaround for the 751472 Cortex-A9 (prior | |
1325 | to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the | |
1326 | completion of a following broadcasted operation if the second | |
1327 | operation is received by a CPU before the ICIALLUIS has completed, | |
1328 | potentially leading to corrupted entries in the cache or TLB. | |
1329 | ||
fa0ce403 WD |
1330 | config PL310_ERRATA_753970 |
1331 | bool "PL310 errata: cache sync operation may be faulty" | |
885028e4 SK |
1332 | depends on CACHE_PL310 |
1333 | help | |
1334 | This option enables the workaround for the 753970 PL310 (r3p0) erratum. | |
1335 | ||
1336 | Under some condition the effect of cache sync operation on | |
1337 | the store buffer still remains when the operation completes. | |
1338 | This means that the store buffer is always asked to drain and | |
1339 | this prevents it from merging any further writes. The workaround | |
1340 | is to replace the normal offset of cache sync operation (0x730) | |
1341 | by another offset targeting an unmapped PL310 register 0x740. | |
1342 | This has the same effect as the cache sync operation: store buffer | |
1343 | drain and waiting for all buffers empty. | |
1344 | ||
fcbdc5fe WD |
1345 | config ARM_ERRATA_754322 |
1346 | bool "ARM errata: possible faulty MMU translations following an ASID switch" | |
1347 | depends on CPU_V7 | |
1348 | help | |
1349 | This option enables the workaround for the 754322 Cortex-A9 (r2p*, | |
1350 | r3p*) erratum. A speculative memory access may cause a page table walk | |
1351 | which starts prior to an ASID switch but completes afterwards. This | |
1352 | can populate the micro-TLB with a stale entry which may be hit with | |
1353 | the new ASID. This workaround places two dsb instructions in the mm | |
1354 | switching code so that no page table walks can cross the ASID switch. | |
1355 | ||
5dab26af WD |
1356 | config ARM_ERRATA_754327 |
1357 | bool "ARM errata: no automatic Store Buffer drain" | |
1358 | depends on CPU_V7 && SMP | |
1359 | help | |
1360 | This option enables the workaround for the 754327 Cortex-A9 (prior to | |
1361 | r2p0) erratum. The Store Buffer does not have any automatic draining | |
1362 | mechanism and therefore a livelock may occur if an external agent | |
1363 | continuously polls a memory location waiting to observe an update. | |
1364 | This workaround defines cpu_relax() as smp_mb(), preventing correctly | |
1365 | written polling loops from denying visibility of updates to memory. | |
1366 | ||
145e10e1 CM |
1367 | config ARM_ERRATA_364296 |
1368 | bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" | |
1369 | depends on CPU_V6 && !SMP | |
1370 | help | |
1371 | This options enables the workaround for the 364296 ARM1136 | |
1372 | r0p2 erratum (possible cache data corruption with | |
1373 | hit-under-miss enabled). It sets the undocumented bit 31 in | |
1374 | the auxiliary control register and the FI bit in the control | |
1375 | register, thus disabling hit-under-miss without putting the | |
1376 | processor into full low interrupt latency mode. ARM11MPCore | |
1377 | is not affected. | |
1378 | ||
f630c1bd WD |
1379 | config ARM_ERRATA_764369 |
1380 | bool "ARM errata: Data cache line maintenance operation by MVA may not succeed" | |
1381 | depends on CPU_V7 && SMP | |
1382 | help | |
1383 | This option enables the workaround for erratum 764369 | |
1384 | affecting Cortex-A9 MPCore with two or more processors (all | |
1385 | current revisions). Under certain timing circumstances, a data | |
1386 | cache line maintenance operation by MVA targeting an Inner | |
1387 | Shareable memory region may fail to proceed up to either the | |
1388 | Point of Coherency or to the Point of Unification of the | |
1389 | system. This workaround adds a DSB instruction before the | |
1390 | relevant cache maintenance functions and sets a specific bit | |
1391 | in the diagnostic control register of the SCU. | |
1392 | ||
11ed0ba1 WD |
1393 | config PL310_ERRATA_769419 |
1394 | bool "PL310 errata: no automatic Store Buffer drain" | |
1395 | depends on CACHE_L2X0 | |
1396 | help | |
1397 | On revisions of the PL310 prior to r3p2, the Store Buffer does | |
1398 | not automatically drain. This can cause normal, non-cacheable | |
1399 | writes to be retained when the memory system is idle, leading | |
1400 | to suboptimal I/O performance for drivers using coherent DMA. | |
1401 | This option adds a write barrier to the cpu_idle loop so that, | |
1402 | on systems with an outer cache, the store buffer is drained | |
1403 | explicitly. | |
1404 | ||
1da177e4 LT |
1405 | endmenu |
1406 | ||
1407 | source "arch/arm/common/Kconfig" | |
1408 | ||
1da177e4 LT |
1409 | menu "Bus support" |
1410 | ||
1411 | config ARM_AMBA | |
1412 | bool | |
1413 | ||
1414 | config ISA | |
1415 | bool | |
1da177e4 LT |
1416 | help |
1417 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1418 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1419 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1420 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1421 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1422 | ||
065909b9 | 1423 | # Select ISA DMA controller support |
1da177e4 LT |
1424 | config ISA_DMA |
1425 | bool | |
065909b9 | 1426 | select ISA_DMA_API |
1da177e4 | 1427 | |
065909b9 | 1428 | # Select ISA DMA interface |
5cae841b AV |
1429 | config ISA_DMA_API |
1430 | bool | |
5cae841b | 1431 | |
1da177e4 | 1432 | config PCI |
0b05da72 | 1433 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1434 | help |
1435 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1436 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1437 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1438 | VESA. If you have PCI, say Y, otherwise N. | |
1439 | ||
52882173 AV |
1440 | config PCI_DOMAINS |
1441 | bool | |
1442 | depends on PCI | |
1443 | ||
b080ac8a MRJ |
1444 | config PCI_NANOENGINE |
1445 | bool "BSE nanoEngine PCI support" | |
1446 | depends on SA1100_NANOENGINE | |
1447 | help | |
1448 | Enable PCI on the BSE nanoEngine board. | |
1449 | ||
36e23590 MW |
1450 | config PCI_SYSCALL |
1451 | def_bool PCI | |
1452 | ||
1da177e4 LT |
1453 | # Select the host bridge type |
1454 | config PCI_HOST_VIA82C505 | |
1455 | bool | |
1456 | depends on PCI && ARCH_SHARK | |
1457 | default y | |
1458 | ||
a0113a99 MR |
1459 | config PCI_HOST_ITE8152 |
1460 | bool | |
1461 | depends on PCI && MACH_ARMCORE | |
1462 | default y | |
1463 | select DMABOUNCE | |
1464 | ||
1da177e4 LT |
1465 | source "drivers/pci/Kconfig" |
1466 | ||
1467 | source "drivers/pcmcia/Kconfig" | |
1468 | ||
1469 | endmenu | |
1470 | ||
1471 | menu "Kernel Features" | |
1472 | ||
0567a0c0 KH |
1473 | source "kernel/time/Kconfig" |
1474 | ||
3b55658a DM |
1475 | config HAVE_SMP |
1476 | bool | |
1477 | help | |
1478 | This option should be selected by machines which have an SMP- | |
1479 | capable CPU. | |
1480 | ||
1481 | The only effect of this option is to make the SMP-related | |
1482 | options available to the user for configuration. | |
1483 | ||
1da177e4 | 1484 | config SMP |
bb2d8130 | 1485 | bool "Symmetric Multi-Processing" |
fbb4ddac | 1486 | depends on CPU_V6K || CPU_V7 |
bc28248e | 1487 | depends on GENERIC_CLOCKEVENTS |
3b55658a | 1488 | depends on HAVE_SMP |
9934ebb8 | 1489 | depends on MMU |
f6dd9fa5 | 1490 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1491 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1492 | help |
1493 | This enables support for systems with more than one CPU. If you have | |
1494 | a system with only one CPU, like most personal computers, say N. If | |
1495 | you have a system with more than one CPU, say Y. | |
1496 | ||
1497 | If you say N here, the kernel will run on single and multiprocessor | |
1498 | machines, but will use only one CPU of a multiprocessor machine. If | |
1499 | you say Y here, the kernel will run on many, but not all, single | |
1500 | processor machines. On a single processor machine, the kernel will | |
1501 | run faster if you say N here. | |
1502 | ||
395cf969 | 1503 | See also <file:Documentation/x86/i386/IO-APIC.txt>, |
1da177e4 | 1504 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1505 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1506 | |
1507 | If you don't know what to do here, say N. | |
1508 | ||
f00ec48f RK |
1509 | config SMP_ON_UP |
1510 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1511 | depends on EXPERIMENTAL | |
4d2692a7 | 1512 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1513 | default y |
1514 | help | |
1515 | SMP kernels contain instructions which fail on non-SMP processors. | |
1516 | Enabling this option allows the kernel to modify itself to make | |
1517 | these instructions safe. Disabling it allows about 1K of space | |
1518 | savings. | |
1519 | ||
1520 | If you don't know what to do here, say Y. | |
1521 | ||
c9018aab VG |
1522 | config ARM_CPU_TOPOLOGY |
1523 | bool "Support cpu topology definition" | |
1524 | depends on SMP && CPU_V7 | |
1525 | default y | |
1526 | help | |
1527 | Support ARM cpu topology definition. The MPIDR register defines | |
1528 | affinity between processors which is then used to describe the cpu | |
1529 | topology of an ARM System. | |
1530 | ||
1531 | config SCHED_MC | |
1532 | bool "Multi-core scheduler support" | |
1533 | depends on ARM_CPU_TOPOLOGY | |
1534 | help | |
1535 | Multi-core scheduler support improves the CPU scheduler's decision | |
1536 | making when dealing with multi-core CPU chips at a cost of slightly | |
1537 | increased overhead in some places. If unsure say N here. | |
1538 | ||
1539 | config SCHED_SMT | |
1540 | bool "SMT scheduler support" | |
1541 | depends on ARM_CPU_TOPOLOGY | |
1542 | help | |
1543 | Improves the CPU scheduler's decision making when dealing with | |
1544 | MultiThreading at a cost of slightly increased overhead in some | |
1545 | places. If unsure say N here. | |
1546 | ||
a8cbcd92 RK |
1547 | config HAVE_ARM_SCU |
1548 | bool | |
a8cbcd92 RK |
1549 | help |
1550 | This option enables support for the ARM system coherency unit | |
1551 | ||
f32f4ce2 RK |
1552 | config HAVE_ARM_TWD |
1553 | bool | |
1554 | depends on SMP | |
15095bb0 | 1555 | select TICK_ONESHOT |
f32f4ce2 RK |
1556 | help |
1557 | This options enables support for the ARM timer and watchdog unit | |
1558 | ||
8d5796d2 LB |
1559 | choice |
1560 | prompt "Memory split" | |
1561 | default VMSPLIT_3G | |
1562 | help | |
1563 | Select the desired split between kernel and user memory. | |
1564 | ||
1565 | If you are not absolutely sure what you are doing, leave this | |
1566 | option alone! | |
1567 | ||
1568 | config VMSPLIT_3G | |
1569 | bool "3G/1G user/kernel split" | |
1570 | config VMSPLIT_2G | |
1571 | bool "2G/2G user/kernel split" | |
1572 | config VMSPLIT_1G | |
1573 | bool "1G/3G user/kernel split" | |
1574 | endchoice | |
1575 | ||
1576 | config PAGE_OFFSET | |
1577 | hex | |
1578 | default 0x40000000 if VMSPLIT_1G | |
1579 | default 0x80000000 if VMSPLIT_2G | |
1580 | default 0xC0000000 | |
1581 | ||
1da177e4 LT |
1582 | config NR_CPUS |
1583 | int "Maximum number of CPUs (2-32)" | |
1584 | range 2 32 | |
1585 | depends on SMP | |
1586 | default "4" | |
1587 | ||
a054a811 RK |
1588 | config HOTPLUG_CPU |
1589 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1590 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
1591 | help | |
1592 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1593 | can be controlled through /sys/devices/system/cpu. | |
1594 | ||
37ee16ae RK |
1595 | config LOCAL_TIMERS |
1596 | bool "Use local timer interrupts" | |
971acb9b | 1597 | depends on SMP |
37ee16ae | 1598 | default y |
30d8bead | 1599 | select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT) |
37ee16ae RK |
1600 | help |
1601 | Enable support for local timers on SMP platforms, rather then the | |
1602 | legacy IPI broadcast method. Local timers allows the system | |
1603 | accounting to be spread across the timer interval, preventing a | |
1604 | "thundering herd" at every timer tick. | |
1605 | ||
44986ab0 PDSN |
1606 | config ARCH_NR_GPIO |
1607 | int | |
3dea19e8 | 1608 | default 1024 if ARCH_SHMOBILE || ARCH_TEGRA |
4f3f2582 | 1609 | default 350 if ARCH_U8500 |
44986ab0 PDSN |
1610 | default 0 |
1611 | help | |
1612 | Maximum number of GPIOs in the system. | |
1613 | ||
1614 | If unsure, leave the default value. | |
1615 | ||
d45a398f | 1616 | source kernel/Kconfig.preempt |
1da177e4 | 1617 | |
f8065813 RK |
1618 | config HZ |
1619 | int | |
49b7a491 | 1620 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
a73ddc61 | 1621 | ARCH_S5PV210 || ARCH_EXYNOS4 |
bfe65704 | 1622 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1623 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1624 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1625 | default 100 |
1626 | ||
16c79651 | 1627 | config THUMB2_KERNEL |
4a50bfe3 | 1628 | bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" |
e399b1a4 | 1629 | depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL |
16c79651 CM |
1630 | select AEABI |
1631 | select ARM_ASM_UNIFIED | |
89bace65 | 1632 | select ARM_UNWIND |
16c79651 CM |
1633 | help |
1634 | By enabling this option, the kernel will be compiled in | |
1635 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1636 | ARM-Thumb syntax is needed. | |
1637 | ||
1638 | If unsure, say N. | |
1639 | ||
6f685c5c DM |
1640 | config THUMB2_AVOID_R_ARM_THM_JUMP11 |
1641 | bool "Work around buggy Thumb-2 short branch relocations in gas" | |
1642 | depends on THUMB2_KERNEL && MODULES | |
1643 | default y | |
1644 | help | |
1645 | Various binutils versions can resolve Thumb-2 branches to | |
1646 | locally-defined, preemptible global symbols as short-range "b.n" | |
1647 | branch instructions. | |
1648 | ||
1649 | This is a problem, because there's no guarantee the final | |
1650 | destination of the symbol, or any candidate locations for a | |
1651 | trampoline, are within range of the branch. For this reason, the | |
1652 | kernel does not support fixing up the R_ARM_THM_JUMP11 (102) | |
1653 | relocation in modules at all, and it makes little sense to add | |
1654 | support. | |
1655 | ||
1656 | The symptom is that the kernel fails with an "unsupported | |
1657 | relocation" error when loading some modules. | |
1658 | ||
1659 | Until fixed tools are available, passing | |
1660 | -fno-optimize-sibling-calls to gcc should prevent gcc generating | |
1661 | code which hits this problem, at the cost of a bit of extra runtime | |
1662 | stack usage in some cases. | |
1663 | ||
1664 | The problem is described in more detail at: | |
1665 | https://bugs.launchpad.net/binutils-linaro/+bug/725126 | |
1666 | ||
1667 | Only Thumb-2 kernels are affected. | |
1668 | ||
1669 | Unless you are sure your tools don't have this problem, say Y. | |
1670 | ||
0becb088 CM |
1671 | config ARM_ASM_UNIFIED |
1672 | bool | |
1673 | ||
704bdda0 NP |
1674 | config AEABI |
1675 | bool "Use the ARM EABI to compile the kernel" | |
1676 | help | |
1677 | This option allows for the kernel to be compiled using the latest | |
1678 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1679 | space environment that is also compiled with EABI. | |
1680 | ||
1681 | Since there are major incompatibilities between the legacy ABI and | |
1682 | EABI, especially with regard to structure member alignment, this | |
1683 | option also changes the kernel syscall calling convention to | |
1684 | disambiguate both ABIs and allow for backward compatibility support | |
1685 | (selected with CONFIG_OABI_COMPAT). | |
1686 | ||
1687 | To use this you need GCC version 4.0.0 or later. | |
1688 | ||
6c90c872 | 1689 | config OABI_COMPAT |
a73a3ff1 | 1690 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
9bc433a1 | 1691 | depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL |
6c90c872 NP |
1692 | default y |
1693 | help | |
1694 | This option preserves the old syscall interface along with the | |
1695 | new (ARM EABI) one. It also provides a compatibility layer to | |
1696 | intercept syscalls that have structure arguments which layout | |
1697 | in memory differs between the legacy ABI and the new ARM EABI | |
1698 | (only for non "thumb" binaries). This option adds a tiny | |
1699 | overhead to all syscalls and produces a slightly larger kernel. | |
1700 | If you know you'll be using only pure EABI user space then you | |
1701 | can say N here. If this option is not selected and you attempt | |
1702 | to execute a legacy ABI binary then the result will be | |
1703 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1704 | at all). If in doubt say Y. | |
1705 | ||
eb33575c | 1706 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1707 | bool |
e80d6a24 | 1708 | |
05944d74 RK |
1709 | config ARCH_SPARSEMEM_ENABLE |
1710 | bool | |
1711 | ||
07a2f737 RK |
1712 | config ARCH_SPARSEMEM_DEFAULT |
1713 | def_bool ARCH_SPARSEMEM_ENABLE | |
1714 | ||
05944d74 | 1715 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1716 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1717 | |
7b7bf499 WD |
1718 | config HAVE_ARCH_PFN_VALID |
1719 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM | |
1720 | ||
053a96ca | 1721 | config HIGHMEM |
e8db89a2 RK |
1722 | bool "High Memory Support" |
1723 | depends on MMU | |
053a96ca NP |
1724 | help |
1725 | The address space of ARM processors is only 4 Gigabytes large | |
1726 | and it has to accommodate user address space, kernel address | |
1727 | space as well as some memory mapped IO. That means that, if you | |
1728 | have a large amount of physical memory and/or IO, not all of the | |
1729 | memory can be "permanently mapped" by the kernel. The physical | |
1730 | memory that is not permanently mapped is called "high memory". | |
1731 | ||
1732 | Depending on the selected kernel/user memory split, minimum | |
1733 | vmalloc space and actual amount of RAM, you may not need this | |
1734 | option which should result in a slightly faster kernel. | |
1735 | ||
1736 | If unsure, say n. | |
1737 | ||
65cec8e3 RK |
1738 | config HIGHPTE |
1739 | bool "Allocate 2nd-level pagetables from highmem" | |
1740 | depends on HIGHMEM | |
65cec8e3 | 1741 | |
1b8873a0 JI |
1742 | config HW_PERF_EVENTS |
1743 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1744 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1745 | default y |
1746 | help | |
1747 | Enable hardware performance counter support for perf events. If | |
1748 | disabled, perf events will use software events only. | |
1749 | ||
3f22ab27 DH |
1750 | source "mm/Kconfig" |
1751 | ||
c1b2d970 MD |
1752 | config FORCE_MAX_ZONEORDER |
1753 | int "Maximum zone order" if ARCH_SHMOBILE | |
1754 | range 11 64 if ARCH_SHMOBILE | |
1755 | default "9" if SA1111 | |
1756 | default "11" | |
1757 | help | |
1758 | The kernel memory allocator divides physically contiguous memory | |
1759 | blocks into "zones", where each zone is a power of two number of | |
1760 | pages. This option selects the largest power of two that the kernel | |
1761 | keeps in the memory allocator. If you need to allocate very large | |
1762 | blocks of physically contiguous memory, then you may need to | |
1763 | increase this value. | |
1764 | ||
1765 | This config option is actually maximum order plus one. For example, | |
1766 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1767 | ||
1da177e4 LT |
1768 | config LEDS |
1769 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1770 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1771 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1772 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1773 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1774 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1775 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1776 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1777 | help |
1778 | If you say Y here, the LEDs on your machine will be used | |
1779 | to provide useful information about your current system status. | |
1780 | ||
1781 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1782 | be able to select which LEDs are active using the options below. If | |
1783 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1784 | red LED will simply flash regularly to indicate that the system is | |
1785 | still functional. It is safe to say Y here if you have a CATS | |
1786 | system, but the driver will do nothing. | |
1787 | ||
1788 | config LEDS_TIMER | |
1789 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1790 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1791 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1792 | depends on LEDS |
0567a0c0 | 1793 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1794 | default y if ARCH_EBSA110 |
1795 | help | |
1796 | If you say Y here, one of the system LEDs (the green one on the | |
1797 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1798 | will flash regularly to indicate that the system is still | |
1799 | operational. This is mainly useful to kernel hackers who are | |
1800 | debugging unstable kernels. | |
1801 | ||
1802 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1803 | functions. You may choose to use both, but the Timer LED function | |
1804 | will overrule the CPU usage LED. | |
1805 | ||
1806 | config LEDS_CPU | |
1807 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1808 | !ARCH_OMAP) \ |
1809 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1810 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1811 | depends on LEDS |
1812 | help | |
1813 | If you say Y here, the red LED will be used to give a good real | |
1814 | time indication of CPU usage, by lighting whenever the idle task | |
1815 | is not currently executing. | |
1816 | ||
1817 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1818 | functions. You may choose to use both, but the Timer LED function | |
1819 | will overrule the CPU usage LED. | |
1820 | ||
1821 | config ALIGNMENT_TRAP | |
1822 | bool | |
f12d0d7c | 1823 | depends on CPU_CP15_MMU |
1da177e4 | 1824 | default y if !ARCH_EBSA110 |
e119bfff | 1825 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1826 | help |
84eb8d06 | 1827 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1828 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1829 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1830 | fetch/store instructions will be emulated in software if you say | |
1831 | here, which has a severe performance impact. This is necessary for | |
1832 | correct operation of some network protocols. With an IP-only | |
1833 | configuration it is safe to say N, otherwise say Y. | |
1834 | ||
39ec58f3 LB |
1835 | config UACCESS_WITH_MEMCPY |
1836 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1837 | depends on MMU && EXPERIMENTAL | |
1838 | default y if CPU_FEROCEON | |
1839 | help | |
1840 | Implement faster copy_to_user and clear_user methods for CPU | |
1841 | cores where a 8-word STM instruction give significantly higher | |
1842 | memory write throughput than a sequence of individual 32bit stores. | |
1843 | ||
1844 | A possible side effect is a slight increase in scheduling latency | |
1845 | between threads sharing the same address space if they invoke | |
1846 | such copy operations with large buffers. | |
1847 | ||
1848 | However, if the CPU data cache is using a write-allocate mode, | |
1849 | this option is unlikely to provide any performance gain. | |
1850 | ||
70c70d97 NP |
1851 | config SECCOMP |
1852 | bool | |
1853 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1854 | ---help--- | |
1855 | This kernel feature is useful for number crunching applications | |
1856 | that may need to compute untrusted bytecode during their | |
1857 | execution. By using pipes or other transports made available to | |
1858 | the process as file descriptors supporting the read/write | |
1859 | syscalls, it's possible to isolate those applications in | |
1860 | their own address space using seccomp. Once seccomp is | |
1861 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1862 | and the task is only allowed to execute a few safe syscalls | |
1863 | defined by each seccomp mode. | |
1864 | ||
c743f380 NP |
1865 | config CC_STACKPROTECTOR |
1866 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1867 | depends on EXPERIMENTAL |
c743f380 NP |
1868 | help |
1869 | This option turns on the -fstack-protector GCC feature. This | |
1870 | feature puts, at the beginning of functions, a canary value on | |
1871 | the stack just before the return address, and validates | |
1872 | the value just before actually returning. Stack based buffer | |
1873 | overflows (that need to overwrite this return address) now also | |
1874 | overwrite the canary, which gets detected and the attack is then | |
1875 | neutralized via a kernel panic. | |
1876 | This feature requires gcc version 4.2 or above. | |
1877 | ||
73a65b3f UKK |
1878 | config DEPRECATED_PARAM_STRUCT |
1879 | bool "Provide old way to pass kernel parameters" | |
1880 | help | |
1881 | This was deprecated in 2001 and announced to live on for 5 years. | |
1882 | Some old boot loaders still use this way. | |
1883 | ||
1da177e4 LT |
1884 | endmenu |
1885 | ||
1886 | menu "Boot options" | |
1887 | ||
9eb8f674 GL |
1888 | config USE_OF |
1889 | bool "Flattened Device Tree support" | |
1890 | select OF | |
1891 | select OF_EARLY_FLATTREE | |
08a543ad | 1892 | select IRQ_DOMAIN |
9eb8f674 GL |
1893 | help |
1894 | Include support for flattened device tree machine descriptions. | |
1895 | ||
1da177e4 LT |
1896 | # Compressed boot loader in ROM. Yes, we really want to ask about |
1897 | # TEXT and BSS so we preserve their values in the config files. | |
1898 | config ZBOOT_ROM_TEXT | |
1899 | hex "Compressed ROM boot loader base address" | |
1900 | default "0" | |
1901 | help | |
1902 | The physical address at which the ROM-able zImage is to be | |
1903 | placed in the target. Platforms which normally make use of | |
1904 | ROM-able zImage formats normally set this to a suitable | |
1905 | value in their defconfig file. | |
1906 | ||
1907 | If ZBOOT_ROM is not enabled, this has no effect. | |
1908 | ||
1909 | config ZBOOT_ROM_BSS | |
1910 | hex "Compressed ROM boot loader BSS address" | |
1911 | default "0" | |
1912 | help | |
f8c440b2 DF |
1913 | The base address of an area of read/write memory in the target |
1914 | for the ROM-able zImage which must be available while the | |
1915 | decompressor is running. It must be large enough to hold the | |
1916 | entire decompressed kernel plus an additional 128 KiB. | |
1917 | Platforms which normally make use of ROM-able zImage formats | |
1918 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1919 | |
1920 | If ZBOOT_ROM is not enabled, this has no effect. | |
1921 | ||
1922 | config ZBOOT_ROM | |
1923 | bool "Compressed boot loader in ROM/flash" | |
1924 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1925 | help | |
1926 | Say Y here if you intend to execute your compressed kernel image | |
1927 | (zImage) directly from ROM or flash. If unsure, say N. | |
1928 | ||
090ab3ff SH |
1929 | choice |
1930 | prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)" | |
1931 | depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL | |
1932 | default ZBOOT_ROM_NONE | |
1933 | help | |
1934 | Include experimental SD/MMC loading code in the ROM-able zImage. | |
1935 | With this enabled it is possible to write the the ROM-able zImage | |
1936 | kernel image to an MMC or SD card and boot the kernel straight | |
1937 | from the reset vector. At reset the processor Mask ROM will load | |
1938 | the first part of the the ROM-able zImage which in turn loads the | |
1939 | rest the kernel image to RAM. | |
1940 | ||
1941 | config ZBOOT_ROM_NONE | |
1942 | bool "No SD/MMC loader in zImage (EXPERIMENTAL)" | |
1943 | help | |
1944 | Do not load image from SD or MMC | |
1945 | ||
f45b1149 SH |
1946 | config ZBOOT_ROM_MMCIF |
1947 | bool "Include MMCIF loader in zImage (EXPERIMENTAL)" | |
f45b1149 | 1948 | help |
090ab3ff SH |
1949 | Load image from MMCIF hardware block. |
1950 | ||
1951 | config ZBOOT_ROM_SH_MOBILE_SDHI | |
1952 | bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)" | |
1953 | help | |
1954 | Load image from SDHI hardware block | |
1955 | ||
1956 | endchoice | |
f45b1149 | 1957 | |
e2a6a3aa JB |
1958 | config ARM_APPENDED_DTB |
1959 | bool "Use appended device tree blob to zImage (EXPERIMENTAL)" | |
1960 | depends on OF && !ZBOOT_ROM && EXPERIMENTAL | |
1961 | help | |
1962 | With this option, the boot code will look for a device tree binary | |
1963 | (DTB) appended to zImage | |
1964 | (e.g. cat zImage <filename>.dtb > zImage_w_dtb). | |
1965 | ||
1966 | This is meant as a backward compatibility convenience for those | |
1967 | systems with a bootloader that can't be upgraded to accommodate | |
1968 | the documented boot protocol using a device tree. | |
1969 | ||
1970 | Beware that there is very little in terms of protection against | |
1971 | this option being confused by leftover garbage in memory that might | |
1972 | look like a DTB header after a reboot if no actual DTB is appended | |
1973 | to zImage. Do not leave this option active in a production kernel | |
1974 | if you don't intend to always append a DTB. Proper passing of the | |
1975 | location into r2 of a bootloader provided DTB is always preferable | |
1976 | to this option. | |
1977 | ||
b90b9a38 NP |
1978 | config ARM_ATAG_DTB_COMPAT |
1979 | bool "Supplement the appended DTB with traditional ATAG information" | |
1980 | depends on ARM_APPENDED_DTB | |
1981 | help | |
1982 | Some old bootloaders can't be updated to a DTB capable one, yet | |
1983 | they provide ATAGs with memory configuration, the ramdisk address, | |
1984 | the kernel cmdline string, etc. Such information is dynamically | |
1985 | provided by the bootloader and can't always be stored in a static | |
1986 | DTB. To allow a device tree enabled kernel to be used with such | |
1987 | bootloaders, this option allows zImage to extract the information | |
1988 | from the ATAG list and store it at run time into the appended DTB. | |
1989 | ||
1da177e4 LT |
1990 | config CMDLINE |
1991 | string "Default kernel command string" | |
1992 | default "" | |
1993 | help | |
1994 | On some architectures (EBSA110 and CATS), there is currently no way | |
1995 | for the boot loader to pass arguments to the kernel. For these | |
1996 | architectures, you should supply some command-line options at build | |
1997 | time by entering them here. As a minimum, you should specify the | |
1998 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1999 | ||
4394c124 VB |
2000 | choice |
2001 | prompt "Kernel command line type" if CMDLINE != "" | |
2002 | default CMDLINE_FROM_BOOTLOADER | |
2003 | ||
2004 | config CMDLINE_FROM_BOOTLOADER | |
2005 | bool "Use bootloader kernel arguments if available" | |
2006 | help | |
2007 | Uses the command-line options passed by the boot loader. If | |
2008 | the boot loader doesn't provide any, the default kernel command | |
2009 | string provided in CMDLINE will be used. | |
2010 | ||
2011 | config CMDLINE_EXTEND | |
2012 | bool "Extend bootloader kernel arguments" | |
2013 | help | |
2014 | The command-line arguments provided by the boot loader will be | |
2015 | appended to the default kernel command string. | |
2016 | ||
92d2040d AH |
2017 | config CMDLINE_FORCE |
2018 | bool "Always use the default kernel command string" | |
92d2040d AH |
2019 | help |
2020 | Always use the default kernel command string, even if the boot | |
2021 | loader passes other arguments to the kernel. | |
2022 | This is useful if you cannot or don't want to change the | |
2023 | command-line options your boot loader passes to the kernel. | |
4394c124 | 2024 | endchoice |
92d2040d | 2025 | |
1da177e4 LT |
2026 | config XIP_KERNEL |
2027 | bool "Kernel Execute-In-Place from ROM" | |
497b7e94 | 2028 | depends on !ZBOOT_ROM && !ARM_LPAE |
1da177e4 LT |
2029 | help |
2030 | Execute-In-Place allows the kernel to run from non-volatile storage | |
2031 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
2032 | space since the text section of the kernel is not loaded from flash | |
2033 | to RAM. Read-write sections, such as the data section and stack, | |
2034 | are still copied to RAM. The XIP kernel is not compressed since | |
2035 | it has to run directly from flash, so it will take more space to | |
2036 | store it. The flash address used to link the kernel object files, | |
2037 | and for storing it, is configuration dependent. Therefore, if you | |
2038 | say Y here, you must know the proper physical address where to | |
2039 | store the kernel image depending on your own flash memory usage. | |
2040 | ||
2041 | Also note that the make target becomes "make xipImage" rather than | |
2042 | "make zImage" or "make Image". The final kernel binary to put in | |
2043 | ROM memory will be arch/arm/boot/xipImage. | |
2044 | ||
2045 | If unsure, say N. | |
2046 | ||
2047 | config XIP_PHYS_ADDR | |
2048 | hex "XIP Kernel Physical Location" | |
2049 | depends on XIP_KERNEL | |
2050 | default "0x00080000" | |
2051 | help | |
2052 | This is the physical address in your flash memory the kernel will | |
2053 | be linked for and stored to. This address is dependent on your | |
2054 | own flash usage. | |
2055 | ||
c587e4a6 RP |
2056 | config KEXEC |
2057 | bool "Kexec system call (EXPERIMENTAL)" | |
02b73e2e | 2058 | depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) |
c587e4a6 RP |
2059 | help |
2060 | kexec is a system call that implements the ability to shutdown your | |
2061 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 2062 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
2063 | you can start any kernel with it, not just Linux. |
2064 | ||
2065 | It is an ongoing process to be certain the hardware in a machine | |
2066 | is properly shutdown, so do not be surprised if this code does not | |
2067 | initially work for you. It may help to enable device hotplugging | |
2068 | support. | |
2069 | ||
4cd9d6f7 RP |
2070 | config ATAGS_PROC |
2071 | bool "Export atags in procfs" | |
b98d7291 UL |
2072 | depends on KEXEC |
2073 | default y | |
4cd9d6f7 RP |
2074 | help |
2075 | Should the atags used to boot the kernel be exported in an "atags" | |
2076 | file in procfs. Useful with kexec. | |
2077 | ||
cb5d39b3 MW |
2078 | config CRASH_DUMP |
2079 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
2080 | depends on EXPERIMENTAL | |
2081 | help | |
2082 | Generate crash dump after being started by kexec. This should | |
2083 | be normally only set in special crash dump kernels which are | |
2084 | loaded in the main kernel with kexec-tools into a specially | |
2085 | reserved region and then later executed after a crash by | |
2086 | kdump/kexec. The crash dump kernel must be compiled to a | |
2087 | memory address not used by the main kernel | |
2088 | ||
2089 | For more details see Documentation/kdump/kdump.txt | |
2090 | ||
e69edc79 EM |
2091 | config AUTO_ZRELADDR |
2092 | bool "Auto calculation of the decompressed kernel image address" | |
2093 | depends on !ZBOOT_ROM && !ARCH_U300 | |
2094 | help | |
2095 | ZRELADDR is the physical address where the decompressed kernel | |
2096 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
2097 | will be determined at run-time by masking the current IP with | |
2098 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
2099 | from start of memory. | |
2100 | ||
1da177e4 LT |
2101 | endmenu |
2102 | ||
ac9d7efc | 2103 | menu "CPU Power Management" |
1da177e4 | 2104 | |
89c52ed4 | 2105 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
2106 | |
2107 | source "drivers/cpufreq/Kconfig" | |
2108 | ||
64f102b6 YS |
2109 | config CPU_FREQ_IMX |
2110 | tristate "CPUfreq driver for i.MX CPUs" | |
2111 | depends on ARCH_MXC && CPU_FREQ | |
2112 | help | |
2113 | This enables the CPUfreq driver for i.MX CPUs. | |
2114 | ||
1da177e4 LT |
2115 | config CPU_FREQ_SA1100 |
2116 | bool | |
1da177e4 LT |
2117 | |
2118 | config CPU_FREQ_SA1110 | |
2119 | bool | |
1da177e4 LT |
2120 | |
2121 | config CPU_FREQ_INTEGRATOR | |
2122 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
2123 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
2124 | default y | |
2125 | help | |
2126 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
2127 | ||
2128 | For details, take a look at <file:Documentation/cpu-freq>. | |
2129 | ||
2130 | If in doubt, say Y. | |
2131 | ||
9e2697ff RK |
2132 | config CPU_FREQ_PXA |
2133 | bool | |
2134 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
2135 | default y | |
ca7d156e | 2136 | select CPU_FREQ_TABLE |
9e2697ff RK |
2137 | select CPU_FREQ_DEFAULT_GOV_USERSPACE |
2138 | ||
9d56c02a BD |
2139 | config CPU_FREQ_S3C |
2140 | bool | |
2141 | help | |
2142 | Internal configuration node for common cpufreq on Samsung SoC | |
2143 | ||
2144 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 2145 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
9d56c02a BD |
2146 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL |
2147 | select CPU_FREQ_S3C | |
2148 | help | |
2149 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
2150 | of CPUs. | |
2151 | ||
2152 | For details, take a look at <file:Documentation/cpu-freq>. | |
2153 | ||
2154 | If in doubt, say N. | |
2155 | ||
2156 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 2157 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
2158 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
2159 | help | |
2160 | Compile in support for changing the PLL frequency from the | |
2161 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
2162 | after a frequency change, so by default it is not enabled. | |
2163 | ||
2164 | This also means that the PLL tables for the selected CPU(s) will | |
2165 | be built which may increase the size of the kernel image. | |
2166 | ||
2167 | config CPU_FREQ_S3C24XX_DEBUG | |
2168 | bool "Debug CPUfreq Samsung driver core" | |
2169 | depends on CPU_FREQ_S3C24XX | |
2170 | help | |
2171 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
2172 | ||
2173 | config CPU_FREQ_S3C24XX_IODEBUG | |
2174 | bool "Debug CPUfreq Samsung driver IO timing" | |
2175 | depends on CPU_FREQ_S3C24XX | |
2176 | help | |
2177 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
2178 | ||
e6d197a6 BD |
2179 | config CPU_FREQ_S3C24XX_DEBUGFS |
2180 | bool "Export debugfs for CPUFreq" | |
2181 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
2182 | help | |
2183 | Export status information via debugfs. | |
2184 | ||
1da177e4 LT |
2185 | endif |
2186 | ||
ac9d7efc RK |
2187 | source "drivers/cpuidle/Kconfig" |
2188 | ||
2189 | endmenu | |
2190 | ||
1da177e4 LT |
2191 | menu "Floating point emulation" |
2192 | ||
2193 | comment "At least one emulation must be selected" | |
2194 | ||
2195 | config FPE_NWFPE | |
2196 | bool "NWFPE math emulation" | |
593c252a | 2197 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
2198 | ---help--- |
2199 | Say Y to include the NWFPE floating point emulator in the kernel. | |
2200 | This is necessary to run most binaries. Linux does not currently | |
2201 | support floating point hardware so you need to say Y here even if | |
2202 | your machine has an FPA or floating point co-processor podule. | |
2203 | ||
2204 | You may say N here if you are going to load the Acorn FPEmulator | |
2205 | early in the bootup. | |
2206 | ||
2207 | config FPE_NWFPE_XP | |
2208 | bool "Support extended precision" | |
bedf142b | 2209 | depends on FPE_NWFPE |
1da177e4 LT |
2210 | help |
2211 | Say Y to include 80-bit support in the kernel floating-point | |
2212 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
2213 | Note that gcc does not generate 80-bit operations by default, | |
2214 | so in most cases this option only enlarges the size of the | |
2215 | floating point emulator without any good reason. | |
2216 | ||
2217 | You almost surely want to say N here. | |
2218 | ||
2219 | config FPE_FASTFPE | |
2220 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 2221 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
2222 | ---help--- |
2223 | Say Y here to include the FAST floating point emulator in the kernel. | |
2224 | This is an experimental much faster emulator which now also has full | |
2225 | precision for the mantissa. It does not support any exceptions. | |
2226 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
2227 | ||
2228 | It should be sufficient for most programs. It may be not suitable | |
2229 | for scientific calculations, but you have to check this for yourself. | |
2230 | If you do not feel you need a faster FP emulation you should better | |
2231 | choose NWFPE. | |
2232 | ||
2233 | config VFP | |
2234 | bool "VFP-format floating point maths" | |
e399b1a4 | 2235 | depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
2236 | help |
2237 | Say Y to include VFP support code in the kernel. This is needed | |
2238 | if your hardware includes a VFP unit. | |
2239 | ||
2240 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
2241 | release notes and additional status information. | |
2242 | ||
2243 | Say N if your target does not have VFP hardware. | |
2244 | ||
25ebee02 CM |
2245 | config VFPv3 |
2246 | bool | |
2247 | depends on VFP | |
2248 | default y if CPU_V7 | |
2249 | ||
b5872db4 CM |
2250 | config NEON |
2251 | bool "Advanced SIMD (NEON) Extension support" | |
2252 | depends on VFPv3 && CPU_V7 | |
2253 | help | |
2254 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
2255 | Extension. | |
2256 | ||
1da177e4 LT |
2257 | endmenu |
2258 | ||
2259 | menu "Userspace binary formats" | |
2260 | ||
2261 | source "fs/Kconfig.binfmt" | |
2262 | ||
2263 | config ARTHUR | |
2264 | tristate "RISC OS personality" | |
704bdda0 | 2265 | depends on !AEABI |
1da177e4 LT |
2266 | help |
2267 | Say Y here to include the kernel code necessary if you want to run | |
2268 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
2269 | experimental; if this sounds frightening, say N and sleep in peace. | |
2270 | You can also say M here to compile this support as a module (which | |
2271 | will be called arthur). | |
2272 | ||
2273 | endmenu | |
2274 | ||
2275 | menu "Power management options" | |
2276 | ||
eceab4ac | 2277 | source "kernel/power/Kconfig" |
1da177e4 | 2278 | |
f4cb5700 | 2279 | config ARCH_SUSPEND_POSSIBLE |
6b6844dd | 2280 | depends on !ARCH_S5PC100 |
6a786182 RK |
2281 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ |
2282 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE | |
f4cb5700 JB |
2283 | def_bool y |
2284 | ||
15e0d9e3 AB |
2285 | config ARM_CPU_SUSPEND |
2286 | def_bool PM_SLEEP | |
2287 | ||
1da177e4 LT |
2288 | endmenu |
2289 | ||
d5950b43 SR |
2290 | source "net/Kconfig" |
2291 | ||
ac25150f | 2292 | source "drivers/Kconfig" |
1da177e4 LT |
2293 | |
2294 | source "fs/Kconfig" | |
2295 | ||
1da177e4 LT |
2296 | source "arch/arm/Kconfig.debug" |
2297 | ||
2298 | source "security/Kconfig" | |
2299 | ||
2300 | source "crypto/Kconfig" | |
2301 | ||
2302 | source "lib/Kconfig" |