Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
2064c946 | 5 | select HAVE_IDE |
2778f620 | 6 | select HAVE_MEMBLOCK |
12b824fb | 7 | select RTC_LIB |
75e7153a | 8 | select SYS_SUPPORTS_APM_EMULATION |
d4c7b1f9 | 9 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
fe166148 | 10 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 11 | select HAVE_ARCH_KGDB |
3f550096 | 12 | select HAVE_KPROBES if (!XIP_KERNEL) |
9edddaa2 | 13 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 14 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
15 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
16 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 17 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 18 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
19 | select HAVE_KERNEL_GZIP |
20 | select HAVE_KERNEL_LZO | |
6e8699f7 | 21 | select HAVE_KERNEL_LZMA |
e360adbe | 22 | select HAVE_IRQ_WORK |
7ada189f JI |
23 | select HAVE_PERF_EVENTS |
24 | select PERF_USE_VMALLOC | |
e513f8bf | 25 | select HAVE_REGS_AND_STACK_ACCESS_API |
19852e59 | 26 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
1da177e4 LT |
27 | help |
28 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 29 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 30 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 31 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
32 | Europe. There is an ARM Linux project with a web page at |
33 | <http://www.arm.linux.org.uk/>. | |
34 | ||
1a189b97 RK |
35 | config HAVE_PWM |
36 | bool | |
37 | ||
75e7153a RB |
38 | config SYS_SUPPORTS_APM_EMULATION |
39 | bool | |
40 | ||
0a938b97 DB |
41 | config GENERIC_GPIO |
42 | bool | |
0a938b97 | 43 | |
5cfc8ee0 JS |
44 | config ARCH_USES_GETTIMEOFFSET |
45 | bool | |
46 | default n | |
746140c7 | 47 | |
0567a0c0 KH |
48 | config GENERIC_CLOCKEVENTS |
49 | bool | |
0567a0c0 | 50 | |
a8655e83 CM |
51 | config GENERIC_CLOCKEVENTS_BROADCAST |
52 | bool | |
53 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 54 | default y if SMP |
a8655e83 | 55 | |
bc581770 LW |
56 | config HAVE_TCM |
57 | bool | |
58 | select GENERIC_ALLOCATOR | |
59 | ||
e119bfff RK |
60 | config HAVE_PROC_CPU |
61 | bool | |
62 | ||
5ea81769 AV |
63 | config NO_IOPORT |
64 | bool | |
5ea81769 | 65 | |
1da177e4 LT |
66 | config EISA |
67 | bool | |
68 | ---help--- | |
69 | The Extended Industry Standard Architecture (EISA) bus was | |
70 | developed as an open alternative to the IBM MicroChannel bus. | |
71 | ||
72 | The EISA bus provided some of the features of the IBM MicroChannel | |
73 | bus while maintaining backward compatibility with cards made for | |
74 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
75 | 1995 when it was made obsolete by the PCI bus. | |
76 | ||
77 | Say Y here if you are building a kernel for an EISA-based machine. | |
78 | ||
79 | Otherwise, say N. | |
80 | ||
81 | config SBUS | |
82 | bool | |
83 | ||
84 | config MCA | |
85 | bool | |
86 | help | |
87 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
88 | laptops. It is a bus system similar to PCI or ISA. See | |
89 | <file:Documentation/mca.txt> (and especially the web page given | |
90 | there) before attempting to build an MCA bus kernel. | |
91 | ||
4a2581a0 TG |
92 | config GENERIC_HARDIRQS |
93 | bool | |
94 | default y | |
95 | ||
f16fb1ec RK |
96 | config STACKTRACE_SUPPORT |
97 | bool | |
98 | default y | |
99 | ||
f76e9154 NP |
100 | config HAVE_LATENCYTOP_SUPPORT |
101 | bool | |
102 | depends on !SMP | |
103 | default y | |
104 | ||
f16fb1ec RK |
105 | config LOCKDEP_SUPPORT |
106 | bool | |
107 | default y | |
108 | ||
7ad1bcb2 RK |
109 | config TRACE_IRQFLAGS_SUPPORT |
110 | bool | |
111 | default y | |
112 | ||
4a2581a0 TG |
113 | config HARDIRQS_SW_RESEND |
114 | bool | |
115 | default y | |
116 | ||
117 | config GENERIC_IRQ_PROBE | |
118 | bool | |
119 | default y | |
120 | ||
95c354fe NP |
121 | config GENERIC_LOCKBREAK |
122 | bool | |
123 | default y | |
124 | depends on SMP && PREEMPT | |
125 | ||
1da177e4 LT |
126 | config RWSEM_GENERIC_SPINLOCK |
127 | bool | |
128 | default y | |
129 | ||
130 | config RWSEM_XCHGADD_ALGORITHM | |
131 | bool | |
132 | ||
f0d1b0b3 DH |
133 | config ARCH_HAS_ILOG2_U32 |
134 | bool | |
f0d1b0b3 DH |
135 | |
136 | config ARCH_HAS_ILOG2_U64 | |
137 | bool | |
f0d1b0b3 | 138 | |
89c52ed4 BD |
139 | config ARCH_HAS_CPUFREQ |
140 | bool | |
141 | help | |
142 | Internal node to signify that the ARCH has CPUFREQ support | |
143 | and that the relevant menu configurations are displayed for | |
144 | it. | |
145 | ||
c7b0aff4 KH |
146 | config ARCH_HAS_CPU_IDLE_WAIT |
147 | def_bool y | |
148 | ||
b89c3b16 AM |
149 | config GENERIC_HWEIGHT |
150 | bool | |
151 | default y | |
152 | ||
1da177e4 LT |
153 | config GENERIC_CALIBRATE_DELAY |
154 | bool | |
155 | default y | |
156 | ||
a08b6b79 Z |
157 | config ARCH_MAY_HAVE_PC_FDC |
158 | bool | |
159 | ||
5ac6da66 CL |
160 | config ZONE_DMA |
161 | bool | |
5ac6da66 | 162 | |
ccd7ab7f FT |
163 | config NEED_DMA_MAP_STATE |
164 | def_bool y | |
165 | ||
1da177e4 LT |
166 | config GENERIC_ISA_DMA |
167 | bool | |
168 | ||
1da177e4 LT |
169 | config FIQ |
170 | bool | |
171 | ||
034d2f5a AV |
172 | config ARCH_MTD_XIP |
173 | bool | |
174 | ||
60a752ef | 175 | config GENERIC_HARDIRQS_NO__DO_IRQ |
60a752ef PZ |
176 | def_bool y |
177 | ||
d6d502fa KK |
178 | config ARM_L1_CACHE_SHIFT_6 |
179 | bool | |
180 | help | |
181 | Setting ARM L1 cache line size to 64 Bytes. | |
182 | ||
c760fc19 HC |
183 | config VECTORS_BASE |
184 | hex | |
6afd6fae | 185 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
186 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
187 | default 0x00000000 | |
188 | help | |
189 | The base address of exception vectors. | |
190 | ||
1da177e4 LT |
191 | source "init/Kconfig" |
192 | ||
dc52ddc0 MH |
193 | source "kernel/Kconfig.freezer" |
194 | ||
1da177e4 LT |
195 | menu "System Type" |
196 | ||
3c427975 HC |
197 | config MMU |
198 | bool "MMU-based Paged Memory Management Support" | |
199 | default y | |
200 | help | |
201 | Select if you want MMU-based virtualised addressing space | |
202 | support by paged memory management. If unsure, say 'Y'. | |
203 | ||
ccf50e23 RK |
204 | # |
205 | # The "ARM system type" choice list is ordered alphabetically by option | |
206 | # text. Please add new entries in the option alphabetic order. | |
207 | # | |
1da177e4 LT |
208 | choice |
209 | prompt "ARM system type" | |
6a0e2430 | 210 | default ARCH_VERSATILE |
1da177e4 | 211 | |
4af6fee1 DS |
212 | config ARCH_AAEC2000 |
213 | bool "Agilent AAEC-2000 based" | |
c750815e | 214 | select CPU_ARM920T |
4af6fee1 | 215 | select ARM_AMBA |
9483a578 | 216 | select HAVE_CLK |
5cfc8ee0 | 217 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
218 | help |
219 | This enables support for systems based on the Agilent AAEC-2000 | |
220 | ||
221 | config ARCH_INTEGRATOR | |
222 | bool "ARM Ltd. Integrator family" | |
223 | select ARM_AMBA | |
89c52ed4 | 224 | select ARCH_HAS_CPUFREQ |
d72fbdf0 | 225 | select COMMON_CLKDEV |
c5a0adb5 | 226 | select ICST |
13edd86d | 227 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 228 | select PLAT_VERSATILE |
4af6fee1 DS |
229 | help |
230 | Support for ARM's Integrator platform. | |
231 | ||
232 | config ARCH_REALVIEW | |
233 | bool "ARM Ltd. RealView family" | |
234 | select ARM_AMBA | |
cf30fb4a | 235 | select COMMON_CLKDEV |
c5a0adb5 | 236 | select ICST |
ae30ceac | 237 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 238 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 239 | select PLAT_VERSATILE |
e3887714 | 240 | select ARM_TIMER_SP804 |
b56ba8aa | 241 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
242 | help |
243 | This enables support for ARM Ltd RealView boards. | |
244 | ||
245 | config ARCH_VERSATILE | |
246 | bool "ARM Ltd. Versatile family" | |
247 | select ARM_AMBA | |
248 | select ARM_VIC | |
71a06da0 | 249 | select COMMON_CLKDEV |
c5a0adb5 | 250 | select ICST |
89df1272 | 251 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 252 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 253 | select PLAT_VERSATILE |
e3887714 | 254 | select ARM_TIMER_SP804 |
4af6fee1 DS |
255 | help |
256 | This enables support for ARM Ltd Versatile board. | |
257 | ||
ceade897 RK |
258 | config ARCH_VEXPRESS |
259 | bool "ARM Ltd. Versatile Express family" | |
260 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
261 | select ARM_AMBA | |
262 | select ARM_TIMER_SP804 | |
263 | select COMMON_CLKDEV | |
264 | select GENERIC_CLOCKEVENTS | |
ceade897 RK |
265 | select HAVE_CLK |
266 | select ICST | |
267 | select PLAT_VERSATILE | |
268 | help | |
269 | This enables support for the ARM Ltd Versatile Express boards. | |
270 | ||
8fc5ffa0 AV |
271 | config ARCH_AT91 |
272 | bool "Atmel AT91" | |
f373e8c0 | 273 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 274 | select HAVE_CLK |
4af6fee1 | 275 | help |
2b3b3516 AV |
276 | This enables support for systems based on the Atmel AT91RM9200, |
277 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 278 | |
ccf50e23 RK |
279 | config ARCH_BCMRING |
280 | bool "Broadcom BCMRING" | |
281 | depends on MMU | |
282 | select CPU_V6 | |
283 | select ARM_AMBA | |
284 | select COMMON_CLKDEV | |
ccf50e23 RK |
285 | select GENERIC_CLOCKEVENTS |
286 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
287 | help | |
288 | Support for Broadcom's BCMRing platform. | |
289 | ||
1da177e4 | 290 | config ARCH_CLPS711X |
4af6fee1 | 291 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 292 | select CPU_ARM720T |
5cfc8ee0 | 293 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
294 | help |
295 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 296 | |
d94f944e AV |
297 | config ARCH_CNS3XXX |
298 | bool "Cavium Networks CNS3XXX family" | |
299 | select CPU_V6 | |
d94f944e AV |
300 | select GENERIC_CLOCKEVENTS |
301 | select ARM_GIC | |
5f32f7a0 | 302 | select PCI_DOMAINS if PCI |
d94f944e AV |
303 | help |
304 | Support for Cavium Networks CNS3XXX platform. | |
305 | ||
788c9700 RK |
306 | config ARCH_GEMINI |
307 | bool "Cortina Systems Gemini" | |
308 | select CPU_FA526 | |
788c9700 | 309 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 310 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
311 | help |
312 | Support for the Cortina Systems Gemini family SoCs | |
313 | ||
1da177e4 LT |
314 | config ARCH_EBSA110 |
315 | bool "EBSA-110" | |
c750815e | 316 | select CPU_SA110 |
f7e68bbf | 317 | select ISA |
c5eb2a2b | 318 | select NO_IOPORT |
5cfc8ee0 | 319 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
320 | help |
321 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 322 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
323 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
324 | parallel port. | |
325 | ||
e7736d47 LB |
326 | config ARCH_EP93XX |
327 | bool "EP93xx-based" | |
c750815e | 328 | select CPU_ARM920T |
e7736d47 LB |
329 | select ARM_AMBA |
330 | select ARM_VIC | |
ae696fd5 | 331 | select COMMON_CLKDEV |
7444a72e | 332 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 333 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 334 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
335 | help |
336 | This enables support for the Cirrus EP93xx series of CPUs. | |
337 | ||
1da177e4 LT |
338 | config ARCH_FOOTBRIDGE |
339 | bool "FootBridge" | |
c750815e | 340 | select CPU_SA110 |
1da177e4 | 341 | select FOOTBRIDGE |
5cfc8ee0 | 342 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
343 | help |
344 | Support for systems based on the DC21285 companion chip | |
345 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 346 | |
788c9700 RK |
347 | config ARCH_MXC |
348 | bool "Freescale MXC/iMX-based" | |
788c9700 | 349 | select GENERIC_CLOCKEVENTS |
788c9700 | 350 | select ARCH_REQUIRE_GPIOLIB |
03e09cd8 | 351 | select COMMON_CLKDEV |
788c9700 RK |
352 | help |
353 | Support for Freescale MXC/iMX-based family of processors | |
354 | ||
7bd0f2f5 | 355 | config ARCH_STMP3XXX |
356 | bool "Freescale STMP3xxx" | |
357 | select CPU_ARM926T | |
7bd0f2f5 | 358 | select COMMON_CLKDEV |
359 | select ARCH_REQUIRE_GPIOLIB | |
7bd0f2f5 | 360 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 361 | select USB_ARCH_HAS_EHCI |
362 | help | |
363 | Support for systems based on the Freescale 3xxx CPUs. | |
364 | ||
4af6fee1 DS |
365 | config ARCH_NETX |
366 | bool "Hilscher NetX based" | |
c750815e | 367 | select CPU_ARM926T |
4af6fee1 | 368 | select ARM_VIC |
2fcfe6b8 | 369 | select GENERIC_CLOCKEVENTS |
f999b8bd | 370 | help |
4af6fee1 DS |
371 | This enables support for systems based on the Hilscher NetX Soc |
372 | ||
373 | config ARCH_H720X | |
374 | bool "Hynix HMS720x-based" | |
c750815e | 375 | select CPU_ARM720T |
4af6fee1 | 376 | select ISA_DMA_API |
5cfc8ee0 | 377 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
378 | help |
379 | This enables support for systems based on the Hynix HMS720x | |
380 | ||
3b938be6 RK |
381 | config ARCH_IOP13XX |
382 | bool "IOP13xx-based" | |
383 | depends on MMU | |
c750815e | 384 | select CPU_XSC3 |
3b938be6 RK |
385 | select PLAT_IOP |
386 | select PCI | |
387 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 388 | select VMSPLIT_1G |
3b938be6 RK |
389 | help |
390 | Support for Intel's IOP13XX (XScale) family of processors. | |
391 | ||
3f7e5815 LB |
392 | config ARCH_IOP32X |
393 | bool "IOP32x-based" | |
a4f7e763 | 394 | depends on MMU |
c750815e | 395 | select CPU_XSCALE |
7ae1f7ec | 396 | select PLAT_IOP |
f7e68bbf | 397 | select PCI |
bb2b180c | 398 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 399 | help |
3f7e5815 LB |
400 | Support for Intel's 80219 and IOP32X (XScale) family of |
401 | processors. | |
402 | ||
403 | config ARCH_IOP33X | |
404 | bool "IOP33x-based" | |
405 | depends on MMU | |
c750815e | 406 | select CPU_XSCALE |
7ae1f7ec | 407 | select PLAT_IOP |
3f7e5815 | 408 | select PCI |
bb2b180c | 409 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
410 | help |
411 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 412 | |
3b938be6 RK |
413 | config ARCH_IXP23XX |
414 | bool "IXP23XX-based" | |
a4f7e763 | 415 | depends on MMU |
c750815e | 416 | select CPU_XSC3 |
3b938be6 | 417 | select PCI |
5cfc8ee0 | 418 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 419 | help |
3b938be6 | 420 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
421 | |
422 | config ARCH_IXP2000 | |
423 | bool "IXP2400/2800-based" | |
a4f7e763 | 424 | depends on MMU |
c750815e | 425 | select CPU_XSCALE |
f7e68bbf | 426 | select PCI |
5cfc8ee0 | 427 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
428 | help |
429 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 430 | |
3b938be6 RK |
431 | config ARCH_IXP4XX |
432 | bool "IXP4xx-based" | |
a4f7e763 | 433 | depends on MMU |
c750815e | 434 | select CPU_XSCALE |
8858e9af | 435 | select GENERIC_GPIO |
3b938be6 | 436 | select GENERIC_CLOCKEVENTS |
485bdde7 | 437 | select DMABOUNCE if PCI |
c4713074 | 438 | help |
3b938be6 | 439 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 440 | |
edabd38e SB |
441 | config ARCH_DOVE |
442 | bool "Marvell Dove" | |
443 | select PCI | |
edabd38e | 444 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
445 | select GENERIC_CLOCKEVENTS |
446 | select PLAT_ORION | |
447 | help | |
448 | Support for the Marvell Dove SoC 88AP510 | |
449 | ||
651c74c7 SB |
450 | config ARCH_KIRKWOOD |
451 | bool "Marvell Kirkwood" | |
c750815e | 452 | select CPU_FEROCEON |
651c74c7 | 453 | select PCI |
a8865655 | 454 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
455 | select GENERIC_CLOCKEVENTS |
456 | select PLAT_ORION | |
457 | help | |
458 | Support for the following Marvell Kirkwood series SoCs: | |
459 | 88F6180, 88F6192 and 88F6281. | |
460 | ||
777f9beb LB |
461 | config ARCH_LOKI |
462 | bool "Marvell Loki (88RC8480)" | |
c750815e | 463 | select CPU_FEROCEON |
777f9beb LB |
464 | select GENERIC_CLOCKEVENTS |
465 | select PLAT_ORION | |
466 | help | |
467 | Support for the Marvell Loki (88RC8480) SoC. | |
468 | ||
40805949 KW |
469 | config ARCH_LPC32XX |
470 | bool "NXP LPC32XX" | |
471 | select CPU_ARM926T | |
472 | select ARCH_REQUIRE_GPIOLIB | |
473 | select HAVE_IDE | |
474 | select ARM_AMBA | |
475 | select USB_ARCH_HAS_OHCI | |
476 | select COMMON_CLKDEV | |
477 | select GENERIC_TIME | |
478 | select GENERIC_CLOCKEVENTS | |
479 | help | |
480 | Support for the NXP LPC32XX family of processors | |
481 | ||
794d15b2 SS |
482 | config ARCH_MV78XX0 |
483 | bool "Marvell MV78xx0" | |
c750815e | 484 | select CPU_FEROCEON |
794d15b2 | 485 | select PCI |
a8865655 | 486 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
487 | select GENERIC_CLOCKEVENTS |
488 | select PLAT_ORION | |
489 | help | |
490 | Support for the following Marvell MV78xx0 series SoCs: | |
491 | MV781x0, MV782x0. | |
492 | ||
9dd0b194 | 493 | config ARCH_ORION5X |
585cf175 TP |
494 | bool "Marvell Orion" |
495 | depends on MMU | |
c750815e | 496 | select CPU_FEROCEON |
038ee083 | 497 | select PCI |
a8865655 | 498 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 499 | select GENERIC_CLOCKEVENTS |
69b02f6a | 500 | select PLAT_ORION |
585cf175 | 501 | help |
9dd0b194 | 502 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 503 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 504 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 505 | |
788c9700 | 506 | config ARCH_MMP |
2f7e8fae | 507 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 508 | depends on MMU |
788c9700 | 509 | select ARCH_REQUIRE_GPIOLIB |
788c9700 | 510 | select COMMON_CLKDEV |
788c9700 RK |
511 | select GENERIC_CLOCKEVENTS |
512 | select TICK_ONESHOT | |
513 | select PLAT_PXA | |
0bd86961 | 514 | select SPARSE_IRQ |
788c9700 | 515 | help |
2f7e8fae | 516 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
517 | |
518 | config ARCH_KS8695 | |
519 | bool "Micrel/Kendin KS8695" | |
520 | select CPU_ARM922T | |
98830bc9 | 521 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 522 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
523 | help |
524 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
525 | System-on-Chip devices. | |
526 | ||
527 | config ARCH_NS9XXX | |
528 | bool "NetSilicon NS9xxx" | |
529 | select CPU_ARM926T | |
530 | select GENERIC_GPIO | |
788c9700 RK |
531 | select GENERIC_CLOCKEVENTS |
532 | select HAVE_CLK | |
533 | help | |
534 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
535 | System. | |
536 | ||
537 | <http://www.digi.com/products/microprocessors/index.jsp> | |
538 | ||
539 | config ARCH_W90X900 | |
540 | bool "Nuvoton W90X900 CPU" | |
541 | select CPU_ARM926T | |
c52d3d68 | 542 | select ARCH_REQUIRE_GPIOLIB |
0e4a34bb | 543 | select COMMON_CLKDEV |
58b5369e | 544 | select GENERIC_CLOCKEVENTS |
788c9700 | 545 | help |
a8bc4ead | 546 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
547 | At present, the w90x900 has been renamed nuc900, regarding | |
548 | the ARM series product line, you can login the following | |
549 | link address to know more. | |
550 | ||
551 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
552 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 553 | |
a62e9030 | 554 | config ARCH_NUC93X |
555 | bool "Nuvoton NUC93X CPU" | |
556 | select CPU_ARM926T | |
a62e9030 | 557 | select COMMON_CLKDEV |
558 | help | |
559 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
560 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
561 | ||
c5f80065 EG |
562 | config ARCH_TEGRA |
563 | bool "NVIDIA Tegra" | |
564 | select GENERIC_TIME | |
565 | select GENERIC_CLOCKEVENTS | |
566 | select GENERIC_GPIO | |
567 | select HAVE_CLK | |
d8611961 | 568 | select COMMON_CLKDEV |
c5f80065 | 569 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 570 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
571 | help |
572 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
573 | Tegra 6xx and Tegra 2 series). | |
574 | ||
4af6fee1 DS |
575 | config ARCH_PNX4008 |
576 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 577 | select CPU_ARM926T |
6985a5ad | 578 | select COMMON_CLKDEV |
5cfc8ee0 | 579 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
580 | help |
581 | This enables support for Philips PNX4008 mobile platform. | |
582 | ||
1da177e4 | 583 | config ARCH_PXA |
2c8086a5 | 584 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 585 | depends on MMU |
034d2f5a | 586 | select ARCH_MTD_XIP |
89c52ed4 | 587 | select ARCH_HAS_CPUFREQ |
8c3abc7d | 588 | select COMMON_CLKDEV |
7444a72e | 589 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 590 | select GENERIC_CLOCKEVENTS |
a88264c2 | 591 | select TICK_ONESHOT |
bd5ce433 | 592 | select PLAT_PXA |
6ac6b817 | 593 | select SPARSE_IRQ |
f999b8bd | 594 | help |
2c8086a5 | 595 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 596 | |
788c9700 RK |
597 | config ARCH_MSM |
598 | bool "Qualcomm MSM" | |
4b536b8d | 599 | select HAVE_CLK |
49cbe786 | 600 | select GENERIC_CLOCKEVENTS |
923a081c | 601 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 602 | help |
4b53eb4f DW |
603 | Support for Qualcomm MSM/QSD based systems. This runs on the |
604 | apps processor of the MSM/QSD and depends on a shared memory | |
605 | interface to the modem processor which runs the baseband | |
606 | stack and controls some vital subsystems | |
607 | (clock and power control, etc). | |
49cbe786 | 608 | |
c793c1b0 MD |
609 | config ARCH_SHMOBILE |
610 | bool "Renesas SH-Mobile" | |
611 | help | |
612 | Support for Renesas's SH-Mobile ARM platforms | |
613 | ||
1da177e4 LT |
614 | config ARCH_RPC |
615 | bool "RiscPC" | |
616 | select ARCH_ACORN | |
617 | select FIQ | |
618 | select TIMER_ACORN | |
a08b6b79 | 619 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 620 | select HAVE_PATA_PLATFORM |
065909b9 | 621 | select ISA_DMA_API |
5ea81769 | 622 | select NO_IOPORT |
07f841b7 | 623 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 624 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
625 | help |
626 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
627 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
628 | ||
629 | config ARCH_SA1100 | |
630 | bool "SA1100-based" | |
c750815e | 631 | select CPU_SA1100 |
f7e68bbf | 632 | select ISA |
05944d74 | 633 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 634 | select ARCH_MTD_XIP |
89c52ed4 | 635 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 636 | select CPU_FREQ |
3e238be2 | 637 | select GENERIC_CLOCKEVENTS |
9483a578 | 638 | select HAVE_CLK |
3e238be2 | 639 | select TICK_ONESHOT |
7444a72e | 640 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
641 | help |
642 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
643 | |
644 | config ARCH_S3C2410 | |
63b1f51b | 645 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 646 | select GENERIC_GPIO |
9d56c02a | 647 | select ARCH_HAS_CPUFREQ |
9483a578 | 648 | select HAVE_CLK |
5cfc8ee0 | 649 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 650 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
651 | help |
652 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
653 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 654 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 655 | |
63b1f51b BD |
656 | Note, the S3C2416 and the S3C2450 are so close that they even share |
657 | the same SoC ID code. This means that there is no seperate machine | |
658 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
659 | ||
a08ab637 BD |
660 | config ARCH_S3C64XX |
661 | bool "Samsung S3C64XX" | |
89f1fa08 | 662 | select PLAT_SAMSUNG |
89f0ce72 | 663 | select CPU_V6 |
89f0ce72 | 664 | select ARM_VIC |
a08ab637 | 665 | select HAVE_CLK |
89f0ce72 | 666 | select NO_IOPORT |
5cfc8ee0 | 667 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 668 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
669 | select ARCH_REQUIRE_GPIOLIB |
670 | select SAMSUNG_CLKSRC | |
671 | select SAMSUNG_IRQ_VIC_TIMER | |
672 | select SAMSUNG_IRQ_UART | |
673 | select S3C_GPIO_TRACK | |
674 | select S3C_GPIO_PULL_UPDOWN | |
675 | select S3C_GPIO_CFG_S3C24XX | |
676 | select S3C_GPIO_CFG_S3C64XX | |
677 | select S3C_DEV_NAND | |
678 | select USB_ARCH_HAS_OHCI | |
679 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 680 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 681 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
682 | help |
683 | Samsung S3C64XX series based systems | |
684 | ||
49b7a491 KK |
685 | config ARCH_S5P64X0 |
686 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
687 | select CPU_V6 |
688 | select GENERIC_GPIO | |
689 | select HAVE_CLK | |
c39d8d55 | 690 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
925c68cd | 691 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 692 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 693 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 694 | help |
49b7a491 KK |
695 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
696 | SMDK6450. | |
c4ffccdd | 697 | |
550db7f1 KK |
698 | config ARCH_S5P6442 |
699 | bool "Samsung S5P6442" | |
700 | select CPU_V6 | |
701 | select GENERIC_GPIO | |
702 | select HAVE_CLK | |
925c68cd | 703 | select ARCH_USES_GETTIMEOFFSET |
c39d8d55 | 704 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
550db7f1 KK |
705 | help |
706 | Samsung S5P6442 CPU based systems | |
707 | ||
acc84707 MS |
708 | config ARCH_S5PC100 |
709 | bool "Samsung S5PC100" | |
5a7652f2 BM |
710 | select GENERIC_GPIO |
711 | select HAVE_CLK | |
712 | select CPU_V7 | |
d6d502fa | 713 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 714 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 715 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 716 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 717 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 718 | help |
acc84707 | 719 | Samsung S5PC100 series based systems |
5a7652f2 | 720 | |
170f4e42 KK |
721 | config ARCH_S5PV210 |
722 | bool "Samsung S5PV210/S5PC110" | |
723 | select CPU_V7 | |
eecb6a84 | 724 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
725 | select GENERIC_GPIO |
726 | select HAVE_CLK | |
727 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 728 | select ARCH_HAS_CPUFREQ |
925c68cd | 729 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 730 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 731 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 732 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
733 | help |
734 | Samsung S5PV210/S5PC110 series based systems | |
735 | ||
cc0e72b8 CY |
736 | config ARCH_S5PV310 |
737 | bool "Samsung S5PV310/S5PC210" | |
738 | select CPU_V7 | |
f567fa6f | 739 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
740 | select GENERIC_GPIO |
741 | select HAVE_CLK | |
742 | select GENERIC_CLOCKEVENTS | |
754961a8 | 743 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 744 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 745 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 CY |
746 | help |
747 | Samsung S5PV310 series based systems | |
748 | ||
1da177e4 LT |
749 | config ARCH_SHARK |
750 | bool "Shark" | |
c750815e | 751 | select CPU_SA110 |
f7e68bbf RK |
752 | select ISA |
753 | select ISA_DMA | |
3bca103a | 754 | select ZONE_DMA |
f7e68bbf | 755 | select PCI |
5cfc8ee0 | 756 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
757 | help |
758 | Support for the StrongARM based Digital DNARD machine, also known | |
759 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 760 | |
83ef3338 HK |
761 | config ARCH_TCC_926 |
762 | bool "Telechips TCC ARM926-based systems" | |
763 | select CPU_ARM926T | |
764 | select HAVE_CLK | |
765 | select COMMON_CLKDEV | |
766 | select GENERIC_CLOCKEVENTS | |
767 | help | |
768 | Support for Telechips TCC ARM926-based systems. | |
769 | ||
1da177e4 LT |
770 | config ARCH_LH7A40X |
771 | bool "Sharp LH7A40X" | |
c750815e | 772 | select CPU_ARM922T |
4ba3f7c5 | 773 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 774 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
775 | help |
776 | Say Y here for systems based on one of the Sharp LH7A40X | |
777 | System on a Chip processors. These CPUs include an ARM922T | |
778 | core with a wide array of integrated devices for | |
779 | hand-held and low-power applications. | |
780 | ||
d98aac75 LW |
781 | config ARCH_U300 |
782 | bool "ST-Ericsson U300 Series" | |
783 | depends on MMU | |
784 | select CPU_ARM926T | |
bc581770 | 785 | select HAVE_TCM |
d98aac75 LW |
786 | select ARM_AMBA |
787 | select ARM_VIC | |
d98aac75 | 788 | select GENERIC_CLOCKEVENTS |
d98aac75 LW |
789 | select COMMON_CLKDEV |
790 | select GENERIC_GPIO | |
791 | help | |
792 | Support for ST-Ericsson U300 series mobile platforms. | |
793 | ||
ccf50e23 RK |
794 | config ARCH_U8500 |
795 | bool "ST-Ericsson U8500 Series" | |
796 | select CPU_V7 | |
797 | select ARM_AMBA | |
ccf50e23 RK |
798 | select GENERIC_CLOCKEVENTS |
799 | select COMMON_CLKDEV | |
94bdc0e2 | 800 | select ARCH_REQUIRE_GPIOLIB |
ccf50e23 RK |
801 | help |
802 | Support for ST-Ericsson's Ux500 architecture | |
803 | ||
804 | config ARCH_NOMADIK | |
805 | bool "STMicroelectronics Nomadik" | |
806 | select ARM_AMBA | |
807 | select ARM_VIC | |
808 | select CPU_ARM926T | |
ccf50e23 | 809 | select COMMON_CLKDEV |
ccf50e23 | 810 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
811 | select ARCH_REQUIRE_GPIOLIB |
812 | help | |
813 | Support for the Nomadik platform by ST-Ericsson | |
814 | ||
7c6337e2 KH |
815 | config ARCH_DAVINCI |
816 | bool "TI DaVinci" | |
7c6337e2 | 817 | select GENERIC_CLOCKEVENTS |
dce1115b | 818 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 819 | select ZONE_DMA |
9232fcc9 | 820 | select HAVE_IDE |
c5b736d0 | 821 | select COMMON_CLKDEV |
20e9969b | 822 | select GENERIC_ALLOCATOR |
ae88e05a | 823 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
824 | help |
825 | Support for TI's DaVinci platform. | |
826 | ||
3b938be6 RK |
827 | config ARCH_OMAP |
828 | bool "TI OMAP" | |
9483a578 | 829 | select HAVE_CLK |
7444a72e | 830 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 831 | select ARCH_HAS_CPUFREQ |
06cad098 | 832 | select GENERIC_CLOCKEVENTS |
9af915da | 833 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 834 | help |
6e457bb0 | 835 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 836 | |
cee37e50 | 837 | config PLAT_SPEAR |
838 | bool "ST SPEAr" | |
839 | select ARM_AMBA | |
840 | select ARCH_REQUIRE_GPIOLIB | |
841 | select COMMON_CLKDEV | |
842 | select GENERIC_CLOCKEVENTS | |
cee37e50 | 843 | select HAVE_CLK |
844 | help | |
845 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
846 | ||
1da177e4 LT |
847 | endchoice |
848 | ||
ccf50e23 RK |
849 | # |
850 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
851 | # Kconfigs may be included either alphabetically (according to the | |
852 | # plat- suffix) or along side the corresponding mach-* source. | |
853 | # | |
95b8f20f RK |
854 | source "arch/arm/mach-aaec2000/Kconfig" |
855 | ||
856 | source "arch/arm/mach-at91/Kconfig" | |
857 | ||
858 | source "arch/arm/mach-bcmring/Kconfig" | |
859 | ||
1da177e4 LT |
860 | source "arch/arm/mach-clps711x/Kconfig" |
861 | ||
d94f944e AV |
862 | source "arch/arm/mach-cns3xxx/Kconfig" |
863 | ||
95b8f20f RK |
864 | source "arch/arm/mach-davinci/Kconfig" |
865 | ||
866 | source "arch/arm/mach-dove/Kconfig" | |
867 | ||
e7736d47 LB |
868 | source "arch/arm/mach-ep93xx/Kconfig" |
869 | ||
1da177e4 LT |
870 | source "arch/arm/mach-footbridge/Kconfig" |
871 | ||
59d3a193 PZ |
872 | source "arch/arm/mach-gemini/Kconfig" |
873 | ||
95b8f20f RK |
874 | source "arch/arm/mach-h720x/Kconfig" |
875 | ||
1da177e4 LT |
876 | source "arch/arm/mach-integrator/Kconfig" |
877 | ||
3f7e5815 LB |
878 | source "arch/arm/mach-iop32x/Kconfig" |
879 | ||
880 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 881 | |
285f5fa7 DW |
882 | source "arch/arm/mach-iop13xx/Kconfig" |
883 | ||
1da177e4 LT |
884 | source "arch/arm/mach-ixp4xx/Kconfig" |
885 | ||
886 | source "arch/arm/mach-ixp2000/Kconfig" | |
887 | ||
c4713074 LB |
888 | source "arch/arm/mach-ixp23xx/Kconfig" |
889 | ||
95b8f20f RK |
890 | source "arch/arm/mach-kirkwood/Kconfig" |
891 | ||
892 | source "arch/arm/mach-ks8695/Kconfig" | |
893 | ||
894 | source "arch/arm/mach-lh7a40x/Kconfig" | |
895 | ||
777f9beb LB |
896 | source "arch/arm/mach-loki/Kconfig" |
897 | ||
40805949 KW |
898 | source "arch/arm/mach-lpc32xx/Kconfig" |
899 | ||
95b8f20f RK |
900 | source "arch/arm/mach-msm/Kconfig" |
901 | ||
794d15b2 SS |
902 | source "arch/arm/mach-mv78xx0/Kconfig" |
903 | ||
95b8f20f | 904 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 905 | |
95b8f20f | 906 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 907 | |
95b8f20f RK |
908 | source "arch/arm/mach-nomadik/Kconfig" |
909 | source "arch/arm/plat-nomadik/Kconfig" | |
910 | ||
911 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 912 | |
186f93ea | 913 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 914 | |
d48af15e TL |
915 | source "arch/arm/plat-omap/Kconfig" |
916 | ||
917 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 918 | |
1dbae815 TL |
919 | source "arch/arm/mach-omap2/Kconfig" |
920 | ||
9dd0b194 | 921 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 922 | |
95b8f20f RK |
923 | source "arch/arm/mach-pxa/Kconfig" |
924 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 925 | |
95b8f20f RK |
926 | source "arch/arm/mach-mmp/Kconfig" |
927 | ||
928 | source "arch/arm/mach-realview/Kconfig" | |
929 | ||
930 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 931 | |
cf383678 | 932 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 933 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 934 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 935 | |
cee37e50 | 936 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 937 | |
83ef3338 HK |
938 | source "arch/arm/plat-tcc/Kconfig" |
939 | ||
a21765a7 BD |
940 | if ARCH_S3C2410 |
941 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 942 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 943 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 944 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 945 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 946 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 947 | endif |
1da177e4 | 948 | |
a08ab637 | 949 | if ARCH_S3C64XX |
431107ea | 950 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
951 | endif |
952 | ||
49b7a491 | 953 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 954 | |
550db7f1 | 955 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 956 | |
5a7652f2 | 957 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 958 | |
170f4e42 KK |
959 | source "arch/arm/mach-s5pv210/Kconfig" |
960 | ||
cc0e72b8 CY |
961 | source "arch/arm/mach-s5pv310/Kconfig" |
962 | ||
882d01f9 | 963 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 964 | |
882d01f9 | 965 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 966 | |
c5f80065 EG |
967 | source "arch/arm/mach-tegra/Kconfig" |
968 | ||
95b8f20f | 969 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 970 | |
95b8f20f | 971 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
972 | |
973 | source "arch/arm/mach-versatile/Kconfig" | |
974 | ||
ceade897 RK |
975 | source "arch/arm/mach-vexpress/Kconfig" |
976 | ||
7ec80ddf | 977 | source "arch/arm/mach-w90x900/Kconfig" |
978 | ||
1da177e4 LT |
979 | # Definitions to make life easier |
980 | config ARCH_ACORN | |
981 | bool | |
982 | ||
7ae1f7ec LB |
983 | config PLAT_IOP |
984 | bool | |
469d3044 | 985 | select GENERIC_CLOCKEVENTS |
7ae1f7ec | 986 | |
69b02f6a LB |
987 | config PLAT_ORION |
988 | bool | |
989 | ||
bd5ce433 EM |
990 | config PLAT_PXA |
991 | bool | |
992 | ||
f4b8b319 RK |
993 | config PLAT_VERSATILE |
994 | bool | |
995 | ||
e3887714 RK |
996 | config ARM_TIMER_SP804 |
997 | bool | |
998 | ||
1da177e4 LT |
999 | source arch/arm/mm/Kconfig |
1000 | ||
afe4b25e LB |
1001 | config IWMMXT |
1002 | bool "Enable iWMMXt support" | |
40305a58 EM |
1003 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK |
1004 | default y if PXA27x || PXA3xx || ARCH_MMP | |
afe4b25e LB |
1005 | help |
1006 | Enable support for iWMMXt context switching at run time if | |
1007 | running on a CPU that supports it. | |
1008 | ||
1da177e4 LT |
1009 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1010 | config XSCALE_PMU | |
1011 | bool | |
1012 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1013 | default y | |
1014 | ||
0f4f0672 | 1015 | config CPU_HAS_PMU |
8954bb0d WD |
1016 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
1017 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
1018 | default y |
1019 | bool | |
1020 | ||
3b93e7b0 HC |
1021 | if !MMU |
1022 | source "arch/arm/Kconfig-nommu" | |
1023 | endif | |
1024 | ||
9cba3ccc CM |
1025 | config ARM_ERRATA_411920 |
1026 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
81d11955 | 1027 | depends on CPU_V6 |
9cba3ccc CM |
1028 | help |
1029 | Invalidation of the Instruction Cache operation can | |
1030 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1031 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1032 | recommended workaround. | |
1033 | ||
7ce236fc CM |
1034 | config ARM_ERRATA_430973 |
1035 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1036 | depends on CPU_V7 | |
1037 | help | |
1038 | This option enables the workaround for the 430973 Cortex-A8 | |
1039 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1040 | interworking branch is replaced with another code sequence at the | |
1041 | same virtual address, whether due to self-modifying code or virtual | |
1042 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1043 | stale interworking branch prediction. This results in Cortex-A8 | |
1044 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1045 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1046 | and also flushes the branch target cache at every context switch. | |
1047 | Note that setting specific bits in the ACTLR register may not be | |
1048 | available in non-secure mode. | |
1049 | ||
855c551f CM |
1050 | config ARM_ERRATA_458693 |
1051 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1052 | depends on CPU_V7 | |
1053 | help | |
1054 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1055 | erratum. For very specific sequences of memory operations, it is | |
1056 | possible for a hazard condition intended for a cache line to instead | |
1057 | be incorrectly associated with a different cache line. This false | |
1058 | hazard might then cause a processor deadlock. The workaround enables | |
1059 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1060 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1061 | register may not be available in non-secure mode. | |
1062 | ||
0516e464 CM |
1063 | config ARM_ERRATA_460075 |
1064 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1065 | depends on CPU_V7 | |
1066 | help | |
1067 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1068 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1069 | situation in which recent store transactions to the L2 cache are lost | |
1070 | and overwritten with stale memory contents from external memory. The | |
1071 | workaround disables the write-allocate mode for the L2 cache via the | |
1072 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1073 | may not be available in non-secure mode. | |
1074 | ||
9f05027c WD |
1075 | config ARM_ERRATA_742230 |
1076 | bool "ARM errata: DMB operation may be faulty" | |
1077 | depends on CPU_V7 && SMP | |
1078 | help | |
1079 | This option enables the workaround for the 742230 Cortex-A9 | |
1080 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1081 | between two write operations may not ensure the correct visibility | |
1082 | ordering of the two writes. This workaround sets a specific bit in | |
1083 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1084 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1085 | the two writes. | |
1086 | ||
a672e99b WD |
1087 | config ARM_ERRATA_742231 |
1088 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1089 | depends on CPU_V7 && SMP | |
1090 | help | |
1091 | This option enables the workaround for the 742231 Cortex-A9 | |
1092 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1093 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1094 | accessing some data located in the same cache line, may get corrupted | |
1095 | data due to bad handling of the address hazard when the line gets | |
1096 | replaced from one of the CPUs at the same time as another CPU is | |
1097 | accessing it. This workaround sets specific bits in the diagnostic | |
1098 | register of the Cortex-A9 which reduces the linefill issuing | |
1099 | capabilities of the processor. | |
1100 | ||
9e65582a SS |
1101 | config PL310_ERRATA_588369 |
1102 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
1103 | depends on CACHE_L2X0 && ARCH_OMAP4 | |
1104 | help | |
1105 | The PL310 L2 cache controller implements three types of Clean & | |
1106 | Invalidate maintenance operations: by Physical Address | |
1107 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1108 | They are architecturally defined to behave as the execution of a | |
1109 | clean operation followed immediately by an invalidate operation, | |
1110 | both performing to the same memory location. This functionality | |
1111 | is not correctly implemented in PL310 as clean lines are not | |
1112 | invalidated as a result of these operations. Note that this errata | |
1113 | uses Texas Instrument's secure monitor api. | |
cdf357f1 WD |
1114 | |
1115 | config ARM_ERRATA_720789 | |
1116 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1117 | depends on CPU_V7 && SMP | |
1118 | help | |
1119 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1120 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1121 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1122 | As a consequence of this erratum, some TLB entries which should be | |
1123 | invalidated are not, resulting in an incoherency in the system page | |
1124 | tables. The workaround changes the TLB flushing routines to invalidate | |
1125 | entries regardless of the ASID. | |
475d92fc WD |
1126 | |
1127 | config ARM_ERRATA_743622 | |
1128 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1129 | depends on CPU_V7 | |
1130 | help | |
1131 | This option enables the workaround for the 743622 Cortex-A9 | |
1132 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1133 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1134 | corruption. This workaround sets a specific bit in the diagnostic | |
1135 | register of the Cortex-A9 which disables the Store Buffer | |
1136 | optimisation, preventing the defect from occurring. This has no | |
1137 | visible impact on the overall performance or power consumption of the | |
1138 | processor. | |
1139 | ||
1da177e4 LT |
1140 | endmenu |
1141 | ||
1142 | source "arch/arm/common/Kconfig" | |
1143 | ||
1da177e4 LT |
1144 | menu "Bus support" |
1145 | ||
1146 | config ARM_AMBA | |
1147 | bool | |
1148 | ||
1149 | config ISA | |
1150 | bool | |
1da177e4 LT |
1151 | help |
1152 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1153 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1154 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1155 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1156 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1157 | ||
065909b9 | 1158 | # Select ISA DMA controller support |
1da177e4 LT |
1159 | config ISA_DMA |
1160 | bool | |
065909b9 | 1161 | select ISA_DMA_API |
1da177e4 | 1162 | |
065909b9 | 1163 | # Select ISA DMA interface |
5cae841b AV |
1164 | config ISA_DMA_API |
1165 | bool | |
5cae841b | 1166 | |
1da177e4 | 1167 | config PCI |
5f32f7a0 | 1168 | bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX |
1da177e4 LT |
1169 | help |
1170 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1171 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1172 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1173 | VESA. If you have PCI, say Y, otherwise N. | |
1174 | ||
52882173 AV |
1175 | config PCI_DOMAINS |
1176 | bool | |
1177 | depends on PCI | |
1178 | ||
36e23590 MW |
1179 | config PCI_SYSCALL |
1180 | def_bool PCI | |
1181 | ||
1da177e4 LT |
1182 | # Select the host bridge type |
1183 | config PCI_HOST_VIA82C505 | |
1184 | bool | |
1185 | depends on PCI && ARCH_SHARK | |
1186 | default y | |
1187 | ||
a0113a99 MR |
1188 | config PCI_HOST_ITE8152 |
1189 | bool | |
1190 | depends on PCI && MACH_ARMCORE | |
1191 | default y | |
1192 | select DMABOUNCE | |
1193 | ||
1da177e4 LT |
1194 | source "drivers/pci/Kconfig" |
1195 | ||
1196 | source "drivers/pcmcia/Kconfig" | |
1197 | ||
1198 | endmenu | |
1199 | ||
1200 | menu "Kernel Features" | |
1201 | ||
0567a0c0 KH |
1202 | source "kernel/time/Kconfig" |
1203 | ||
1da177e4 LT |
1204 | config SMP |
1205 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
971acb9b | 1206 | depends on EXPERIMENTAL |
bc28248e | 1207 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1208 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf DW |
1209 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1210 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
1211 | ARCH_MSM_SCORPIONMP | |
f6dd9fa5 | 1212 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1213 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1214 | help |
1215 | This enables support for systems with more than one CPU. If you have | |
1216 | a system with only one CPU, like most personal computers, say N. If | |
1217 | you have a system with more than one CPU, say Y. | |
1218 | ||
1219 | If you say N here, the kernel will run on single and multiprocessor | |
1220 | machines, but will use only one CPU of a multiprocessor machine. If | |
1221 | you say Y here, the kernel will run on many, but not all, single | |
1222 | processor machines. On a single processor machine, the kernel will | |
1223 | run faster if you say N here. | |
1224 | ||
03502faa | 1225 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1226 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1227 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1228 | |
1229 | If you don't know what to do here, say N. | |
1230 | ||
f00ec48f RK |
1231 | config SMP_ON_UP |
1232 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1233 | depends on EXPERIMENTAL | |
1234 | depends on SMP && !XIP && !THUMB2_KERNEL | |
1235 | default y | |
1236 | help | |
1237 | SMP kernels contain instructions which fail on non-SMP processors. | |
1238 | Enabling this option allows the kernel to modify itself to make | |
1239 | these instructions safe. Disabling it allows about 1K of space | |
1240 | savings. | |
1241 | ||
1242 | If you don't know what to do here, say Y. | |
1243 | ||
a8cbcd92 RK |
1244 | config HAVE_ARM_SCU |
1245 | bool | |
1246 | depends on SMP | |
1247 | help | |
1248 | This option enables support for the ARM system coherency unit | |
1249 | ||
f32f4ce2 RK |
1250 | config HAVE_ARM_TWD |
1251 | bool | |
1252 | depends on SMP | |
1253 | help | |
1254 | This options enables support for the ARM timer and watchdog unit | |
1255 | ||
8d5796d2 LB |
1256 | choice |
1257 | prompt "Memory split" | |
1258 | default VMSPLIT_3G | |
1259 | help | |
1260 | Select the desired split between kernel and user memory. | |
1261 | ||
1262 | If you are not absolutely sure what you are doing, leave this | |
1263 | option alone! | |
1264 | ||
1265 | config VMSPLIT_3G | |
1266 | bool "3G/1G user/kernel split" | |
1267 | config VMSPLIT_2G | |
1268 | bool "2G/2G user/kernel split" | |
1269 | config VMSPLIT_1G | |
1270 | bool "1G/3G user/kernel split" | |
1271 | endchoice | |
1272 | ||
1273 | config PAGE_OFFSET | |
1274 | hex | |
1275 | default 0x40000000 if VMSPLIT_1G | |
1276 | default 0x80000000 if VMSPLIT_2G | |
1277 | default 0xC0000000 | |
1278 | ||
1da177e4 LT |
1279 | config NR_CPUS |
1280 | int "Maximum number of CPUs (2-32)" | |
1281 | range 2 32 | |
1282 | depends on SMP | |
1283 | default "4" | |
1284 | ||
a054a811 RK |
1285 | config HOTPLUG_CPU |
1286 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1287 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
176bfc44 | 1288 | depends on !ARCH_MSM |
a054a811 RK |
1289 | help |
1290 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1291 | can be controlled through /sys/devices/system/cpu. | |
1292 | ||
37ee16ae RK |
1293 | config LOCAL_TIMERS |
1294 | bool "Use local timer interrupts" | |
971acb9b | 1295 | depends on SMP |
37ee16ae | 1296 | default y |
89c3dedf | 1297 | select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP |
37ee16ae RK |
1298 | help |
1299 | Enable support for local timers on SMP platforms, rather then the | |
1300 | legacy IPI broadcast method. Local timers allows the system | |
1301 | accounting to be spread across the timer interval, preventing a | |
1302 | "thundering herd" at every timer tick. | |
1303 | ||
d45a398f | 1304 | source kernel/Kconfig.preempt |
1da177e4 | 1305 | |
f8065813 RK |
1306 | config HZ |
1307 | int | |
49b7a491 | 1308 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
2192482e | 1309 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
bfe65704 | 1310 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1311 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1312 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1313 | default 100 |
1314 | ||
16c79651 CM |
1315 | config THUMB2_KERNEL |
1316 | bool "Compile the kernel in Thumb-2 mode" | |
1317 | depends on CPU_V7 && EXPERIMENTAL | |
1318 | select AEABI | |
1319 | select ARM_ASM_UNIFIED | |
1320 | help | |
1321 | By enabling this option, the kernel will be compiled in | |
1322 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1323 | ARM-Thumb syntax is needed. | |
1324 | ||
1325 | If unsure, say N. | |
1326 | ||
0becb088 CM |
1327 | config ARM_ASM_UNIFIED |
1328 | bool | |
1329 | ||
704bdda0 NP |
1330 | config AEABI |
1331 | bool "Use the ARM EABI to compile the kernel" | |
1332 | help | |
1333 | This option allows for the kernel to be compiled using the latest | |
1334 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1335 | space environment that is also compiled with EABI. | |
1336 | ||
1337 | Since there are major incompatibilities between the legacy ABI and | |
1338 | EABI, especially with regard to structure member alignment, this | |
1339 | option also changes the kernel syscall calling convention to | |
1340 | disambiguate both ABIs and allow for backward compatibility support | |
1341 | (selected with CONFIG_OABI_COMPAT). | |
1342 | ||
1343 | To use this you need GCC version 4.0.0 or later. | |
1344 | ||
6c90c872 | 1345 | config OABI_COMPAT |
a73a3ff1 | 1346 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1347 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1348 | default y |
1349 | help | |
1350 | This option preserves the old syscall interface along with the | |
1351 | new (ARM EABI) one. It also provides a compatibility layer to | |
1352 | intercept syscalls that have structure arguments which layout | |
1353 | in memory differs between the legacy ABI and the new ARM EABI | |
1354 | (only for non "thumb" binaries). This option adds a tiny | |
1355 | overhead to all syscalls and produces a slightly larger kernel. | |
1356 | If you know you'll be using only pure EABI user space then you | |
1357 | can say N here. If this option is not selected and you attempt | |
1358 | to execute a legacy ABI binary then the result will be | |
1359 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1360 | at all). If in doubt say Y. | |
1361 | ||
eb33575c | 1362 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1363 | bool |
e80d6a24 | 1364 | |
05944d74 RK |
1365 | config ARCH_SPARSEMEM_ENABLE |
1366 | bool | |
1367 | ||
07a2f737 RK |
1368 | config ARCH_SPARSEMEM_DEFAULT |
1369 | def_bool ARCH_SPARSEMEM_ENABLE | |
1370 | ||
05944d74 | 1371 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1372 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1373 | |
053a96ca NP |
1374 | config HIGHMEM |
1375 | bool "High Memory Support (EXPERIMENTAL)" | |
1376 | depends on MMU && EXPERIMENTAL | |
1377 | help | |
1378 | The address space of ARM processors is only 4 Gigabytes large | |
1379 | and it has to accommodate user address space, kernel address | |
1380 | space as well as some memory mapped IO. That means that, if you | |
1381 | have a large amount of physical memory and/or IO, not all of the | |
1382 | memory can be "permanently mapped" by the kernel. The physical | |
1383 | memory that is not permanently mapped is called "high memory". | |
1384 | ||
1385 | Depending on the selected kernel/user memory split, minimum | |
1386 | vmalloc space and actual amount of RAM, you may not need this | |
1387 | option which should result in a slightly faster kernel. | |
1388 | ||
1389 | If unsure, say n. | |
1390 | ||
65cec8e3 RK |
1391 | config HIGHPTE |
1392 | bool "Allocate 2nd-level pagetables from highmem" | |
1393 | depends on HIGHMEM | |
1394 | depends on !OUTER_CACHE | |
1395 | ||
1b8873a0 JI |
1396 | config HW_PERF_EVENTS |
1397 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1398 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1399 | default y |
1400 | help | |
1401 | Enable hardware performance counter support for perf events. If | |
1402 | disabled, perf events will use software events only. | |
1403 | ||
354e6f72 | 1404 | config SPARSE_IRQ |
c1ba6ba3 | 1405 | def_bool n |
354e6f72 | 1406 | help |
1407 | This enables support for sparse irqs. This is useful in general | |
1408 | as most CPUs have a fairly sparse array of IRQ vectors, which | |
1409 | the irq_desc then maps directly on to. Systems with a high | |
1410 | number of off-chip IRQs will want to treat this as | |
1411 | experimental until they have been independently verified. | |
1412 | ||
3f22ab27 DH |
1413 | source "mm/Kconfig" |
1414 | ||
c1b2d970 MD |
1415 | config FORCE_MAX_ZONEORDER |
1416 | int "Maximum zone order" if ARCH_SHMOBILE | |
1417 | range 11 64 if ARCH_SHMOBILE | |
1418 | default "9" if SA1111 | |
1419 | default "11" | |
1420 | help | |
1421 | The kernel memory allocator divides physically contiguous memory | |
1422 | blocks into "zones", where each zone is a power of two number of | |
1423 | pages. This option selects the largest power of two that the kernel | |
1424 | keeps in the memory allocator. If you need to allocate very large | |
1425 | blocks of physically contiguous memory, then you may need to | |
1426 | increase this value. | |
1427 | ||
1428 | This config option is actually maximum order plus one. For example, | |
1429 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1430 | ||
1da177e4 LT |
1431 | config LEDS |
1432 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1433 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1434 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1435 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1436 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1437 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1438 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1439 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1440 | help |
1441 | If you say Y here, the LEDs on your machine will be used | |
1442 | to provide useful information about your current system status. | |
1443 | ||
1444 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1445 | be able to select which LEDs are active using the options below. If | |
1446 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1447 | red LED will simply flash regularly to indicate that the system is | |
1448 | still functional. It is safe to say Y here if you have a CATS | |
1449 | system, but the driver will do nothing. | |
1450 | ||
1451 | config LEDS_TIMER | |
1452 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1453 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1454 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1455 | depends on LEDS |
0567a0c0 | 1456 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1457 | default y if ARCH_EBSA110 |
1458 | help | |
1459 | If you say Y here, one of the system LEDs (the green one on the | |
1460 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1461 | will flash regularly to indicate that the system is still | |
1462 | operational. This is mainly useful to kernel hackers who are | |
1463 | debugging unstable kernels. | |
1464 | ||
1465 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1466 | functions. You may choose to use both, but the Timer LED function | |
1467 | will overrule the CPU usage LED. | |
1468 | ||
1469 | config LEDS_CPU | |
1470 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1471 | !ARCH_OMAP) \ |
1472 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1473 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1474 | depends on LEDS |
1475 | help | |
1476 | If you say Y here, the red LED will be used to give a good real | |
1477 | time indication of CPU usage, by lighting whenever the idle task | |
1478 | is not currently executing. | |
1479 | ||
1480 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1481 | functions. You may choose to use both, but the Timer LED function | |
1482 | will overrule the CPU usage LED. | |
1483 | ||
1484 | config ALIGNMENT_TRAP | |
1485 | bool | |
f12d0d7c | 1486 | depends on CPU_CP15_MMU |
1da177e4 | 1487 | default y if !ARCH_EBSA110 |
e119bfff | 1488 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1489 | help |
84eb8d06 | 1490 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1491 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1492 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1493 | fetch/store instructions will be emulated in software if you say | |
1494 | here, which has a severe performance impact. This is necessary for | |
1495 | correct operation of some network protocols. With an IP-only | |
1496 | configuration it is safe to say N, otherwise say Y. | |
1497 | ||
39ec58f3 LB |
1498 | config UACCESS_WITH_MEMCPY |
1499 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1500 | depends on MMU && EXPERIMENTAL | |
1501 | default y if CPU_FEROCEON | |
1502 | help | |
1503 | Implement faster copy_to_user and clear_user methods for CPU | |
1504 | cores where a 8-word STM instruction give significantly higher | |
1505 | memory write throughput than a sequence of individual 32bit stores. | |
1506 | ||
1507 | A possible side effect is a slight increase in scheduling latency | |
1508 | between threads sharing the same address space if they invoke | |
1509 | such copy operations with large buffers. | |
1510 | ||
1511 | However, if the CPU data cache is using a write-allocate mode, | |
1512 | this option is unlikely to provide any performance gain. | |
1513 | ||
70c70d97 NP |
1514 | config SECCOMP |
1515 | bool | |
1516 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1517 | ---help--- | |
1518 | This kernel feature is useful for number crunching applications | |
1519 | that may need to compute untrusted bytecode during their | |
1520 | execution. By using pipes or other transports made available to | |
1521 | the process as file descriptors supporting the read/write | |
1522 | syscalls, it's possible to isolate those applications in | |
1523 | their own address space using seccomp. Once seccomp is | |
1524 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1525 | and the task is only allowed to execute a few safe syscalls | |
1526 | defined by each seccomp mode. | |
1527 | ||
c743f380 NP |
1528 | config CC_STACKPROTECTOR |
1529 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
1530 | help | |
1531 | This option turns on the -fstack-protector GCC feature. This | |
1532 | feature puts, at the beginning of functions, a canary value on | |
1533 | the stack just before the return address, and validates | |
1534 | the value just before actually returning. Stack based buffer | |
1535 | overflows (that need to overwrite this return address) now also | |
1536 | overwrite the canary, which gets detected and the attack is then | |
1537 | neutralized via a kernel panic. | |
1538 | This feature requires gcc version 4.2 or above. | |
1539 | ||
73a65b3f UKK |
1540 | config DEPRECATED_PARAM_STRUCT |
1541 | bool "Provide old way to pass kernel parameters" | |
1542 | help | |
1543 | This was deprecated in 2001 and announced to live on for 5 years. | |
1544 | Some old boot loaders still use this way. | |
1545 | ||
1da177e4 LT |
1546 | endmenu |
1547 | ||
1548 | menu "Boot options" | |
1549 | ||
1550 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1551 | # TEXT and BSS so we preserve their values in the config files. | |
1552 | config ZBOOT_ROM_TEXT | |
1553 | hex "Compressed ROM boot loader base address" | |
1554 | default "0" | |
1555 | help | |
1556 | The physical address at which the ROM-able zImage is to be | |
1557 | placed in the target. Platforms which normally make use of | |
1558 | ROM-able zImage formats normally set this to a suitable | |
1559 | value in their defconfig file. | |
1560 | ||
1561 | If ZBOOT_ROM is not enabled, this has no effect. | |
1562 | ||
1563 | config ZBOOT_ROM_BSS | |
1564 | hex "Compressed ROM boot loader BSS address" | |
1565 | default "0" | |
1566 | help | |
f8c440b2 DF |
1567 | The base address of an area of read/write memory in the target |
1568 | for the ROM-able zImage which must be available while the | |
1569 | decompressor is running. It must be large enough to hold the | |
1570 | entire decompressed kernel plus an additional 128 KiB. | |
1571 | Platforms which normally make use of ROM-able zImage formats | |
1572 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1573 | |
1574 | If ZBOOT_ROM is not enabled, this has no effect. | |
1575 | ||
1576 | config ZBOOT_ROM | |
1577 | bool "Compressed boot loader in ROM/flash" | |
1578 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1579 | help | |
1580 | Say Y here if you intend to execute your compressed kernel image | |
1581 | (zImage) directly from ROM or flash. If unsure, say N. | |
1582 | ||
1583 | config CMDLINE | |
1584 | string "Default kernel command string" | |
1585 | default "" | |
1586 | help | |
1587 | On some architectures (EBSA110 and CATS), there is currently no way | |
1588 | for the boot loader to pass arguments to the kernel. For these | |
1589 | architectures, you should supply some command-line options at build | |
1590 | time by entering them here. As a minimum, you should specify the | |
1591 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1592 | ||
92d2040d AH |
1593 | config CMDLINE_FORCE |
1594 | bool "Always use the default kernel command string" | |
1595 | depends on CMDLINE != "" | |
1596 | help | |
1597 | Always use the default kernel command string, even if the boot | |
1598 | loader passes other arguments to the kernel. | |
1599 | This is useful if you cannot or don't want to change the | |
1600 | command-line options your boot loader passes to the kernel. | |
1601 | ||
1602 | If unsure, say N. | |
1603 | ||
1da177e4 LT |
1604 | config XIP_KERNEL |
1605 | bool "Kernel Execute-In-Place from ROM" | |
1606 | depends on !ZBOOT_ROM | |
1607 | help | |
1608 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1609 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1610 | space since the text section of the kernel is not loaded from flash | |
1611 | to RAM. Read-write sections, such as the data section and stack, | |
1612 | are still copied to RAM. The XIP kernel is not compressed since | |
1613 | it has to run directly from flash, so it will take more space to | |
1614 | store it. The flash address used to link the kernel object files, | |
1615 | and for storing it, is configuration dependent. Therefore, if you | |
1616 | say Y here, you must know the proper physical address where to | |
1617 | store the kernel image depending on your own flash memory usage. | |
1618 | ||
1619 | Also note that the make target becomes "make xipImage" rather than | |
1620 | "make zImage" or "make Image". The final kernel binary to put in | |
1621 | ROM memory will be arch/arm/boot/xipImage. | |
1622 | ||
1623 | If unsure, say N. | |
1624 | ||
1625 | config XIP_PHYS_ADDR | |
1626 | hex "XIP Kernel Physical Location" | |
1627 | depends on XIP_KERNEL | |
1628 | default "0x00080000" | |
1629 | help | |
1630 | This is the physical address in your flash memory the kernel will | |
1631 | be linked for and stored to. This address is dependent on your | |
1632 | own flash usage. | |
1633 | ||
c587e4a6 RP |
1634 | config KEXEC |
1635 | bool "Kexec system call (EXPERIMENTAL)" | |
1636 | depends on EXPERIMENTAL | |
1637 | help | |
1638 | kexec is a system call that implements the ability to shutdown your | |
1639 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1640 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1641 | you can start any kernel with it, not just Linux. |
1642 | ||
1643 | It is an ongoing process to be certain the hardware in a machine | |
1644 | is properly shutdown, so do not be surprised if this code does not | |
1645 | initially work for you. It may help to enable device hotplugging | |
1646 | support. | |
1647 | ||
4cd9d6f7 RP |
1648 | config ATAGS_PROC |
1649 | bool "Export atags in procfs" | |
b98d7291 UL |
1650 | depends on KEXEC |
1651 | default y | |
4cd9d6f7 RP |
1652 | help |
1653 | Should the atags used to boot the kernel be exported in an "atags" | |
1654 | file in procfs. Useful with kexec. | |
1655 | ||
e69edc79 EM |
1656 | config AUTO_ZRELADDR |
1657 | bool "Auto calculation of the decompressed kernel image address" | |
1658 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1659 | help | |
1660 | ZRELADDR is the physical address where the decompressed kernel | |
1661 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1662 | will be determined at run-time by masking the current IP with | |
1663 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1664 | from start of memory. | |
1665 | ||
1da177e4 LT |
1666 | endmenu |
1667 | ||
ac9d7efc | 1668 | menu "CPU Power Management" |
1da177e4 | 1669 | |
89c52ed4 | 1670 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1671 | |
1672 | source "drivers/cpufreq/Kconfig" | |
1673 | ||
64f102b6 YS |
1674 | config CPU_FREQ_IMX |
1675 | tristate "CPUfreq driver for i.MX CPUs" | |
1676 | depends on ARCH_MXC && CPU_FREQ | |
1677 | help | |
1678 | This enables the CPUfreq driver for i.MX CPUs. | |
1679 | ||
1da177e4 LT |
1680 | config CPU_FREQ_SA1100 |
1681 | bool | |
1da177e4 LT |
1682 | |
1683 | config CPU_FREQ_SA1110 | |
1684 | bool | |
1da177e4 LT |
1685 | |
1686 | config CPU_FREQ_INTEGRATOR | |
1687 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1688 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1689 | default y | |
1690 | help | |
1691 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1692 | ||
1693 | For details, take a look at <file:Documentation/cpu-freq>. | |
1694 | ||
1695 | If in doubt, say Y. | |
1696 | ||
9e2697ff RK |
1697 | config CPU_FREQ_PXA |
1698 | bool | |
1699 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1700 | default y | |
1701 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1702 | ||
b3748ddd MB |
1703 | config CPU_FREQ_S3C64XX |
1704 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1705 | depends on CPU_FREQ && CPU_S3C6410 | |
1706 | ||
9d56c02a BD |
1707 | config CPU_FREQ_S3C |
1708 | bool | |
1709 | help | |
1710 | Internal configuration node for common cpufreq on Samsung SoC | |
1711 | ||
1712 | config CPU_FREQ_S3C24XX | |
1713 | bool "CPUfreq driver for Samsung S3C24XX series CPUs" | |
1714 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL | |
1715 | select CPU_FREQ_S3C | |
1716 | help | |
1717 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1718 | of CPUs. | |
1719 | ||
1720 | For details, take a look at <file:Documentation/cpu-freq>. | |
1721 | ||
1722 | If in doubt, say N. | |
1723 | ||
1724 | config CPU_FREQ_S3C24XX_PLL | |
1725 | bool "Support CPUfreq changing of PLL frequency" | |
1726 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL | |
1727 | help | |
1728 | Compile in support for changing the PLL frequency from the | |
1729 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1730 | after a frequency change, so by default it is not enabled. | |
1731 | ||
1732 | This also means that the PLL tables for the selected CPU(s) will | |
1733 | be built which may increase the size of the kernel image. | |
1734 | ||
1735 | config CPU_FREQ_S3C24XX_DEBUG | |
1736 | bool "Debug CPUfreq Samsung driver core" | |
1737 | depends on CPU_FREQ_S3C24XX | |
1738 | help | |
1739 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1740 | ||
1741 | config CPU_FREQ_S3C24XX_IODEBUG | |
1742 | bool "Debug CPUfreq Samsung driver IO timing" | |
1743 | depends on CPU_FREQ_S3C24XX | |
1744 | help | |
1745 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1746 | ||
e6d197a6 BD |
1747 | config CPU_FREQ_S3C24XX_DEBUGFS |
1748 | bool "Export debugfs for CPUFreq" | |
1749 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1750 | help | |
1751 | Export status information via debugfs. | |
1752 | ||
1da177e4 LT |
1753 | endif |
1754 | ||
ac9d7efc RK |
1755 | source "drivers/cpuidle/Kconfig" |
1756 | ||
1757 | endmenu | |
1758 | ||
1da177e4 LT |
1759 | menu "Floating point emulation" |
1760 | ||
1761 | comment "At least one emulation must be selected" | |
1762 | ||
1763 | config FPE_NWFPE | |
1764 | bool "NWFPE math emulation" | |
8993a44c | 1765 | depends on !AEABI || OABI_COMPAT |
1da177e4 LT |
1766 | ---help--- |
1767 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1768 | This is necessary to run most binaries. Linux does not currently | |
1769 | support floating point hardware so you need to say Y here even if | |
1770 | your machine has an FPA or floating point co-processor podule. | |
1771 | ||
1772 | You may say N here if you are going to load the Acorn FPEmulator | |
1773 | early in the bootup. | |
1774 | ||
1775 | config FPE_NWFPE_XP | |
1776 | bool "Support extended precision" | |
bedf142b | 1777 | depends on FPE_NWFPE |
1da177e4 LT |
1778 | help |
1779 | Say Y to include 80-bit support in the kernel floating-point | |
1780 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1781 | Note that gcc does not generate 80-bit operations by default, | |
1782 | so in most cases this option only enlarges the size of the | |
1783 | floating point emulator without any good reason. | |
1784 | ||
1785 | You almost surely want to say N here. | |
1786 | ||
1787 | config FPE_FASTFPE | |
1788 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1789 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1790 | ---help--- |
1791 | Say Y here to include the FAST floating point emulator in the kernel. | |
1792 | This is an experimental much faster emulator which now also has full | |
1793 | precision for the mantissa. It does not support any exceptions. | |
1794 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1795 | ||
1796 | It should be sufficient for most programs. It may be not suitable | |
1797 | for scientific calculations, but you have to check this for yourself. | |
1798 | If you do not feel you need a faster FP emulation you should better | |
1799 | choose NWFPE. | |
1800 | ||
1801 | config VFP | |
1802 | bool "VFP-format floating point maths" | |
c00d4ffd | 1803 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1804 | help |
1805 | Say Y to include VFP support code in the kernel. This is needed | |
1806 | if your hardware includes a VFP unit. | |
1807 | ||
1808 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1809 | release notes and additional status information. | |
1810 | ||
1811 | Say N if your target does not have VFP hardware. | |
1812 | ||
25ebee02 CM |
1813 | config VFPv3 |
1814 | bool | |
1815 | depends on VFP | |
1816 | default y if CPU_V7 | |
1817 | ||
b5872db4 CM |
1818 | config NEON |
1819 | bool "Advanced SIMD (NEON) Extension support" | |
1820 | depends on VFPv3 && CPU_V7 | |
1821 | help | |
1822 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1823 | Extension. | |
1824 | ||
1da177e4 LT |
1825 | endmenu |
1826 | ||
1827 | menu "Userspace binary formats" | |
1828 | ||
1829 | source "fs/Kconfig.binfmt" | |
1830 | ||
1831 | config ARTHUR | |
1832 | tristate "RISC OS personality" | |
704bdda0 | 1833 | depends on !AEABI |
1da177e4 LT |
1834 | help |
1835 | Say Y here to include the kernel code necessary if you want to run | |
1836 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1837 | experimental; if this sounds frightening, say N and sleep in peace. | |
1838 | You can also say M here to compile this support as a module (which | |
1839 | will be called arthur). | |
1840 | ||
1841 | endmenu | |
1842 | ||
1843 | menu "Power management options" | |
1844 | ||
eceab4ac | 1845 | source "kernel/power/Kconfig" |
1da177e4 | 1846 | |
f4cb5700 JB |
1847 | config ARCH_SUSPEND_POSSIBLE |
1848 | def_bool y | |
1849 | ||
1da177e4 LT |
1850 | endmenu |
1851 | ||
d5950b43 SR |
1852 | source "net/Kconfig" |
1853 | ||
ac25150f | 1854 | source "drivers/Kconfig" |
1da177e4 LT |
1855 | |
1856 | source "fs/Kconfig" | |
1857 | ||
1da177e4 LT |
1858 | source "arch/arm/Kconfig.debug" |
1859 | ||
1860 | source "security/Kconfig" | |
1861 | ||
1862 | source "crypto/Kconfig" | |
1863 | ||
1864 | source "lib/Kconfig" |