Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | config ARM |
2 | bool | |
3 | default y | |
e17c6d56 | 4 | select HAVE_AOUT |
24056f52 | 5 | select HAVE_DMA_API_DEBUG |
2064c946 | 6 | select HAVE_IDE |
2778f620 | 7 | select HAVE_MEMBLOCK |
12b824fb | 8 | select RTC_LIB |
75e7153a | 9 | select SYS_SUPPORTS_APM_EMULATION |
d4c7b1f9 | 10 | select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) |
fe166148 | 11 | select HAVE_OPROFILE if (HAVE_PERF_EVENTS) |
5cbad0eb | 12 | select HAVE_ARCH_KGDB |
ed7c84d5 | 13 | select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL) |
9edddaa2 | 14 | select HAVE_KRETPROBES if (HAVE_KPROBES) |
606576ce | 15 | select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) |
80be7a7f RV |
16 | select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) |
17 | select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) | |
0e341af8 | 18 | select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) |
1fe53268 | 19 | select HAVE_GENERIC_DMA_COHERENT |
e7db7b42 AT |
20 | select HAVE_KERNEL_GZIP |
21 | select HAVE_KERNEL_LZO | |
6e8699f7 | 22 | select HAVE_KERNEL_LZMA |
e360adbe | 23 | select HAVE_IRQ_WORK |
7ada189f JI |
24 | select HAVE_PERF_EVENTS |
25 | select PERF_USE_VMALLOC | |
e513f8bf | 26 | select HAVE_REGS_AND_STACK_ACCESS_API |
19852e59 | 27 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
ed60453f | 28 | select HAVE_C_RECORDMCOUNT |
e2a93ecc LB |
29 | select HAVE_GENERIC_HARDIRQS |
30 | select HAVE_SPARSE_IRQ | |
1da177e4 LT |
31 | help |
32 | The ARM series is a line of low-power-consumption RISC chip designs | |
f6c8965a | 33 | licensed by ARM Ltd and targeted at embedded applications and |
1da177e4 | 34 | handhelds such as the Compaq IPAQ. ARM-based PCs are no longer |
f6c8965a | 35 | manufactured, but legacy ARM-based PC hardware remains popular in |
1da177e4 LT |
36 | Europe. There is an ARM Linux project with a web page at |
37 | <http://www.arm.linux.org.uk/>. | |
38 | ||
1a189b97 RK |
39 | config HAVE_PWM |
40 | bool | |
41 | ||
0b05da72 HUK |
42 | config MIGHT_HAVE_PCI |
43 | bool | |
44 | ||
75e7153a RB |
45 | config SYS_SUPPORTS_APM_EMULATION |
46 | bool | |
47 | ||
112f38a4 RK |
48 | config HAVE_SCHED_CLOCK |
49 | bool | |
50 | ||
0a938b97 DB |
51 | config GENERIC_GPIO |
52 | bool | |
0a938b97 | 53 | |
5cfc8ee0 JS |
54 | config ARCH_USES_GETTIMEOFFSET |
55 | bool | |
56 | default n | |
746140c7 | 57 | |
0567a0c0 KH |
58 | config GENERIC_CLOCKEVENTS |
59 | bool | |
0567a0c0 | 60 | |
a8655e83 CM |
61 | config GENERIC_CLOCKEVENTS_BROADCAST |
62 | bool | |
63 | depends on GENERIC_CLOCKEVENTS | |
5388a6b2 | 64 | default y if SMP |
a8655e83 | 65 | |
bc581770 LW |
66 | config HAVE_TCM |
67 | bool | |
68 | select GENERIC_ALLOCATOR | |
69 | ||
e119bfff RK |
70 | config HAVE_PROC_CPU |
71 | bool | |
72 | ||
5ea81769 AV |
73 | config NO_IOPORT |
74 | bool | |
5ea81769 | 75 | |
1da177e4 LT |
76 | config EISA |
77 | bool | |
78 | ---help--- | |
79 | The Extended Industry Standard Architecture (EISA) bus was | |
80 | developed as an open alternative to the IBM MicroChannel bus. | |
81 | ||
82 | The EISA bus provided some of the features of the IBM MicroChannel | |
83 | bus while maintaining backward compatibility with cards made for | |
84 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
85 | 1995 when it was made obsolete by the PCI bus. | |
86 | ||
87 | Say Y here if you are building a kernel for an EISA-based machine. | |
88 | ||
89 | Otherwise, say N. | |
90 | ||
91 | config SBUS | |
92 | bool | |
93 | ||
94 | config MCA | |
95 | bool | |
96 | help | |
97 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
98 | laptops. It is a bus system similar to PCI or ISA. See | |
99 | <file:Documentation/mca.txt> (and especially the web page given | |
100 | there) before attempting to build an MCA bus kernel. | |
101 | ||
f16fb1ec RK |
102 | config STACKTRACE_SUPPORT |
103 | bool | |
104 | default y | |
105 | ||
f76e9154 NP |
106 | config HAVE_LATENCYTOP_SUPPORT |
107 | bool | |
108 | depends on !SMP | |
109 | default y | |
110 | ||
f16fb1ec RK |
111 | config LOCKDEP_SUPPORT |
112 | bool | |
113 | default y | |
114 | ||
7ad1bcb2 RK |
115 | config TRACE_IRQFLAGS_SUPPORT |
116 | bool | |
117 | default y | |
118 | ||
4a2581a0 TG |
119 | config HARDIRQS_SW_RESEND |
120 | bool | |
121 | default y | |
122 | ||
123 | config GENERIC_IRQ_PROBE | |
124 | bool | |
125 | default y | |
126 | ||
95c354fe NP |
127 | config GENERIC_LOCKBREAK |
128 | bool | |
129 | default y | |
130 | depends on SMP && PREEMPT | |
131 | ||
1da177e4 LT |
132 | config RWSEM_GENERIC_SPINLOCK |
133 | bool | |
134 | default y | |
135 | ||
136 | config RWSEM_XCHGADD_ALGORITHM | |
137 | bool | |
138 | ||
f0d1b0b3 DH |
139 | config ARCH_HAS_ILOG2_U32 |
140 | bool | |
f0d1b0b3 DH |
141 | |
142 | config ARCH_HAS_ILOG2_U64 | |
143 | bool | |
f0d1b0b3 | 144 | |
89c52ed4 BD |
145 | config ARCH_HAS_CPUFREQ |
146 | bool | |
147 | help | |
148 | Internal node to signify that the ARCH has CPUFREQ support | |
149 | and that the relevant menu configurations are displayed for | |
150 | it. | |
151 | ||
c7b0aff4 KH |
152 | config ARCH_HAS_CPU_IDLE_WAIT |
153 | def_bool y | |
154 | ||
b89c3b16 AM |
155 | config GENERIC_HWEIGHT |
156 | bool | |
157 | default y | |
158 | ||
1da177e4 LT |
159 | config GENERIC_CALIBRATE_DELAY |
160 | bool | |
161 | default y | |
162 | ||
a08b6b79 Z |
163 | config ARCH_MAY_HAVE_PC_FDC |
164 | bool | |
165 | ||
5ac6da66 CL |
166 | config ZONE_DMA |
167 | bool | |
5ac6da66 | 168 | |
ccd7ab7f FT |
169 | config NEED_DMA_MAP_STATE |
170 | def_bool y | |
171 | ||
1da177e4 LT |
172 | config GENERIC_ISA_DMA |
173 | bool | |
174 | ||
1da177e4 LT |
175 | config FIQ |
176 | bool | |
177 | ||
034d2f5a AV |
178 | config ARCH_MTD_XIP |
179 | bool | |
180 | ||
d6d502fa KK |
181 | config ARM_L1_CACHE_SHIFT_6 |
182 | bool | |
183 | help | |
184 | Setting ARM L1 cache line size to 64 Bytes. | |
185 | ||
c760fc19 HC |
186 | config VECTORS_BASE |
187 | hex | |
6afd6fae | 188 | default 0xffff0000 if MMU || CPU_HIGH_VECTOR |
c760fc19 HC |
189 | default DRAM_BASE if REMAP_VECTORS_TO_RAM |
190 | default 0x00000000 | |
191 | help | |
192 | The base address of exception vectors. | |
193 | ||
dc21af99 RK |
194 | config ARM_PATCH_PHYS_VIRT |
195 | bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" | |
196 | depends on EXPERIMENTAL | |
197 | depends on !XIP_KERNEL && !THUMB2_KERNEL && MMU | |
198 | depends on !ARCH_MSM | |
199 | depends on !ARCH_REALVIEW || !SPARSEMEM | |
200 | help | |
201 | Patch phys-to-virt translation functions at runtime according to | |
202 | the position of the kernel in system memory. | |
203 | ||
204 | This can only be used with non-XIP, non-Thumb2, MMU kernels where | |
205 | the base of physical memory is at a 16MB boundary. | |
206 | ||
1da177e4 LT |
207 | source "init/Kconfig" |
208 | ||
dc52ddc0 MH |
209 | source "kernel/Kconfig.freezer" |
210 | ||
1da177e4 LT |
211 | menu "System Type" |
212 | ||
3c427975 HC |
213 | config MMU |
214 | bool "MMU-based Paged Memory Management Support" | |
215 | default y | |
216 | help | |
217 | Select if you want MMU-based virtualised addressing space | |
218 | support by paged memory management. If unsure, say 'Y'. | |
219 | ||
ccf50e23 RK |
220 | # |
221 | # The "ARM system type" choice list is ordered alphabetically by option | |
222 | # text. Please add new entries in the option alphabetic order. | |
223 | # | |
1da177e4 LT |
224 | choice |
225 | prompt "ARM system type" | |
6a0e2430 | 226 | default ARCH_VERSATILE |
1da177e4 | 227 | |
4af6fee1 DS |
228 | config ARCH_AAEC2000 |
229 | bool "Agilent AAEC-2000 based" | |
c750815e | 230 | select CPU_ARM920T |
4af6fee1 | 231 | select ARM_AMBA |
9483a578 | 232 | select HAVE_CLK |
5cfc8ee0 | 233 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
234 | help |
235 | This enables support for systems based on the Agilent AAEC-2000 | |
236 | ||
237 | config ARCH_INTEGRATOR | |
238 | bool "ARM Ltd. Integrator family" | |
239 | select ARM_AMBA | |
89c52ed4 | 240 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 241 | select CLKDEV_LOOKUP |
c5a0adb5 | 242 | select ICST |
13edd86d | 243 | select GENERIC_CLOCKEVENTS |
f4b8b319 | 244 | select PLAT_VERSATILE |
4af6fee1 DS |
245 | help |
246 | Support for ARM's Integrator platform. | |
247 | ||
248 | config ARCH_REALVIEW | |
249 | bool "ARM Ltd. RealView family" | |
250 | select ARM_AMBA | |
6d803ba7 | 251 | select CLKDEV_LOOKUP |
1da0c89c | 252 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 253 | select ICST |
ae30ceac | 254 | select GENERIC_CLOCKEVENTS |
eb7fffa3 | 255 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 256 | select PLAT_VERSATILE |
e3887714 | 257 | select ARM_TIMER_SP804 |
b56ba8aa | 258 | select GPIO_PL061 if GPIOLIB |
4af6fee1 DS |
259 | help |
260 | This enables support for ARM Ltd RealView boards. | |
261 | ||
262 | config ARCH_VERSATILE | |
263 | bool "ARM Ltd. Versatile family" | |
264 | select ARM_AMBA | |
265 | select ARM_VIC | |
6d803ba7 | 266 | select CLKDEV_LOOKUP |
1da0c89c | 267 | select HAVE_SCHED_CLOCK |
c5a0adb5 | 268 | select ICST |
89df1272 | 269 | select GENERIC_CLOCKEVENTS |
bbeddc43 | 270 | select ARCH_WANT_OPTIONAL_GPIOLIB |
f4b8b319 | 271 | select PLAT_VERSATILE |
e3887714 | 272 | select ARM_TIMER_SP804 |
4af6fee1 DS |
273 | help |
274 | This enables support for ARM Ltd Versatile board. | |
275 | ||
ceade897 RK |
276 | config ARCH_VEXPRESS |
277 | bool "ARM Ltd. Versatile Express family" | |
278 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
279 | select ARM_AMBA | |
280 | select ARM_TIMER_SP804 | |
6d803ba7 | 281 | select CLKDEV_LOOKUP |
ceade897 | 282 | select GENERIC_CLOCKEVENTS |
ceade897 | 283 | select HAVE_CLK |
0af85dda | 284 | select HAVE_SCHED_CLOCK |
ceade897 RK |
285 | select ICST |
286 | select PLAT_VERSATILE | |
287 | help | |
288 | This enables support for the ARM Ltd Versatile Express boards. | |
289 | ||
8fc5ffa0 AV |
290 | config ARCH_AT91 |
291 | bool "Atmel AT91" | |
f373e8c0 | 292 | select ARCH_REQUIRE_GPIOLIB |
93686ae8 | 293 | select HAVE_CLK |
4af6fee1 | 294 | help |
2b3b3516 AV |
295 | This enables support for systems based on the Atmel AT91RM9200, |
296 | AT91SAM9 and AT91CAP9 processors. | |
4af6fee1 | 297 | |
ccf50e23 RK |
298 | config ARCH_BCMRING |
299 | bool "Broadcom BCMRING" | |
300 | depends on MMU | |
301 | select CPU_V6 | |
302 | select ARM_AMBA | |
6d803ba7 | 303 | select CLKDEV_LOOKUP |
ccf50e23 RK |
304 | select GENERIC_CLOCKEVENTS |
305 | select ARCH_WANT_OPTIONAL_GPIOLIB | |
306 | help | |
307 | Support for Broadcom's BCMRing platform. | |
308 | ||
1da177e4 | 309 | config ARCH_CLPS711X |
4af6fee1 | 310 | bool "Cirrus Logic CLPS711x/EP721x-based" |
c750815e | 311 | select CPU_ARM720T |
5cfc8ee0 | 312 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
313 | help |
314 | Support for Cirrus Logic 711x/721x based boards. | |
1da177e4 | 315 | |
d94f944e AV |
316 | config ARCH_CNS3XXX |
317 | bool "Cavium Networks CNS3XXX family" | |
318 | select CPU_V6 | |
d94f944e AV |
319 | select GENERIC_CLOCKEVENTS |
320 | select ARM_GIC | |
0b05da72 | 321 | select MIGHT_HAVE_PCI |
5f32f7a0 | 322 | select PCI_DOMAINS if PCI |
d94f944e AV |
323 | help |
324 | Support for Cavium Networks CNS3XXX platform. | |
325 | ||
788c9700 RK |
326 | config ARCH_GEMINI |
327 | bool "Cortina Systems Gemini" | |
328 | select CPU_FA526 | |
788c9700 | 329 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 330 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
331 | help |
332 | Support for the Cortina Systems Gemini family SoCs | |
333 | ||
1da177e4 LT |
334 | config ARCH_EBSA110 |
335 | bool "EBSA-110" | |
c750815e | 336 | select CPU_SA110 |
f7e68bbf | 337 | select ISA |
c5eb2a2b | 338 | select NO_IOPORT |
5cfc8ee0 | 339 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
340 | help |
341 | This is an evaluation board for the StrongARM processor available | |
f6c8965a | 342 | from Digital. It has limited hardware on-board, including an |
1da177e4 LT |
343 | Ethernet interface, two PCMCIA sockets, two serial ports and a |
344 | parallel port. | |
345 | ||
e7736d47 LB |
346 | config ARCH_EP93XX |
347 | bool "EP93xx-based" | |
c750815e | 348 | select CPU_ARM920T |
e7736d47 LB |
349 | select ARM_AMBA |
350 | select ARM_VIC | |
6d803ba7 | 351 | select CLKDEV_LOOKUP |
7444a72e | 352 | select ARCH_REQUIRE_GPIOLIB |
eb33575c | 353 | select ARCH_HAS_HOLES_MEMORYMODEL |
5cfc8ee0 | 354 | select ARCH_USES_GETTIMEOFFSET |
e7736d47 LB |
355 | help |
356 | This enables support for the Cirrus EP93xx series of CPUs. | |
357 | ||
1da177e4 LT |
358 | config ARCH_FOOTBRIDGE |
359 | bool "FootBridge" | |
c750815e | 360 | select CPU_SA110 |
1da177e4 | 361 | select FOOTBRIDGE |
5cfc8ee0 | 362 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
363 | help |
364 | Support for systems based on the DC21285 companion chip | |
365 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | |
1da177e4 | 366 | |
788c9700 RK |
367 | config ARCH_MXC |
368 | bool "Freescale MXC/iMX-based" | |
788c9700 | 369 | select GENERIC_CLOCKEVENTS |
788c9700 | 370 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 371 | select CLKDEV_LOOKUP |
788c9700 RK |
372 | help |
373 | Support for Freescale MXC/iMX-based family of processors | |
374 | ||
1d3f33d5 SG |
375 | config ARCH_MXS |
376 | bool "Freescale MXS-based" | |
377 | select GENERIC_CLOCKEVENTS | |
378 | select ARCH_REQUIRE_GPIOLIB | |
b9214b97 | 379 | select CLKDEV_LOOKUP |
1d3f33d5 SG |
380 | help |
381 | Support for Freescale MXS-based family of processors | |
382 | ||
7bd0f2f5 | 383 | config ARCH_STMP3XXX |
384 | bool "Freescale STMP3xxx" | |
385 | select CPU_ARM926T | |
6d803ba7 | 386 | select CLKDEV_LOOKUP |
7bd0f2f5 | 387 | select ARCH_REQUIRE_GPIOLIB |
7bd0f2f5 | 388 | select GENERIC_CLOCKEVENTS |
7bd0f2f5 | 389 | select USB_ARCH_HAS_EHCI |
390 | help | |
391 | Support for systems based on the Freescale 3xxx CPUs. | |
392 | ||
4af6fee1 DS |
393 | config ARCH_NETX |
394 | bool "Hilscher NetX based" | |
c750815e | 395 | select CPU_ARM926T |
4af6fee1 | 396 | select ARM_VIC |
2fcfe6b8 | 397 | select GENERIC_CLOCKEVENTS |
f999b8bd | 398 | help |
4af6fee1 DS |
399 | This enables support for systems based on the Hilscher NetX Soc |
400 | ||
401 | config ARCH_H720X | |
402 | bool "Hynix HMS720x-based" | |
c750815e | 403 | select CPU_ARM720T |
4af6fee1 | 404 | select ISA_DMA_API |
5cfc8ee0 | 405 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
406 | help |
407 | This enables support for systems based on the Hynix HMS720x | |
408 | ||
3b938be6 RK |
409 | config ARCH_IOP13XX |
410 | bool "IOP13xx-based" | |
411 | depends on MMU | |
c750815e | 412 | select CPU_XSC3 |
3b938be6 RK |
413 | select PLAT_IOP |
414 | select PCI | |
415 | select ARCH_SUPPORTS_MSI | |
8d5796d2 | 416 | select VMSPLIT_1G |
3b938be6 RK |
417 | help |
418 | Support for Intel's IOP13XX (XScale) family of processors. | |
419 | ||
3f7e5815 LB |
420 | config ARCH_IOP32X |
421 | bool "IOP32x-based" | |
a4f7e763 | 422 | depends on MMU |
c750815e | 423 | select CPU_XSCALE |
7ae1f7ec | 424 | select PLAT_IOP |
f7e68bbf | 425 | select PCI |
bb2b180c | 426 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd | 427 | help |
3f7e5815 LB |
428 | Support for Intel's 80219 and IOP32X (XScale) family of |
429 | processors. | |
430 | ||
431 | config ARCH_IOP33X | |
432 | bool "IOP33x-based" | |
433 | depends on MMU | |
c750815e | 434 | select CPU_XSCALE |
7ae1f7ec | 435 | select PLAT_IOP |
3f7e5815 | 436 | select PCI |
bb2b180c | 437 | select ARCH_REQUIRE_GPIOLIB |
3f7e5815 LB |
438 | help |
439 | Support for Intel's IOP33X (XScale) family of processors. | |
1da177e4 | 440 | |
3b938be6 RK |
441 | config ARCH_IXP23XX |
442 | bool "IXP23XX-based" | |
a4f7e763 | 443 | depends on MMU |
c750815e | 444 | select CPU_XSC3 |
3b938be6 | 445 | select PCI |
5cfc8ee0 | 446 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd | 447 | help |
3b938be6 | 448 | Support for Intel's IXP23xx (XScale) family of processors. |
1da177e4 LT |
449 | |
450 | config ARCH_IXP2000 | |
451 | bool "IXP2400/2800-based" | |
a4f7e763 | 452 | depends on MMU |
c750815e | 453 | select CPU_XSCALE |
f7e68bbf | 454 | select PCI |
5cfc8ee0 | 455 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
456 | help |
457 | Support for Intel's IXP2400/2800 (XScale) family of processors. | |
1da177e4 | 458 | |
3b938be6 RK |
459 | config ARCH_IXP4XX |
460 | bool "IXP4xx-based" | |
a4f7e763 | 461 | depends on MMU |
c750815e | 462 | select CPU_XSCALE |
8858e9af | 463 | select GENERIC_GPIO |
3b938be6 | 464 | select GENERIC_CLOCKEVENTS |
5b0d495c | 465 | select HAVE_SCHED_CLOCK |
0b05da72 | 466 | select MIGHT_HAVE_PCI |
485bdde7 | 467 | select DMABOUNCE if PCI |
c4713074 | 468 | help |
3b938be6 | 469 | Support for Intel's IXP4XX (XScale) family of processors. |
c4713074 | 470 | |
edabd38e SB |
471 | config ARCH_DOVE |
472 | bool "Marvell Dove" | |
473 | select PCI | |
edabd38e | 474 | select ARCH_REQUIRE_GPIOLIB |
edabd38e SB |
475 | select GENERIC_CLOCKEVENTS |
476 | select PLAT_ORION | |
477 | help | |
478 | Support for the Marvell Dove SoC 88AP510 | |
479 | ||
651c74c7 SB |
480 | config ARCH_KIRKWOOD |
481 | bool "Marvell Kirkwood" | |
c750815e | 482 | select CPU_FEROCEON |
651c74c7 | 483 | select PCI |
a8865655 | 484 | select ARCH_REQUIRE_GPIOLIB |
651c74c7 SB |
485 | select GENERIC_CLOCKEVENTS |
486 | select PLAT_ORION | |
487 | help | |
488 | Support for the following Marvell Kirkwood series SoCs: | |
489 | 88F6180, 88F6192 and 88F6281. | |
490 | ||
777f9beb LB |
491 | config ARCH_LOKI |
492 | bool "Marvell Loki (88RC8480)" | |
c750815e | 493 | select CPU_FEROCEON |
777f9beb LB |
494 | select GENERIC_CLOCKEVENTS |
495 | select PLAT_ORION | |
496 | help | |
497 | Support for the Marvell Loki (88RC8480) SoC. | |
498 | ||
40805949 KW |
499 | config ARCH_LPC32XX |
500 | bool "NXP LPC32XX" | |
501 | select CPU_ARM926T | |
502 | select ARCH_REQUIRE_GPIOLIB | |
503 | select HAVE_IDE | |
504 | select ARM_AMBA | |
505 | select USB_ARCH_HAS_OHCI | |
6d803ba7 | 506 | select CLKDEV_LOOKUP |
40805949 KW |
507 | select GENERIC_TIME |
508 | select GENERIC_CLOCKEVENTS | |
509 | help | |
510 | Support for the NXP LPC32XX family of processors | |
511 | ||
794d15b2 SS |
512 | config ARCH_MV78XX0 |
513 | bool "Marvell MV78xx0" | |
c750815e | 514 | select CPU_FEROCEON |
794d15b2 | 515 | select PCI |
a8865655 | 516 | select ARCH_REQUIRE_GPIOLIB |
794d15b2 SS |
517 | select GENERIC_CLOCKEVENTS |
518 | select PLAT_ORION | |
519 | help | |
520 | Support for the following Marvell MV78xx0 series SoCs: | |
521 | MV781x0, MV782x0. | |
522 | ||
9dd0b194 | 523 | config ARCH_ORION5X |
585cf175 TP |
524 | bool "Marvell Orion" |
525 | depends on MMU | |
c750815e | 526 | select CPU_FEROCEON |
038ee083 | 527 | select PCI |
a8865655 | 528 | select ARCH_REQUIRE_GPIOLIB |
51cbff1d | 529 | select GENERIC_CLOCKEVENTS |
69b02f6a | 530 | select PLAT_ORION |
585cf175 | 531 | help |
9dd0b194 | 532 | Support for the following Marvell Orion 5x series SoCs: |
d2b2a6bb | 533 | Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), |
d323ade1 | 534 | Orion-2 (5281), Orion-1-90 (6183). |
585cf175 | 535 | |
788c9700 | 536 | config ARCH_MMP |
2f7e8fae | 537 | bool "Marvell PXA168/910/MMP2" |
788c9700 | 538 | depends on MMU |
788c9700 | 539 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 540 | select CLKDEV_LOOKUP |
788c9700 | 541 | select GENERIC_CLOCKEVENTS |
28bb7bc6 | 542 | select HAVE_SCHED_CLOCK |
788c9700 RK |
543 | select TICK_ONESHOT |
544 | select PLAT_PXA | |
0bd86961 | 545 | select SPARSE_IRQ |
788c9700 | 546 | help |
2f7e8fae | 547 | Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. |
788c9700 RK |
548 | |
549 | config ARCH_KS8695 | |
550 | bool "Micrel/Kendin KS8695" | |
551 | select CPU_ARM922T | |
98830bc9 | 552 | select ARCH_REQUIRE_GPIOLIB |
5cfc8ee0 | 553 | select ARCH_USES_GETTIMEOFFSET |
788c9700 RK |
554 | help |
555 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | |
556 | System-on-Chip devices. | |
557 | ||
558 | config ARCH_NS9XXX | |
559 | bool "NetSilicon NS9xxx" | |
560 | select CPU_ARM926T | |
561 | select GENERIC_GPIO | |
788c9700 RK |
562 | select GENERIC_CLOCKEVENTS |
563 | select HAVE_CLK | |
564 | help | |
565 | Say Y here if you intend to run this kernel on a NetSilicon NS9xxx | |
566 | System. | |
567 | ||
568 | <http://www.digi.com/products/microprocessors/index.jsp> | |
569 | ||
570 | config ARCH_W90X900 | |
571 | bool "Nuvoton W90X900 CPU" | |
572 | select CPU_ARM926T | |
c52d3d68 | 573 | select ARCH_REQUIRE_GPIOLIB |
6d803ba7 | 574 | select CLKDEV_LOOKUP |
58b5369e | 575 | select GENERIC_CLOCKEVENTS |
788c9700 | 576 | help |
a8bc4ead | 577 | Support for Nuvoton (Winbond logic dept.) ARM9 processor, |
578 | At present, the w90x900 has been renamed nuc900, regarding | |
579 | the ARM series product line, you can login the following | |
580 | link address to know more. | |
581 | ||
582 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ | |
583 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> | |
788c9700 | 584 | |
a62e9030 | 585 | config ARCH_NUC93X |
586 | bool "Nuvoton NUC93X CPU" | |
587 | select CPU_ARM926T | |
6d803ba7 | 588 | select CLKDEV_LOOKUP |
a62e9030 | 589 | help |
590 | Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
591 | low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
592 | ||
c5f80065 EG |
593 | config ARCH_TEGRA |
594 | bool "NVIDIA Tegra" | |
4073723a | 595 | select CLKDEV_LOOKUP |
c5f80065 EG |
596 | select GENERIC_TIME |
597 | select GENERIC_CLOCKEVENTS | |
598 | select GENERIC_GPIO | |
599 | select HAVE_CLK | |
e3f4c0ab | 600 | select HAVE_SCHED_CLOCK |
c5f80065 | 601 | select ARCH_HAS_BARRIERS if CACHE_L2X0 |
7056d423 | 602 | select ARCH_HAS_CPUFREQ |
c5f80065 EG |
603 | help |
604 | This enables support for NVIDIA Tegra based systems (Tegra APX, | |
605 | Tegra 6xx and Tegra 2 series). | |
606 | ||
4af6fee1 DS |
607 | config ARCH_PNX4008 |
608 | bool "Philips Nexperia PNX4008 Mobile" | |
c750815e | 609 | select CPU_ARM926T |
6d803ba7 | 610 | select CLKDEV_LOOKUP |
5cfc8ee0 | 611 | select ARCH_USES_GETTIMEOFFSET |
4af6fee1 DS |
612 | help |
613 | This enables support for Philips PNX4008 mobile platform. | |
614 | ||
1da177e4 | 615 | config ARCH_PXA |
2c8086a5 | 616 | bool "PXA2xx/PXA3xx-based" |
a4f7e763 | 617 | depends on MMU |
034d2f5a | 618 | select ARCH_MTD_XIP |
89c52ed4 | 619 | select ARCH_HAS_CPUFREQ |
6d803ba7 | 620 | select CLKDEV_LOOKUP |
7444a72e | 621 | select ARCH_REQUIRE_GPIOLIB |
981d0f39 | 622 | select GENERIC_CLOCKEVENTS |
7ce83018 | 623 | select HAVE_SCHED_CLOCK |
a88264c2 | 624 | select TICK_ONESHOT |
bd5ce433 | 625 | select PLAT_PXA |
6ac6b817 | 626 | select SPARSE_IRQ |
f999b8bd | 627 | help |
2c8086a5 | 628 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
1da177e4 | 629 | |
788c9700 RK |
630 | config ARCH_MSM |
631 | bool "Qualcomm MSM" | |
4b536b8d | 632 | select HAVE_CLK |
49cbe786 | 633 | select GENERIC_CLOCKEVENTS |
923a081c | 634 | select ARCH_REQUIRE_GPIOLIB |
49cbe786 | 635 | help |
4b53eb4f DW |
636 | Support for Qualcomm MSM/QSD based systems. This runs on the |
637 | apps processor of the MSM/QSD and depends on a shared memory | |
638 | interface to the modem processor which runs the baseband | |
639 | stack and controls some vital subsystems | |
640 | (clock and power control, etc). | |
49cbe786 | 641 | |
c793c1b0 | 642 | config ARCH_SHMOBILE |
6d72ad35 PM |
643 | bool "Renesas SH-Mobile / R-Mobile" |
644 | select HAVE_CLK | |
5e93c6b4 | 645 | select CLKDEV_LOOKUP |
6d72ad35 PM |
646 | select GENERIC_CLOCKEVENTS |
647 | select NO_IOPORT | |
648 | select SPARSE_IRQ | |
60f1435c | 649 | select MULTI_IRQ_HANDLER |
c793c1b0 | 650 | help |
6d72ad35 | 651 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
c793c1b0 | 652 | |
1da177e4 LT |
653 | config ARCH_RPC |
654 | bool "RiscPC" | |
655 | select ARCH_ACORN | |
656 | select FIQ | |
657 | select TIMER_ACORN | |
a08b6b79 | 658 | select ARCH_MAY_HAVE_PC_FDC |
341eb781 | 659 | select HAVE_PATA_PLATFORM |
065909b9 | 660 | select ISA_DMA_API |
5ea81769 | 661 | select NO_IOPORT |
07f841b7 | 662 | select ARCH_SPARSEMEM_ENABLE |
5cfc8ee0 | 663 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
664 | help |
665 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | |
666 | CD-ROM interface, serial and parallel port, and the floppy drive. | |
667 | ||
668 | config ARCH_SA1100 | |
669 | bool "SA1100-based" | |
c750815e | 670 | select CPU_SA1100 |
f7e68bbf | 671 | select ISA |
05944d74 | 672 | select ARCH_SPARSEMEM_ENABLE |
034d2f5a | 673 | select ARCH_MTD_XIP |
89c52ed4 | 674 | select ARCH_HAS_CPUFREQ |
1937f5b9 | 675 | select CPU_FREQ |
3e238be2 | 676 | select GENERIC_CLOCKEVENTS |
9483a578 | 677 | select HAVE_CLK |
5094b92f | 678 | select HAVE_SCHED_CLOCK |
3e238be2 | 679 | select TICK_ONESHOT |
7444a72e | 680 | select ARCH_REQUIRE_GPIOLIB |
f999b8bd MM |
681 | help |
682 | Support for StrongARM 11x0 based boards. | |
1da177e4 LT |
683 | |
684 | config ARCH_S3C2410 | |
63b1f51b | 685 | bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450" |
0a938b97 | 686 | select GENERIC_GPIO |
9d56c02a | 687 | select ARCH_HAS_CPUFREQ |
9483a578 | 688 | select HAVE_CLK |
5cfc8ee0 | 689 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 690 | select HAVE_S3C2410_I2C if I2C |
1da177e4 LT |
691 | help |
692 | Samsung S3C2410X CPU based systems, such as the Simtec Electronics | |
693 | BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or | |
f6c8965a | 694 | the Samsung SMDK2410 development board (and derivatives). |
1da177e4 | 695 | |
63b1f51b BD |
696 | Note, the S3C2416 and the S3C2450 are so close that they even share |
697 | the same SoC ID code. This means that there is no seperate machine | |
698 | directory (no arch/arm/mach-s3c2450) as the S3C2416 was first. | |
699 | ||
a08ab637 BD |
700 | config ARCH_S3C64XX |
701 | bool "Samsung S3C64XX" | |
89f1fa08 | 702 | select PLAT_SAMSUNG |
89f0ce72 | 703 | select CPU_V6 |
89f0ce72 | 704 | select ARM_VIC |
a08ab637 | 705 | select HAVE_CLK |
89f0ce72 | 706 | select NO_IOPORT |
5cfc8ee0 | 707 | select ARCH_USES_GETTIMEOFFSET |
89c52ed4 | 708 | select ARCH_HAS_CPUFREQ |
89f0ce72 BD |
709 | select ARCH_REQUIRE_GPIOLIB |
710 | select SAMSUNG_CLKSRC | |
711 | select SAMSUNG_IRQ_VIC_TIMER | |
712 | select SAMSUNG_IRQ_UART | |
713 | select S3C_GPIO_TRACK | |
714 | select S3C_GPIO_PULL_UPDOWN | |
715 | select S3C_GPIO_CFG_S3C24XX | |
716 | select S3C_GPIO_CFG_S3C64XX | |
717 | select S3C_DEV_NAND | |
718 | select USB_ARCH_HAS_OHCI | |
719 | select SAMSUNG_GPIOLIB_4BIT | |
20676c15 | 720 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 721 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
a08ab637 BD |
722 | help |
723 | Samsung S3C64XX series based systems | |
724 | ||
49b7a491 KK |
725 | config ARCH_S5P64X0 |
726 | bool "Samsung S5P6440 S5P6450" | |
c4ffccdd KK |
727 | select CPU_V6 |
728 | select GENERIC_GPIO | |
729 | select HAVE_CLK | |
c39d8d55 | 730 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
925c68cd | 731 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 732 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 733 | select HAVE_S3C_RTC if RTC_CLASS |
c4ffccdd | 734 | help |
49b7a491 KK |
735 | Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, |
736 | SMDK6450. | |
c4ffccdd | 737 | |
550db7f1 KK |
738 | config ARCH_S5P6442 |
739 | bool "Samsung S5P6442" | |
740 | select CPU_V6 | |
741 | select GENERIC_GPIO | |
742 | select HAVE_CLK | |
925c68cd | 743 | select ARCH_USES_GETTIMEOFFSET |
c39d8d55 | 744 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
550db7f1 KK |
745 | help |
746 | Samsung S5P6442 CPU based systems | |
747 | ||
acc84707 MS |
748 | config ARCH_S5PC100 |
749 | bool "Samsung S5PC100" | |
5a7652f2 BM |
750 | select GENERIC_GPIO |
751 | select HAVE_CLK | |
752 | select CPU_V7 | |
d6d502fa | 753 | select ARM_L1_CACHE_SHIFT_6 |
925c68cd | 754 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 755 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 756 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 757 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
5a7652f2 | 758 | help |
acc84707 | 759 | Samsung S5PC100 series based systems |
5a7652f2 | 760 | |
170f4e42 KK |
761 | config ARCH_S5PV210 |
762 | bool "Samsung S5PV210/S5PC110" | |
763 | select CPU_V7 | |
eecb6a84 | 764 | select ARCH_SPARSEMEM_ENABLE |
170f4e42 KK |
765 | select GENERIC_GPIO |
766 | select HAVE_CLK | |
767 | select ARM_L1_CACHE_SHIFT_6 | |
d8144aea | 768 | select ARCH_HAS_CPUFREQ |
925c68cd | 769 | select ARCH_USES_GETTIMEOFFSET |
20676c15 | 770 | select HAVE_S3C2410_I2C if I2C |
754961a8 | 771 | select HAVE_S3C_RTC if RTC_CLASS |
c39d8d55 | 772 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
170f4e42 KK |
773 | help |
774 | Samsung S5PV210/S5PC110 series based systems | |
775 | ||
cc0e72b8 CY |
776 | config ARCH_S5PV310 |
777 | bool "Samsung S5PV310/S5PC210" | |
778 | select CPU_V7 | |
f567fa6f | 779 | select ARCH_SPARSEMEM_ENABLE |
cc0e72b8 CY |
780 | select GENERIC_GPIO |
781 | select HAVE_CLK | |
b333fb16 | 782 | select ARCH_HAS_CPUFREQ |
cc0e72b8 | 783 | select GENERIC_CLOCKEVENTS |
754961a8 | 784 | select HAVE_S3C_RTC if RTC_CLASS |
20676c15 | 785 | select HAVE_S3C2410_I2C if I2C |
c39d8d55 | 786 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
cc0e72b8 CY |
787 | help |
788 | Samsung S5PV310 series based systems | |
789 | ||
1da177e4 LT |
790 | config ARCH_SHARK |
791 | bool "Shark" | |
c750815e | 792 | select CPU_SA110 |
f7e68bbf RK |
793 | select ISA |
794 | select ISA_DMA | |
3bca103a | 795 | select ZONE_DMA |
f7e68bbf | 796 | select PCI |
5cfc8ee0 | 797 | select ARCH_USES_GETTIMEOFFSET |
f999b8bd MM |
798 | help |
799 | Support for the StrongARM based Digital DNARD machine, also known | |
800 | as "Shark" (<http://www.shark-linux.de/shark.html>). | |
1da177e4 | 801 | |
83ef3338 HK |
802 | config ARCH_TCC_926 |
803 | bool "Telechips TCC ARM926-based systems" | |
804 | select CPU_ARM926T | |
805 | select HAVE_CLK | |
6d803ba7 | 806 | select CLKDEV_LOOKUP |
83ef3338 HK |
807 | select GENERIC_CLOCKEVENTS |
808 | help | |
809 | Support for Telechips TCC ARM926-based systems. | |
810 | ||
1da177e4 LT |
811 | config ARCH_LH7A40X |
812 | bool "Sharp LH7A40X" | |
c750815e | 813 | select CPU_ARM922T |
4ba3f7c5 | 814 | select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM |
5cfc8ee0 | 815 | select ARCH_USES_GETTIMEOFFSET |
1da177e4 LT |
816 | help |
817 | Say Y here for systems based on one of the Sharp LH7A40X | |
818 | System on a Chip processors. These CPUs include an ARM922T | |
819 | core with a wide array of integrated devices for | |
820 | hand-held and low-power applications. | |
821 | ||
d98aac75 LW |
822 | config ARCH_U300 |
823 | bool "ST-Ericsson U300 Series" | |
824 | depends on MMU | |
825 | select CPU_ARM926T | |
5c21b7ca | 826 | select HAVE_SCHED_CLOCK |
bc581770 | 827 | select HAVE_TCM |
d98aac75 LW |
828 | select ARM_AMBA |
829 | select ARM_VIC | |
d98aac75 | 830 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 831 | select CLKDEV_LOOKUP |
d98aac75 LW |
832 | select GENERIC_GPIO |
833 | help | |
834 | Support for ST-Ericsson U300 series mobile platforms. | |
835 | ||
ccf50e23 RK |
836 | config ARCH_U8500 |
837 | bool "ST-Ericsson U8500 Series" | |
838 | select CPU_V7 | |
839 | select ARM_AMBA | |
ccf50e23 | 840 | select GENERIC_CLOCKEVENTS |
6d803ba7 | 841 | select CLKDEV_LOOKUP |
94bdc0e2 | 842 | select ARCH_REQUIRE_GPIOLIB |
7c1a70e9 | 843 | select ARCH_HAS_CPUFREQ |
ccf50e23 RK |
844 | help |
845 | Support for ST-Ericsson's Ux500 architecture | |
846 | ||
847 | config ARCH_NOMADIK | |
848 | bool "STMicroelectronics Nomadik" | |
849 | select ARM_AMBA | |
850 | select ARM_VIC | |
851 | select CPU_ARM926T | |
6d803ba7 | 852 | select CLKDEV_LOOKUP |
ccf50e23 | 853 | select GENERIC_CLOCKEVENTS |
ccf50e23 RK |
854 | select ARCH_REQUIRE_GPIOLIB |
855 | help | |
856 | Support for the Nomadik platform by ST-Ericsson | |
857 | ||
7c6337e2 KH |
858 | config ARCH_DAVINCI |
859 | bool "TI DaVinci" | |
7c6337e2 | 860 | select GENERIC_CLOCKEVENTS |
dce1115b | 861 | select ARCH_REQUIRE_GPIOLIB |
3bca103a | 862 | select ZONE_DMA |
9232fcc9 | 863 | select HAVE_IDE |
6d803ba7 | 864 | select CLKDEV_LOOKUP |
20e9969b | 865 | select GENERIC_ALLOCATOR |
ae88e05a | 866 | select ARCH_HAS_HOLES_MEMORYMODEL |
7c6337e2 KH |
867 | help |
868 | Support for TI's DaVinci platform. | |
869 | ||
3b938be6 RK |
870 | config ARCH_OMAP |
871 | bool "TI OMAP" | |
9483a578 | 872 | select HAVE_CLK |
7444a72e | 873 | select ARCH_REQUIRE_GPIOLIB |
89c52ed4 | 874 | select ARCH_HAS_CPUFREQ |
06cad098 | 875 | select GENERIC_CLOCKEVENTS |
dc548fbb | 876 | select HAVE_SCHED_CLOCK |
9af915da | 877 | select ARCH_HAS_HOLES_MEMORYMODEL |
3b938be6 | 878 | help |
6e457bb0 | 879 | Support for TI's OMAP platform (OMAP1/2/3/4). |
3b938be6 | 880 | |
cee37e50 | 881 | config PLAT_SPEAR |
882 | bool "ST SPEAr" | |
883 | select ARM_AMBA | |
884 | select ARCH_REQUIRE_GPIOLIB | |
6d803ba7 | 885 | select CLKDEV_LOOKUP |
cee37e50 | 886 | select GENERIC_CLOCKEVENTS |
cee37e50 | 887 | select HAVE_CLK |
888 | help | |
889 | Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx). | |
890 | ||
1da177e4 LT |
891 | endchoice |
892 | ||
ccf50e23 RK |
893 | # |
894 | # This is sorted alphabetically by mach-* pathname. However, plat-* | |
895 | # Kconfigs may be included either alphabetically (according to the | |
896 | # plat- suffix) or along side the corresponding mach-* source. | |
897 | # | |
95b8f20f RK |
898 | source "arch/arm/mach-aaec2000/Kconfig" |
899 | ||
900 | source "arch/arm/mach-at91/Kconfig" | |
901 | ||
902 | source "arch/arm/mach-bcmring/Kconfig" | |
903 | ||
1da177e4 LT |
904 | source "arch/arm/mach-clps711x/Kconfig" |
905 | ||
d94f944e AV |
906 | source "arch/arm/mach-cns3xxx/Kconfig" |
907 | ||
95b8f20f RK |
908 | source "arch/arm/mach-davinci/Kconfig" |
909 | ||
910 | source "arch/arm/mach-dove/Kconfig" | |
911 | ||
e7736d47 LB |
912 | source "arch/arm/mach-ep93xx/Kconfig" |
913 | ||
1da177e4 LT |
914 | source "arch/arm/mach-footbridge/Kconfig" |
915 | ||
59d3a193 PZ |
916 | source "arch/arm/mach-gemini/Kconfig" |
917 | ||
95b8f20f RK |
918 | source "arch/arm/mach-h720x/Kconfig" |
919 | ||
1da177e4 LT |
920 | source "arch/arm/mach-integrator/Kconfig" |
921 | ||
3f7e5815 LB |
922 | source "arch/arm/mach-iop32x/Kconfig" |
923 | ||
924 | source "arch/arm/mach-iop33x/Kconfig" | |
1da177e4 | 925 | |
285f5fa7 DW |
926 | source "arch/arm/mach-iop13xx/Kconfig" |
927 | ||
1da177e4 LT |
928 | source "arch/arm/mach-ixp4xx/Kconfig" |
929 | ||
930 | source "arch/arm/mach-ixp2000/Kconfig" | |
931 | ||
c4713074 LB |
932 | source "arch/arm/mach-ixp23xx/Kconfig" |
933 | ||
95b8f20f RK |
934 | source "arch/arm/mach-kirkwood/Kconfig" |
935 | ||
936 | source "arch/arm/mach-ks8695/Kconfig" | |
937 | ||
938 | source "arch/arm/mach-lh7a40x/Kconfig" | |
939 | ||
777f9beb LB |
940 | source "arch/arm/mach-loki/Kconfig" |
941 | ||
40805949 KW |
942 | source "arch/arm/mach-lpc32xx/Kconfig" |
943 | ||
95b8f20f RK |
944 | source "arch/arm/mach-msm/Kconfig" |
945 | ||
794d15b2 SS |
946 | source "arch/arm/mach-mv78xx0/Kconfig" |
947 | ||
95b8f20f | 948 | source "arch/arm/plat-mxc/Kconfig" |
1da177e4 | 949 | |
1d3f33d5 SG |
950 | source "arch/arm/mach-mxs/Kconfig" |
951 | ||
95b8f20f | 952 | source "arch/arm/mach-netx/Kconfig" |
49cbe786 | 953 | |
95b8f20f RK |
954 | source "arch/arm/mach-nomadik/Kconfig" |
955 | source "arch/arm/plat-nomadik/Kconfig" | |
956 | ||
957 | source "arch/arm/mach-ns9xxx/Kconfig" | |
1da177e4 | 958 | |
186f93ea | 959 | source "arch/arm/mach-nuc93x/Kconfig" |
1da177e4 | 960 | |
d48af15e TL |
961 | source "arch/arm/plat-omap/Kconfig" |
962 | ||
963 | source "arch/arm/mach-omap1/Kconfig" | |
1da177e4 | 964 | |
1dbae815 TL |
965 | source "arch/arm/mach-omap2/Kconfig" |
966 | ||
9dd0b194 | 967 | source "arch/arm/mach-orion5x/Kconfig" |
585cf175 | 968 | |
95b8f20f RK |
969 | source "arch/arm/mach-pxa/Kconfig" |
970 | source "arch/arm/plat-pxa/Kconfig" | |
585cf175 | 971 | |
95b8f20f RK |
972 | source "arch/arm/mach-mmp/Kconfig" |
973 | ||
974 | source "arch/arm/mach-realview/Kconfig" | |
975 | ||
976 | source "arch/arm/mach-sa1100/Kconfig" | |
edabd38e | 977 | |
cf383678 | 978 | source "arch/arm/plat-samsung/Kconfig" |
a21765a7 | 979 | source "arch/arm/plat-s3c24xx/Kconfig" |
c4ffccdd | 980 | source "arch/arm/plat-s5p/Kconfig" |
a21765a7 | 981 | |
cee37e50 | 982 | source "arch/arm/plat-spear/Kconfig" |
a21765a7 | 983 | |
83ef3338 HK |
984 | source "arch/arm/plat-tcc/Kconfig" |
985 | ||
a21765a7 BD |
986 | if ARCH_S3C2410 |
987 | source "arch/arm/mach-s3c2400/Kconfig" | |
1da177e4 | 988 | source "arch/arm/mach-s3c2410/Kconfig" |
a21765a7 | 989 | source "arch/arm/mach-s3c2412/Kconfig" |
f1290a49 | 990 | source "arch/arm/mach-s3c2416/Kconfig" |
a21765a7 | 991 | source "arch/arm/mach-s3c2440/Kconfig" |
e4d06e39 | 992 | source "arch/arm/mach-s3c2443/Kconfig" |
a21765a7 | 993 | endif |
1da177e4 | 994 | |
a08ab637 | 995 | if ARCH_S3C64XX |
431107ea | 996 | source "arch/arm/mach-s3c64xx/Kconfig" |
a08ab637 BD |
997 | endif |
998 | ||
49b7a491 | 999 | source "arch/arm/mach-s5p64x0/Kconfig" |
c4ffccdd | 1000 | |
550db7f1 | 1001 | source "arch/arm/mach-s5p6442/Kconfig" |
7bd0f2f5 | 1002 | |
5a7652f2 | 1003 | source "arch/arm/mach-s5pc100/Kconfig" |
5a7652f2 | 1004 | |
170f4e42 KK |
1005 | source "arch/arm/mach-s5pv210/Kconfig" |
1006 | ||
cc0e72b8 CY |
1007 | source "arch/arm/mach-s5pv310/Kconfig" |
1008 | ||
882d01f9 | 1009 | source "arch/arm/mach-shmobile/Kconfig" |
52c543f9 | 1010 | |
882d01f9 | 1011 | source "arch/arm/plat-stmp3xxx/Kconfig" |
9e73c84c | 1012 | |
c5f80065 EG |
1013 | source "arch/arm/mach-tegra/Kconfig" |
1014 | ||
95b8f20f | 1015 | source "arch/arm/mach-u300/Kconfig" |
1da177e4 | 1016 | |
95b8f20f | 1017 | source "arch/arm/mach-ux500/Kconfig" |
1da177e4 LT |
1018 | |
1019 | source "arch/arm/mach-versatile/Kconfig" | |
1020 | ||
ceade897 RK |
1021 | source "arch/arm/mach-vexpress/Kconfig" |
1022 | ||
7ec80ddf | 1023 | source "arch/arm/mach-w90x900/Kconfig" |
1024 | ||
1da177e4 LT |
1025 | # Definitions to make life easier |
1026 | config ARCH_ACORN | |
1027 | bool | |
1028 | ||
7ae1f7ec LB |
1029 | config PLAT_IOP |
1030 | bool | |
469d3044 | 1031 | select GENERIC_CLOCKEVENTS |
08f26b1e | 1032 | select HAVE_SCHED_CLOCK |
7ae1f7ec | 1033 | |
69b02f6a LB |
1034 | config PLAT_ORION |
1035 | bool | |
f06a1624 | 1036 | select HAVE_SCHED_CLOCK |
69b02f6a | 1037 | |
bd5ce433 EM |
1038 | config PLAT_PXA |
1039 | bool | |
1040 | ||
f4b8b319 RK |
1041 | config PLAT_VERSATILE |
1042 | bool | |
1043 | ||
e3887714 RK |
1044 | config ARM_TIMER_SP804 |
1045 | bool | |
1046 | ||
1da177e4 LT |
1047 | source arch/arm/mm/Kconfig |
1048 | ||
afe4b25e LB |
1049 | config IWMMXT |
1050 | bool "Enable iWMMXt support" | |
ef6c8445 HZ |
1051 | depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 |
1052 | default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP | |
afe4b25e LB |
1053 | help |
1054 | Enable support for iWMMXt context switching at run time if | |
1055 | running on a CPU that supports it. | |
1056 | ||
1da177e4 LT |
1057 | # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER |
1058 | config XSCALE_PMU | |
1059 | bool | |
1060 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER | |
1061 | default y | |
1062 | ||
0f4f0672 | 1063 | config CPU_HAS_PMU |
8954bb0d WD |
1064 | depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \ |
1065 | (!ARCH_OMAP3 || OMAP3_EMU) | |
0f4f0672 JI |
1066 | default y |
1067 | bool | |
1068 | ||
52108641 | 1069 | config MULTI_IRQ_HANDLER |
1070 | bool | |
1071 | help | |
1072 | Allow each machine to specify it's own IRQ handler at run time. | |
1073 | ||
3b93e7b0 HC |
1074 | if !MMU |
1075 | source "arch/arm/Kconfig-nommu" | |
1076 | endif | |
1077 | ||
9cba3ccc CM |
1078 | config ARM_ERRATA_411920 |
1079 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | |
81d11955 | 1080 | depends on CPU_V6 |
9cba3ccc CM |
1081 | help |
1082 | Invalidation of the Instruction Cache operation can | |
1083 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | |
1084 | It does not affect the MPCore. This option enables the ARM Ltd. | |
1085 | recommended workaround. | |
1086 | ||
7ce236fc CM |
1087 | config ARM_ERRATA_430973 |
1088 | bool "ARM errata: Stale prediction on replaced interworking branch" | |
1089 | depends on CPU_V7 | |
1090 | help | |
1091 | This option enables the workaround for the 430973 Cortex-A8 | |
1092 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | |
1093 | interworking branch is replaced with another code sequence at the | |
1094 | same virtual address, whether due to self-modifying code or virtual | |
1095 | to physical address re-mapping, Cortex-A8 does not recover from the | |
1096 | stale interworking branch prediction. This results in Cortex-A8 | |
1097 | executing the new code sequence in the incorrect ARM or Thumb state. | |
1098 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | |
1099 | and also flushes the branch target cache at every context switch. | |
1100 | Note that setting specific bits in the ACTLR register may not be | |
1101 | available in non-secure mode. | |
1102 | ||
855c551f CM |
1103 | config ARM_ERRATA_458693 |
1104 | bool "ARM errata: Processor deadlock when a false hazard is created" | |
1105 | depends on CPU_V7 | |
1106 | help | |
1107 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | |
1108 | erratum. For very specific sequences of memory operations, it is | |
1109 | possible for a hazard condition intended for a cache line to instead | |
1110 | be incorrectly associated with a different cache line. This false | |
1111 | hazard might then cause a processor deadlock. The workaround enables | |
1112 | the L1 caching of the NEON accesses and disables the PLD instruction | |
1113 | in the ACTLR register. Note that setting specific bits in the ACTLR | |
1114 | register may not be available in non-secure mode. | |
1115 | ||
0516e464 CM |
1116 | config ARM_ERRATA_460075 |
1117 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | |
1118 | depends on CPU_V7 | |
1119 | help | |
1120 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | |
1121 | erratum. Any asynchronous access to the L2 cache may encounter a | |
1122 | situation in which recent store transactions to the L2 cache are lost | |
1123 | and overwritten with stale memory contents from external memory. The | |
1124 | workaround disables the write-allocate mode for the L2 cache via the | |
1125 | ACTLR register. Note that setting specific bits in the ACTLR register | |
1126 | may not be available in non-secure mode. | |
1127 | ||
9f05027c WD |
1128 | config ARM_ERRATA_742230 |
1129 | bool "ARM errata: DMB operation may be faulty" | |
1130 | depends on CPU_V7 && SMP | |
1131 | help | |
1132 | This option enables the workaround for the 742230 Cortex-A9 | |
1133 | (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction | |
1134 | between two write operations may not ensure the correct visibility | |
1135 | ordering of the two writes. This workaround sets a specific bit in | |
1136 | the diagnostic register of the Cortex-A9 which causes the DMB | |
1137 | instruction to behave as a DSB, ensuring the correct behaviour of | |
1138 | the two writes. | |
1139 | ||
a672e99b WD |
1140 | config ARM_ERRATA_742231 |
1141 | bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption" | |
1142 | depends on CPU_V7 && SMP | |
1143 | help | |
1144 | This option enables the workaround for the 742231 Cortex-A9 | |
1145 | (r2p0..r2p2) erratum. Under certain conditions, specific to the | |
1146 | Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode, | |
1147 | accessing some data located in the same cache line, may get corrupted | |
1148 | data due to bad handling of the address hazard when the line gets | |
1149 | replaced from one of the CPUs at the same time as another CPU is | |
1150 | accessing it. This workaround sets specific bits in the diagnostic | |
1151 | register of the Cortex-A9 which reduces the linefill issuing | |
1152 | capabilities of the processor. | |
1153 | ||
9e65582a SS |
1154 | config PL310_ERRATA_588369 |
1155 | bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
1156 | depends on CACHE_L2X0 && ARCH_OMAP4 | |
1157 | help | |
1158 | The PL310 L2 cache controller implements three types of Clean & | |
1159 | Invalidate maintenance operations: by Physical Address | |
1160 | (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
1161 | They are architecturally defined to behave as the execution of a | |
1162 | clean operation followed immediately by an invalidate operation, | |
1163 | both performing to the same memory location. This functionality | |
1164 | is not correctly implemented in PL310 as clean lines are not | |
1165 | invalidated as a result of these operations. Note that this errata | |
1166 | uses Texas Instrument's secure monitor api. | |
cdf357f1 WD |
1167 | |
1168 | config ARM_ERRATA_720789 | |
1169 | bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID" | |
1170 | depends on CPU_V7 && SMP | |
1171 | help | |
1172 | This option enables the workaround for the 720789 Cortex-A9 (prior to | |
1173 | r2p0) erratum. A faulty ASID can be sent to the other CPUs for the | |
1174 | broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS. | |
1175 | As a consequence of this erratum, some TLB entries which should be | |
1176 | invalidated are not, resulting in an incoherency in the system page | |
1177 | tables. The workaround changes the TLB flushing routines to invalidate | |
1178 | entries regardless of the ASID. | |
475d92fc WD |
1179 | |
1180 | config ARM_ERRATA_743622 | |
1181 | bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption" | |
1182 | depends on CPU_V7 | |
1183 | help | |
1184 | This option enables the workaround for the 743622 Cortex-A9 | |
1185 | (r2p0..r2p2) erratum. Under very rare conditions, a faulty | |
1186 | optimisation in the Cortex-A9 Store Buffer may lead to data | |
1187 | corruption. This workaround sets a specific bit in the diagnostic | |
1188 | register of the Cortex-A9 which disables the Store Buffer | |
1189 | optimisation, preventing the defect from occurring. This has no | |
1190 | visible impact on the overall performance or power consumption of the | |
1191 | processor. | |
1192 | ||
1da177e4 LT |
1193 | endmenu |
1194 | ||
1195 | source "arch/arm/common/Kconfig" | |
1196 | ||
1da177e4 LT |
1197 | menu "Bus support" |
1198 | ||
1199 | config ARM_AMBA | |
1200 | bool | |
1201 | ||
1202 | config ISA | |
1203 | bool | |
1da177e4 LT |
1204 | help |
1205 | Find out whether you have ISA slots on your motherboard. ISA is the | |
1206 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
1207 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
1208 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
1209 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
1210 | ||
065909b9 | 1211 | # Select ISA DMA controller support |
1da177e4 LT |
1212 | config ISA_DMA |
1213 | bool | |
065909b9 | 1214 | select ISA_DMA_API |
1da177e4 | 1215 | |
065909b9 | 1216 | # Select ISA DMA interface |
5cae841b AV |
1217 | config ISA_DMA_API |
1218 | bool | |
5cae841b | 1219 | |
1da177e4 | 1220 | config PCI |
0b05da72 | 1221 | bool "PCI support" if MIGHT_HAVE_PCI |
1da177e4 LT |
1222 | help |
1223 | Find out whether you have a PCI motherboard. PCI is the name of a | |
1224 | bus system, i.e. the way the CPU talks to the other stuff inside | |
1225 | your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or | |
1226 | VESA. If you have PCI, say Y, otherwise N. | |
1227 | ||
52882173 AV |
1228 | config PCI_DOMAINS |
1229 | bool | |
1230 | depends on PCI | |
1231 | ||
b080ac8a MRJ |
1232 | config PCI_NANOENGINE |
1233 | bool "BSE nanoEngine PCI support" | |
1234 | depends on SA1100_NANOENGINE | |
1235 | help | |
1236 | Enable PCI on the BSE nanoEngine board. | |
1237 | ||
36e23590 MW |
1238 | config PCI_SYSCALL |
1239 | def_bool PCI | |
1240 | ||
1da177e4 LT |
1241 | # Select the host bridge type |
1242 | config PCI_HOST_VIA82C505 | |
1243 | bool | |
1244 | depends on PCI && ARCH_SHARK | |
1245 | default y | |
1246 | ||
a0113a99 MR |
1247 | config PCI_HOST_ITE8152 |
1248 | bool | |
1249 | depends on PCI && MACH_ARMCORE | |
1250 | default y | |
1251 | select DMABOUNCE | |
1252 | ||
1da177e4 LT |
1253 | source "drivers/pci/Kconfig" |
1254 | ||
1255 | source "drivers/pcmcia/Kconfig" | |
1256 | ||
1257 | endmenu | |
1258 | ||
1259 | menu "Kernel Features" | |
1260 | ||
0567a0c0 KH |
1261 | source "kernel/time/Kconfig" |
1262 | ||
1da177e4 LT |
1263 | config SMP |
1264 | bool "Symmetric Multi-Processing (EXPERIMENTAL)" | |
971acb9b | 1265 | depends on EXPERIMENTAL |
bc28248e | 1266 | depends on GENERIC_CLOCKEVENTS |
971acb9b | 1267 | depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ |
89c3dedf DW |
1268 | MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ |
1269 | ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ | |
e9d728f5 | 1270 | ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE |
f6dd9fa5 | 1271 | select USE_GENERIC_SMP_HELPERS |
89c3dedf | 1272 | select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP |
1da177e4 LT |
1273 | help |
1274 | This enables support for systems with more than one CPU. If you have | |
1275 | a system with only one CPU, like most personal computers, say N. If | |
1276 | you have a system with more than one CPU, say Y. | |
1277 | ||
1278 | If you say N here, the kernel will run on single and multiprocessor | |
1279 | machines, but will use only one CPU of a multiprocessor machine. If | |
1280 | you say Y here, the kernel will run on many, but not all, single | |
1281 | processor machines. On a single processor machine, the kernel will | |
1282 | run faster if you say N here. | |
1283 | ||
03502faa | 1284 | See also <file:Documentation/i386/IO-APIC.txt>, |
1da177e4 | 1285 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at |
50a23e6e | 1286 | <http://tldp.org/HOWTO/SMP-HOWTO.html>. |
1da177e4 LT |
1287 | |
1288 | If you don't know what to do here, say N. | |
1289 | ||
f00ec48f RK |
1290 | config SMP_ON_UP |
1291 | bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)" | |
1292 | depends on EXPERIMENTAL | |
4d2692a7 | 1293 | depends on SMP && !XIP_KERNEL |
f00ec48f RK |
1294 | default y |
1295 | help | |
1296 | SMP kernels contain instructions which fail on non-SMP processors. | |
1297 | Enabling this option allows the kernel to modify itself to make | |
1298 | these instructions safe. Disabling it allows about 1K of space | |
1299 | savings. | |
1300 | ||
1301 | If you don't know what to do here, say Y. | |
1302 | ||
a8cbcd92 RK |
1303 | config HAVE_ARM_SCU |
1304 | bool | |
1305 | depends on SMP | |
1306 | help | |
1307 | This option enables support for the ARM system coherency unit | |
1308 | ||
f32f4ce2 RK |
1309 | config HAVE_ARM_TWD |
1310 | bool | |
1311 | depends on SMP | |
15095bb0 | 1312 | select TICK_ONESHOT |
f32f4ce2 RK |
1313 | help |
1314 | This options enables support for the ARM timer and watchdog unit | |
1315 | ||
8d5796d2 LB |
1316 | choice |
1317 | prompt "Memory split" | |
1318 | default VMSPLIT_3G | |
1319 | help | |
1320 | Select the desired split between kernel and user memory. | |
1321 | ||
1322 | If you are not absolutely sure what you are doing, leave this | |
1323 | option alone! | |
1324 | ||
1325 | config VMSPLIT_3G | |
1326 | bool "3G/1G user/kernel split" | |
1327 | config VMSPLIT_2G | |
1328 | bool "2G/2G user/kernel split" | |
1329 | config VMSPLIT_1G | |
1330 | bool "1G/3G user/kernel split" | |
1331 | endchoice | |
1332 | ||
1333 | config PAGE_OFFSET | |
1334 | hex | |
1335 | default 0x40000000 if VMSPLIT_1G | |
1336 | default 0x80000000 if VMSPLIT_2G | |
1337 | default 0xC0000000 | |
1338 | ||
1da177e4 LT |
1339 | config NR_CPUS |
1340 | int "Maximum number of CPUs (2-32)" | |
1341 | range 2 32 | |
1342 | depends on SMP | |
1343 | default "4" | |
1344 | ||
a054a811 RK |
1345 | config HOTPLUG_CPU |
1346 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
1347 | depends on SMP && HOTPLUG && EXPERIMENTAL | |
176bfc44 | 1348 | depends on !ARCH_MSM |
a054a811 RK |
1349 | help |
1350 | Say Y here to experiment with turning CPUs off and on. CPUs | |
1351 | can be controlled through /sys/devices/system/cpu. | |
1352 | ||
37ee16ae RK |
1353 | config LOCAL_TIMERS |
1354 | bool "Use local timer interrupts" | |
971acb9b | 1355 | depends on SMP |
37ee16ae | 1356 | default y |
89c3dedf | 1357 | select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP |
37ee16ae RK |
1358 | help |
1359 | Enable support for local timers on SMP platforms, rather then the | |
1360 | legacy IPI broadcast method. Local timers allows the system | |
1361 | accounting to be spread across the timer interval, preventing a | |
1362 | "thundering herd" at every timer tick. | |
1363 | ||
d45a398f | 1364 | source kernel/Kconfig.preempt |
1da177e4 | 1365 | |
f8065813 RK |
1366 | config HZ |
1367 | int | |
49b7a491 | 1368 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \ |
2192482e | 1369 | ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310 |
bfe65704 | 1370 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
5248c657 | 1371 | default AT91_TIMER_HZ if ARCH_AT91 |
5da3e714 | 1372 | default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE |
f8065813 RK |
1373 | default 100 |
1374 | ||
16c79651 | 1375 | config THUMB2_KERNEL |
4a50bfe3 | 1376 | bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" |
6e6fc998 | 1377 | depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL |
16c79651 CM |
1378 | select AEABI |
1379 | select ARM_ASM_UNIFIED | |
1380 | help | |
1381 | By enabling this option, the kernel will be compiled in | |
1382 | Thumb-2 mode. A compiler/assembler that understand the unified | |
1383 | ARM-Thumb syntax is needed. | |
1384 | ||
1385 | If unsure, say N. | |
1386 | ||
0becb088 CM |
1387 | config ARM_ASM_UNIFIED |
1388 | bool | |
1389 | ||
704bdda0 NP |
1390 | config AEABI |
1391 | bool "Use the ARM EABI to compile the kernel" | |
1392 | help | |
1393 | This option allows for the kernel to be compiled using the latest | |
1394 | ARM ABI (aka EABI). This is only useful if you are using a user | |
1395 | space environment that is also compiled with EABI. | |
1396 | ||
1397 | Since there are major incompatibilities between the legacy ABI and | |
1398 | EABI, especially with regard to structure member alignment, this | |
1399 | option also changes the kernel syscall calling convention to | |
1400 | disambiguate both ABIs and allow for backward compatibility support | |
1401 | (selected with CONFIG_OABI_COMPAT). | |
1402 | ||
1403 | To use this you need GCC version 4.0.0 or later. | |
1404 | ||
6c90c872 | 1405 | config OABI_COMPAT |
a73a3ff1 | 1406 | bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)" |
61c484d4 | 1407 | depends on AEABI && EXPERIMENTAL |
6c90c872 NP |
1408 | default y |
1409 | help | |
1410 | This option preserves the old syscall interface along with the | |
1411 | new (ARM EABI) one. It also provides a compatibility layer to | |
1412 | intercept syscalls that have structure arguments which layout | |
1413 | in memory differs between the legacy ABI and the new ARM EABI | |
1414 | (only for non "thumb" binaries). This option adds a tiny | |
1415 | overhead to all syscalls and produces a slightly larger kernel. | |
1416 | If you know you'll be using only pure EABI user space then you | |
1417 | can say N here. If this option is not selected and you attempt | |
1418 | to execute a legacy ABI binary then the result will be | |
1419 | UNPREDICTABLE (in fact it can be predicted that it won't work | |
1420 | at all). If in doubt say Y. | |
1421 | ||
eb33575c | 1422 | config ARCH_HAS_HOLES_MEMORYMODEL |
e80d6a24 | 1423 | bool |
e80d6a24 | 1424 | |
05944d74 RK |
1425 | config ARCH_SPARSEMEM_ENABLE |
1426 | bool | |
1427 | ||
07a2f737 RK |
1428 | config ARCH_SPARSEMEM_DEFAULT |
1429 | def_bool ARCH_SPARSEMEM_ENABLE | |
1430 | ||
05944d74 | 1431 | config ARCH_SELECT_MEMORY_MODEL |
be370302 | 1432 | def_bool ARCH_SPARSEMEM_ENABLE |
c80d79d7 | 1433 | |
053a96ca NP |
1434 | config HIGHMEM |
1435 | bool "High Memory Support (EXPERIMENTAL)" | |
1436 | depends on MMU && EXPERIMENTAL | |
1437 | help | |
1438 | The address space of ARM processors is only 4 Gigabytes large | |
1439 | and it has to accommodate user address space, kernel address | |
1440 | space as well as some memory mapped IO. That means that, if you | |
1441 | have a large amount of physical memory and/or IO, not all of the | |
1442 | memory can be "permanently mapped" by the kernel. The physical | |
1443 | memory that is not permanently mapped is called "high memory". | |
1444 | ||
1445 | Depending on the selected kernel/user memory split, minimum | |
1446 | vmalloc space and actual amount of RAM, you may not need this | |
1447 | option which should result in a slightly faster kernel. | |
1448 | ||
1449 | If unsure, say n. | |
1450 | ||
65cec8e3 RK |
1451 | config HIGHPTE |
1452 | bool "Allocate 2nd-level pagetables from highmem" | |
1453 | depends on HIGHMEM | |
1454 | depends on !OUTER_CACHE | |
1455 | ||
1b8873a0 JI |
1456 | config HW_PERF_EVENTS |
1457 | bool "Enable hardware performance counter support for perf events" | |
fe166148 | 1458 | depends on PERF_EVENTS && CPU_HAS_PMU |
1b8873a0 JI |
1459 | default y |
1460 | help | |
1461 | Enable hardware performance counter support for perf events. If | |
1462 | disabled, perf events will use software events only. | |
1463 | ||
3f22ab27 DH |
1464 | source "mm/Kconfig" |
1465 | ||
c1b2d970 MD |
1466 | config FORCE_MAX_ZONEORDER |
1467 | int "Maximum zone order" if ARCH_SHMOBILE | |
1468 | range 11 64 if ARCH_SHMOBILE | |
1469 | default "9" if SA1111 | |
1470 | default "11" | |
1471 | help | |
1472 | The kernel memory allocator divides physically contiguous memory | |
1473 | blocks into "zones", where each zone is a power of two number of | |
1474 | pages. This option selects the largest power of two that the kernel | |
1475 | keeps in the memory allocator. If you need to allocate very large | |
1476 | blocks of physically contiguous memory, then you may need to | |
1477 | increase this value. | |
1478 | ||
1479 | This config option is actually maximum order plus one. For example, | |
1480 | a value of 11 means that the largest free memory block is 2^10 pages. | |
1481 | ||
1da177e4 LT |
1482 | config LEDS |
1483 | bool "Timer and CPU usage LEDs" | |
e055d5bf | 1484 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
8c8fdbc9 | 1485 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
1da177e4 LT |
1486 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
1487 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | |
73a59c1c | 1488 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
25329671 | 1489 | ARCH_AT91 || ARCH_DAVINCI || \ |
ff3042fb | 1490 | ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW |
1da177e4 LT |
1491 | help |
1492 | If you say Y here, the LEDs on your machine will be used | |
1493 | to provide useful information about your current system status. | |
1494 | ||
1495 | If you are compiling a kernel for a NetWinder or EBSA-285, you will | |
1496 | be able to select which LEDs are active using the options below. If | |
1497 | you are compiling a kernel for the EBSA-110 or the LART however, the | |
1498 | red LED will simply flash regularly to indicate that the system is | |
1499 | still functional. It is safe to say Y here if you have a CATS | |
1500 | system, but the driver will do nothing. | |
1501 | ||
1502 | config LEDS_TIMER | |
1503 | bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \ | |
eebdf7d7 DB |
1504 | OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ |
1505 | || MACH_OMAP_PERSEUS2 | |
1da177e4 | 1506 | depends on LEDS |
0567a0c0 | 1507 | depends on !GENERIC_CLOCKEVENTS |
1da177e4 LT |
1508 | default y if ARCH_EBSA110 |
1509 | help | |
1510 | If you say Y here, one of the system LEDs (the green one on the | |
1511 | NetWinder, the amber one on the EBSA285, or the red one on the LART) | |
1512 | will flash regularly to indicate that the system is still | |
1513 | operational. This is mainly useful to kernel hackers who are | |
1514 | debugging unstable kernels. | |
1515 | ||
1516 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1517 | functions. You may choose to use both, but the Timer LED function | |
1518 | will overrule the CPU usage LED. | |
1519 | ||
1520 | config LEDS_CPU | |
1521 | bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \ | |
eebdf7d7 DB |
1522 | !ARCH_OMAP) \ |
1523 | || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \ | |
1524 | || MACH_OMAP_PERSEUS2 | |
1da177e4 LT |
1525 | depends on LEDS |
1526 | help | |
1527 | If you say Y here, the red LED will be used to give a good real | |
1528 | time indication of CPU usage, by lighting whenever the idle task | |
1529 | is not currently executing. | |
1530 | ||
1531 | The LART uses the same LED for both Timer LED and CPU usage LED | |
1532 | functions. You may choose to use both, but the Timer LED function | |
1533 | will overrule the CPU usage LED. | |
1534 | ||
1535 | config ALIGNMENT_TRAP | |
1536 | bool | |
f12d0d7c | 1537 | depends on CPU_CP15_MMU |
1da177e4 | 1538 | default y if !ARCH_EBSA110 |
e119bfff | 1539 | select HAVE_PROC_CPU if PROC_FS |
1da177e4 | 1540 | help |
84eb8d06 | 1541 | ARM processors cannot fetch/store information which is not |
1da177e4 LT |
1542 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
1543 | address divisible by 4. On 32-bit ARM processors, these non-aligned | |
1544 | fetch/store instructions will be emulated in software if you say | |
1545 | here, which has a severe performance impact. This is necessary for | |
1546 | correct operation of some network protocols. With an IP-only | |
1547 | configuration it is safe to say N, otherwise say Y. | |
1548 | ||
39ec58f3 LB |
1549 | config UACCESS_WITH_MEMCPY |
1550 | bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)" | |
1551 | depends on MMU && EXPERIMENTAL | |
1552 | default y if CPU_FEROCEON | |
1553 | help | |
1554 | Implement faster copy_to_user and clear_user methods for CPU | |
1555 | cores where a 8-word STM instruction give significantly higher | |
1556 | memory write throughput than a sequence of individual 32bit stores. | |
1557 | ||
1558 | A possible side effect is a slight increase in scheduling latency | |
1559 | between threads sharing the same address space if they invoke | |
1560 | such copy operations with large buffers. | |
1561 | ||
1562 | However, if the CPU data cache is using a write-allocate mode, | |
1563 | this option is unlikely to provide any performance gain. | |
1564 | ||
70c70d97 NP |
1565 | config SECCOMP |
1566 | bool | |
1567 | prompt "Enable seccomp to safely compute untrusted bytecode" | |
1568 | ---help--- | |
1569 | This kernel feature is useful for number crunching applications | |
1570 | that may need to compute untrusted bytecode during their | |
1571 | execution. By using pipes or other transports made available to | |
1572 | the process as file descriptors supporting the read/write | |
1573 | syscalls, it's possible to isolate those applications in | |
1574 | their own address space using seccomp. Once seccomp is | |
1575 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled | |
1576 | and the task is only allowed to execute a few safe syscalls | |
1577 | defined by each seccomp mode. | |
1578 | ||
c743f380 NP |
1579 | config CC_STACKPROTECTOR |
1580 | bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" | |
4a50bfe3 | 1581 | depends on EXPERIMENTAL |
c743f380 NP |
1582 | help |
1583 | This option turns on the -fstack-protector GCC feature. This | |
1584 | feature puts, at the beginning of functions, a canary value on | |
1585 | the stack just before the return address, and validates | |
1586 | the value just before actually returning. Stack based buffer | |
1587 | overflows (that need to overwrite this return address) now also | |
1588 | overwrite the canary, which gets detected and the attack is then | |
1589 | neutralized via a kernel panic. | |
1590 | This feature requires gcc version 4.2 or above. | |
1591 | ||
73a65b3f UKK |
1592 | config DEPRECATED_PARAM_STRUCT |
1593 | bool "Provide old way to pass kernel parameters" | |
1594 | help | |
1595 | This was deprecated in 2001 and announced to live on for 5 years. | |
1596 | Some old boot loaders still use this way. | |
1597 | ||
1da177e4 LT |
1598 | endmenu |
1599 | ||
1600 | menu "Boot options" | |
1601 | ||
1602 | # Compressed boot loader in ROM. Yes, we really want to ask about | |
1603 | # TEXT and BSS so we preserve their values in the config files. | |
1604 | config ZBOOT_ROM_TEXT | |
1605 | hex "Compressed ROM boot loader base address" | |
1606 | default "0" | |
1607 | help | |
1608 | The physical address at which the ROM-able zImage is to be | |
1609 | placed in the target. Platforms which normally make use of | |
1610 | ROM-able zImage formats normally set this to a suitable | |
1611 | value in their defconfig file. | |
1612 | ||
1613 | If ZBOOT_ROM is not enabled, this has no effect. | |
1614 | ||
1615 | config ZBOOT_ROM_BSS | |
1616 | hex "Compressed ROM boot loader BSS address" | |
1617 | default "0" | |
1618 | help | |
f8c440b2 DF |
1619 | The base address of an area of read/write memory in the target |
1620 | for the ROM-able zImage which must be available while the | |
1621 | decompressor is running. It must be large enough to hold the | |
1622 | entire decompressed kernel plus an additional 128 KiB. | |
1623 | Platforms which normally make use of ROM-able zImage formats | |
1624 | normally set this to a suitable value in their defconfig file. | |
1da177e4 LT |
1625 | |
1626 | If ZBOOT_ROM is not enabled, this has no effect. | |
1627 | ||
1628 | config ZBOOT_ROM | |
1629 | bool "Compressed boot loader in ROM/flash" | |
1630 | depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS | |
1631 | help | |
1632 | Say Y here if you intend to execute your compressed kernel image | |
1633 | (zImage) directly from ROM or flash. If unsure, say N. | |
1634 | ||
1635 | config CMDLINE | |
1636 | string "Default kernel command string" | |
1637 | default "" | |
1638 | help | |
1639 | On some architectures (EBSA110 and CATS), there is currently no way | |
1640 | for the boot loader to pass arguments to the kernel. For these | |
1641 | architectures, you should supply some command-line options at build | |
1642 | time by entering them here. As a minimum, you should specify the | |
1643 | memory size and the root device (e.g., mem=64M root=/dev/nfs). | |
1644 | ||
92d2040d AH |
1645 | config CMDLINE_FORCE |
1646 | bool "Always use the default kernel command string" | |
1647 | depends on CMDLINE != "" | |
1648 | help | |
1649 | Always use the default kernel command string, even if the boot | |
1650 | loader passes other arguments to the kernel. | |
1651 | This is useful if you cannot or don't want to change the | |
1652 | command-line options your boot loader passes to the kernel. | |
1653 | ||
1654 | If unsure, say N. | |
1655 | ||
1da177e4 LT |
1656 | config XIP_KERNEL |
1657 | bool "Kernel Execute-In-Place from ROM" | |
1658 | depends on !ZBOOT_ROM | |
1659 | help | |
1660 | Execute-In-Place allows the kernel to run from non-volatile storage | |
1661 | directly addressable by the CPU, such as NOR flash. This saves RAM | |
1662 | space since the text section of the kernel is not loaded from flash | |
1663 | to RAM. Read-write sections, such as the data section and stack, | |
1664 | are still copied to RAM. The XIP kernel is not compressed since | |
1665 | it has to run directly from flash, so it will take more space to | |
1666 | store it. The flash address used to link the kernel object files, | |
1667 | and for storing it, is configuration dependent. Therefore, if you | |
1668 | say Y here, you must know the proper physical address where to | |
1669 | store the kernel image depending on your own flash memory usage. | |
1670 | ||
1671 | Also note that the make target becomes "make xipImage" rather than | |
1672 | "make zImage" or "make Image". The final kernel binary to put in | |
1673 | ROM memory will be arch/arm/boot/xipImage. | |
1674 | ||
1675 | If unsure, say N. | |
1676 | ||
1677 | config XIP_PHYS_ADDR | |
1678 | hex "XIP Kernel Physical Location" | |
1679 | depends on XIP_KERNEL | |
1680 | default "0x00080000" | |
1681 | help | |
1682 | This is the physical address in your flash memory the kernel will | |
1683 | be linked for and stored to. This address is dependent on your | |
1684 | own flash usage. | |
1685 | ||
c587e4a6 RP |
1686 | config KEXEC |
1687 | bool "Kexec system call (EXPERIMENTAL)" | |
1688 | depends on EXPERIMENTAL | |
1689 | help | |
1690 | kexec is a system call that implements the ability to shutdown your | |
1691 | current kernel, and to start another kernel. It is like a reboot | |
01dd2fbf | 1692 | but it is independent of the system firmware. And like a reboot |
c587e4a6 RP |
1693 | you can start any kernel with it, not just Linux. |
1694 | ||
1695 | It is an ongoing process to be certain the hardware in a machine | |
1696 | is properly shutdown, so do not be surprised if this code does not | |
1697 | initially work for you. It may help to enable device hotplugging | |
1698 | support. | |
1699 | ||
4cd9d6f7 RP |
1700 | config ATAGS_PROC |
1701 | bool "Export atags in procfs" | |
b98d7291 UL |
1702 | depends on KEXEC |
1703 | default y | |
4cd9d6f7 RP |
1704 | help |
1705 | Should the atags used to boot the kernel be exported in an "atags" | |
1706 | file in procfs. Useful with kexec. | |
1707 | ||
cb5d39b3 MW |
1708 | config CRASH_DUMP |
1709 | bool "Build kdump crash kernel (EXPERIMENTAL)" | |
1710 | depends on EXPERIMENTAL | |
1711 | help | |
1712 | Generate crash dump after being started by kexec. This should | |
1713 | be normally only set in special crash dump kernels which are | |
1714 | loaded in the main kernel with kexec-tools into a specially | |
1715 | reserved region and then later executed after a crash by | |
1716 | kdump/kexec. The crash dump kernel must be compiled to a | |
1717 | memory address not used by the main kernel | |
1718 | ||
1719 | For more details see Documentation/kdump/kdump.txt | |
1720 | ||
e69edc79 EM |
1721 | config AUTO_ZRELADDR |
1722 | bool "Auto calculation of the decompressed kernel image address" | |
1723 | depends on !ZBOOT_ROM && !ARCH_U300 | |
1724 | help | |
1725 | ZRELADDR is the physical address where the decompressed kernel | |
1726 | image will be placed. If AUTO_ZRELADDR is selected, the address | |
1727 | will be determined at run-time by masking the current IP with | |
1728 | 0xf8000000. This assumes the zImage being placed in the first 128MB | |
1729 | from start of memory. | |
1730 | ||
1da177e4 LT |
1731 | endmenu |
1732 | ||
ac9d7efc | 1733 | menu "CPU Power Management" |
1da177e4 | 1734 | |
89c52ed4 | 1735 | if ARCH_HAS_CPUFREQ |
1da177e4 LT |
1736 | |
1737 | source "drivers/cpufreq/Kconfig" | |
1738 | ||
64f102b6 YS |
1739 | config CPU_FREQ_IMX |
1740 | tristate "CPUfreq driver for i.MX CPUs" | |
1741 | depends on ARCH_MXC && CPU_FREQ | |
1742 | help | |
1743 | This enables the CPUfreq driver for i.MX CPUs. | |
1744 | ||
1da177e4 LT |
1745 | config CPU_FREQ_SA1100 |
1746 | bool | |
1da177e4 LT |
1747 | |
1748 | config CPU_FREQ_SA1110 | |
1749 | bool | |
1da177e4 LT |
1750 | |
1751 | config CPU_FREQ_INTEGRATOR | |
1752 | tristate "CPUfreq driver for ARM Integrator CPUs" | |
1753 | depends on ARCH_INTEGRATOR && CPU_FREQ | |
1754 | default y | |
1755 | help | |
1756 | This enables the CPUfreq driver for ARM Integrator CPUs. | |
1757 | ||
1758 | For details, take a look at <file:Documentation/cpu-freq>. | |
1759 | ||
1760 | If in doubt, say Y. | |
1761 | ||
9e2697ff RK |
1762 | config CPU_FREQ_PXA |
1763 | bool | |
1764 | depends on CPU_FREQ && ARCH_PXA && PXA25x | |
1765 | default y | |
1766 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | |
1767 | ||
b3748ddd MB |
1768 | config CPU_FREQ_S3C64XX |
1769 | bool "CPUfreq support for Samsung S3C64XX CPUs" | |
1770 | depends on CPU_FREQ && CPU_S3C6410 | |
1771 | ||
9d56c02a BD |
1772 | config CPU_FREQ_S3C |
1773 | bool | |
1774 | help | |
1775 | Internal configuration node for common cpufreq on Samsung SoC | |
1776 | ||
1777 | config CPU_FREQ_S3C24XX | |
4a50bfe3 | 1778 | bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)" |
9d56c02a BD |
1779 | depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL |
1780 | select CPU_FREQ_S3C | |
1781 | help | |
1782 | This enables the CPUfreq driver for the Samsung S3C24XX family | |
1783 | of CPUs. | |
1784 | ||
1785 | For details, take a look at <file:Documentation/cpu-freq>. | |
1786 | ||
1787 | If in doubt, say N. | |
1788 | ||
1789 | config CPU_FREQ_S3C24XX_PLL | |
4a50bfe3 | 1790 | bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)" |
9d56c02a BD |
1791 | depends on CPU_FREQ_S3C24XX && EXPERIMENTAL |
1792 | help | |
1793 | Compile in support for changing the PLL frequency from the | |
1794 | S3C24XX series CPUfreq driver. The PLL takes time to settle | |
1795 | after a frequency change, so by default it is not enabled. | |
1796 | ||
1797 | This also means that the PLL tables for the selected CPU(s) will | |
1798 | be built which may increase the size of the kernel image. | |
1799 | ||
1800 | config CPU_FREQ_S3C24XX_DEBUG | |
1801 | bool "Debug CPUfreq Samsung driver core" | |
1802 | depends on CPU_FREQ_S3C24XX | |
1803 | help | |
1804 | Enable s3c_freq_dbg for the Samsung S3C CPUfreq core | |
1805 | ||
1806 | config CPU_FREQ_S3C24XX_IODEBUG | |
1807 | bool "Debug CPUfreq Samsung driver IO timing" | |
1808 | depends on CPU_FREQ_S3C24XX | |
1809 | help | |
1810 | Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core | |
1811 | ||
e6d197a6 BD |
1812 | config CPU_FREQ_S3C24XX_DEBUGFS |
1813 | bool "Export debugfs for CPUFreq" | |
1814 | depends on CPU_FREQ_S3C24XX && DEBUG_FS | |
1815 | help | |
1816 | Export status information via debugfs. | |
1817 | ||
1da177e4 LT |
1818 | endif |
1819 | ||
ac9d7efc RK |
1820 | source "drivers/cpuidle/Kconfig" |
1821 | ||
1822 | endmenu | |
1823 | ||
1da177e4 LT |
1824 | menu "Floating point emulation" |
1825 | ||
1826 | comment "At least one emulation must be selected" | |
1827 | ||
1828 | config FPE_NWFPE | |
1829 | bool "NWFPE math emulation" | |
593c252a | 1830 | depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL |
1da177e4 LT |
1831 | ---help--- |
1832 | Say Y to include the NWFPE floating point emulator in the kernel. | |
1833 | This is necessary to run most binaries. Linux does not currently | |
1834 | support floating point hardware so you need to say Y here even if | |
1835 | your machine has an FPA or floating point co-processor podule. | |
1836 | ||
1837 | You may say N here if you are going to load the Acorn FPEmulator | |
1838 | early in the bootup. | |
1839 | ||
1840 | config FPE_NWFPE_XP | |
1841 | bool "Support extended precision" | |
bedf142b | 1842 | depends on FPE_NWFPE |
1da177e4 LT |
1843 | help |
1844 | Say Y to include 80-bit support in the kernel floating-point | |
1845 | emulator. Otherwise, only 32 and 64-bit support is compiled in. | |
1846 | Note that gcc does not generate 80-bit operations by default, | |
1847 | so in most cases this option only enlarges the size of the | |
1848 | floating point emulator without any good reason. | |
1849 | ||
1850 | You almost surely want to say N here. | |
1851 | ||
1852 | config FPE_FASTFPE | |
1853 | bool "FastFPE math emulation (EXPERIMENTAL)" | |
8993a44c | 1854 | depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL |
1da177e4 LT |
1855 | ---help--- |
1856 | Say Y here to include the FAST floating point emulator in the kernel. | |
1857 | This is an experimental much faster emulator which now also has full | |
1858 | precision for the mantissa. It does not support any exceptions. | |
1859 | It is very simple, and approximately 3-6 times faster than NWFPE. | |
1860 | ||
1861 | It should be sufficient for most programs. It may be not suitable | |
1862 | for scientific calculations, but you have to check this for yourself. | |
1863 | If you do not feel you need a faster FP emulation you should better | |
1864 | choose NWFPE. | |
1865 | ||
1866 | config VFP | |
1867 | bool "VFP-format floating point maths" | |
c00d4ffd | 1868 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
1da177e4 LT |
1869 | help |
1870 | Say Y to include VFP support code in the kernel. This is needed | |
1871 | if your hardware includes a VFP unit. | |
1872 | ||
1873 | Please see <file:Documentation/arm/VFP/release-notes.txt> for | |
1874 | release notes and additional status information. | |
1875 | ||
1876 | Say N if your target does not have VFP hardware. | |
1877 | ||
25ebee02 CM |
1878 | config VFPv3 |
1879 | bool | |
1880 | depends on VFP | |
1881 | default y if CPU_V7 | |
1882 | ||
b5872db4 CM |
1883 | config NEON |
1884 | bool "Advanced SIMD (NEON) Extension support" | |
1885 | depends on VFPv3 && CPU_V7 | |
1886 | help | |
1887 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | |
1888 | Extension. | |
1889 | ||
1da177e4 LT |
1890 | endmenu |
1891 | ||
1892 | menu "Userspace binary formats" | |
1893 | ||
1894 | source "fs/Kconfig.binfmt" | |
1895 | ||
1896 | config ARTHUR | |
1897 | tristate "RISC OS personality" | |
704bdda0 | 1898 | depends on !AEABI |
1da177e4 LT |
1899 | help |
1900 | Say Y here to include the kernel code necessary if you want to run | |
1901 | Acorn RISC OS/Arthur binaries under Linux. This code is still very | |
1902 | experimental; if this sounds frightening, say N and sleep in peace. | |
1903 | You can also say M here to compile this support as a module (which | |
1904 | will be called arthur). | |
1905 | ||
1906 | endmenu | |
1907 | ||
1908 | menu "Power management options" | |
1909 | ||
eceab4ac | 1910 | source "kernel/power/Kconfig" |
1da177e4 | 1911 | |
f4cb5700 JB |
1912 | config ARCH_SUSPEND_POSSIBLE |
1913 | def_bool y | |
1914 | ||
1da177e4 LT |
1915 | endmenu |
1916 | ||
d5950b43 SR |
1917 | source "net/Kconfig" |
1918 | ||
ac25150f | 1919 | source "drivers/Kconfig" |
1da177e4 LT |
1920 | |
1921 | source "fs/Kconfig" | |
1922 | ||
1da177e4 LT |
1923 | source "arch/arm/Kconfig.debug" |
1924 | ||
1925 | source "security/Kconfig" | |
1926 | ||
1927 | source "crypto/Kconfig" | |
1928 | ||
1929 | source "lib/Kconfig" |