ARM: rationalize versatile family Kconfig/Makefile
[deliverable/linux.git] / arch / arm / Kconfig
CommitLineData
1da177e4
LT
1config ARM
2 bool
3 default y
e17c6d56 4 select HAVE_AOUT
24056f52 5 select HAVE_DMA_API_DEBUG
2064c946 6 select HAVE_IDE
2778f620 7 select HAVE_MEMBLOCK
12b824fb 8 select RTC_LIB
75e7153a 9 select SYS_SUPPORTS_APM_EMULATION
d4c7b1f9 10 select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
fe166148 11 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
5cbad0eb 12 select HAVE_ARCH_KGDB
ed7c84d5 13 select HAVE_KPROBES if (!XIP_KERNEL && !THUMB2_KERNEL)
9edddaa2 14 select HAVE_KRETPROBES if (HAVE_KPROBES)
606576ce 15 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
80be7a7f
RV
16 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
17 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
0e341af8 18 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
1fe53268 19 select HAVE_GENERIC_DMA_COHERENT
e7db7b42
AT
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_LZO
6e8699f7 22 select HAVE_KERNEL_LZMA
e360adbe 23 select HAVE_IRQ_WORK
7ada189f
JI
24 select HAVE_PERF_EVENTS
25 select PERF_USE_VMALLOC
e513f8bf 26 select HAVE_REGS_AND_STACK_ACCESS_API
19852e59 27 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
ed60453f 28 select HAVE_C_RECORDMCOUNT
e2a93ecc
LB
29 select HAVE_GENERIC_HARDIRQS
30 select HAVE_SPARSE_IRQ
1da177e4
LT
31 help
32 The ARM series is a line of low-power-consumption RISC chip designs
f6c8965a 33 licensed by ARM Ltd and targeted at embedded applications and
1da177e4 34 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
f6c8965a 35 manufactured, but legacy ARM-based PC hardware remains popular in
1da177e4
LT
36 Europe. There is an ARM Linux project with a web page at
37 <http://www.arm.linux.org.uk/>.
38
1a189b97
RK
39config HAVE_PWM
40 bool
41
0b05da72
HUK
42config MIGHT_HAVE_PCI
43 bool
44
75e7153a
RB
45config SYS_SUPPORTS_APM_EMULATION
46 bool
47
112f38a4
RK
48config HAVE_SCHED_CLOCK
49 bool
50
0a938b97
DB
51config GENERIC_GPIO
52 bool
0a938b97 53
5cfc8ee0
JS
54config ARCH_USES_GETTIMEOFFSET
55 bool
56 default n
746140c7 57
0567a0c0
KH
58config GENERIC_CLOCKEVENTS
59 bool
0567a0c0 60
a8655e83
CM
61config GENERIC_CLOCKEVENTS_BROADCAST
62 bool
63 depends on GENERIC_CLOCKEVENTS
5388a6b2 64 default y if SMP
a8655e83 65
bc581770
LW
66config HAVE_TCM
67 bool
68 select GENERIC_ALLOCATOR
69
e119bfff
RK
70config HAVE_PROC_CPU
71 bool
72
5ea81769
AV
73config NO_IOPORT
74 bool
5ea81769 75
1da177e4
LT
76config EISA
77 bool
78 ---help---
79 The Extended Industry Standard Architecture (EISA) bus was
80 developed as an open alternative to the IBM MicroChannel bus.
81
82 The EISA bus provided some of the features of the IBM MicroChannel
83 bus while maintaining backward compatibility with cards made for
84 the older ISA bus. The EISA bus saw limited use between 1988 and
85 1995 when it was made obsolete by the PCI bus.
86
87 Say Y here if you are building a kernel for an EISA-based machine.
88
89 Otherwise, say N.
90
91config SBUS
92 bool
93
94config MCA
95 bool
96 help
97 MicroChannel Architecture is found in some IBM PS/2 machines and
98 laptops. It is a bus system similar to PCI or ISA. See
99 <file:Documentation/mca.txt> (and especially the web page given
100 there) before attempting to build an MCA bus kernel.
101
f16fb1ec
RK
102config STACKTRACE_SUPPORT
103 bool
104 default y
105
f76e9154
NP
106config HAVE_LATENCYTOP_SUPPORT
107 bool
108 depends on !SMP
109 default y
110
f16fb1ec
RK
111config LOCKDEP_SUPPORT
112 bool
113 default y
114
7ad1bcb2
RK
115config TRACE_IRQFLAGS_SUPPORT
116 bool
117 default y
118
4a2581a0
TG
119config HARDIRQS_SW_RESEND
120 bool
121 default y
122
123config GENERIC_IRQ_PROBE
124 bool
125 default y
126
95c354fe
NP
127config GENERIC_LOCKBREAK
128 bool
129 default y
130 depends on SMP && PREEMPT
131
1da177e4
LT
132config RWSEM_GENERIC_SPINLOCK
133 bool
134 default y
135
136config RWSEM_XCHGADD_ALGORITHM
137 bool
138
f0d1b0b3
DH
139config ARCH_HAS_ILOG2_U32
140 bool
f0d1b0b3
DH
141
142config ARCH_HAS_ILOG2_U64
143 bool
f0d1b0b3 144
89c52ed4
BD
145config ARCH_HAS_CPUFREQ
146 bool
147 help
148 Internal node to signify that the ARCH has CPUFREQ support
149 and that the relevant menu configurations are displayed for
150 it.
151
c7b0aff4
KH
152config ARCH_HAS_CPU_IDLE_WAIT
153 def_bool y
154
b89c3b16
AM
155config GENERIC_HWEIGHT
156 bool
157 default y
158
1da177e4
LT
159config GENERIC_CALIBRATE_DELAY
160 bool
161 default y
162
a08b6b79
Z
163config ARCH_MAY_HAVE_PC_FDC
164 bool
165
5ac6da66
CL
166config ZONE_DMA
167 bool
5ac6da66 168
ccd7ab7f
FT
169config NEED_DMA_MAP_STATE
170 def_bool y
171
1da177e4
LT
172config GENERIC_ISA_DMA
173 bool
174
1da177e4
LT
175config FIQ
176 bool
177
034d2f5a
AV
178config ARCH_MTD_XIP
179 bool
180
d6d502fa
KK
181config ARM_L1_CACHE_SHIFT_6
182 bool
183 help
184 Setting ARM L1 cache line size to 64 Bytes.
185
c760fc19
HC
186config VECTORS_BASE
187 hex
6afd6fae 188 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
c760fc19
HC
189 default DRAM_BASE if REMAP_VECTORS_TO_RAM
190 default 0x00000000
191 help
192 The base address of exception vectors.
193
1da177e4
LT
194source "init/Kconfig"
195
dc52ddc0
MH
196source "kernel/Kconfig.freezer"
197
1da177e4
LT
198menu "System Type"
199
3c427975
HC
200config MMU
201 bool "MMU-based Paged Memory Management Support"
202 default y
203 help
204 Select if you want MMU-based virtualised addressing space
205 support by paged memory management. If unsure, say 'Y'.
206
ccf50e23
RK
207#
208# The "ARM system type" choice list is ordered alphabetically by option
209# text. Please add new entries in the option alphabetic order.
210#
1da177e4
LT
211choice
212 prompt "ARM system type"
6a0e2430 213 default ARCH_VERSATILE
1da177e4 214
4af6fee1
DS
215config ARCH_AAEC2000
216 bool "Agilent AAEC-2000 based"
c750815e 217 select CPU_ARM920T
4af6fee1 218 select ARM_AMBA
9483a578 219 select HAVE_CLK
5cfc8ee0 220 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
221 help
222 This enables support for systems based on the Agilent AAEC-2000
223
224config ARCH_INTEGRATOR
225 bool "ARM Ltd. Integrator family"
226 select ARM_AMBA
89c52ed4 227 select ARCH_HAS_CPUFREQ
6d803ba7 228 select CLKDEV_LOOKUP
c5a0adb5 229 select ICST
13edd86d 230 select GENERIC_CLOCKEVENTS
f4b8b319 231 select PLAT_VERSATILE
4af6fee1
DS
232 help
233 Support for ARM's Integrator platform.
234
235config ARCH_REALVIEW
236 bool "ARM Ltd. RealView family"
237 select ARM_AMBA
6d803ba7 238 select CLKDEV_LOOKUP
c5a0adb5 239 select ICST
ae30ceac 240 select GENERIC_CLOCKEVENTS
eb7fffa3 241 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 242 select PLAT_VERSATILE
3cb5ee49 243 select PLAT_VERSATILE_CLCD
e3887714 244 select ARM_TIMER_SP804
b56ba8aa 245 select GPIO_PL061 if GPIOLIB
4af6fee1
DS
246 help
247 This enables support for ARM Ltd RealView boards.
248
249config ARCH_VERSATILE
250 bool "ARM Ltd. Versatile family"
251 select ARM_AMBA
252 select ARM_VIC
6d803ba7 253 select CLKDEV_LOOKUP
c5a0adb5 254 select ICST
89df1272 255 select GENERIC_CLOCKEVENTS
bbeddc43 256 select ARCH_WANT_OPTIONAL_GPIOLIB
f4b8b319 257 select PLAT_VERSATILE
3414ba8c 258 select PLAT_VERSATILE_CLCD
e3887714 259 select ARM_TIMER_SP804
4af6fee1
DS
260 help
261 This enables support for ARM Ltd Versatile board.
262
ceade897
RK
263config ARCH_VEXPRESS
264 bool "ARM Ltd. Versatile Express family"
265 select ARCH_WANT_OPTIONAL_GPIOLIB
266 select ARM_AMBA
267 select ARM_TIMER_SP804
6d803ba7 268 select CLKDEV_LOOKUP
ceade897 269 select GENERIC_CLOCKEVENTS
ceade897 270 select HAVE_CLK
95c34f83 271 select HAVE_PATA_PLATFORM
ceade897
RK
272 select ICST
273 select PLAT_VERSATILE
0fb44b91 274 select PLAT_VERSATILE_CLCD
ceade897
RK
275 help
276 This enables support for the ARM Ltd Versatile Express boards.
277
8fc5ffa0
AV
278config ARCH_AT91
279 bool "Atmel AT91"
f373e8c0 280 select ARCH_REQUIRE_GPIOLIB
93686ae8 281 select HAVE_CLK
4af6fee1 282 help
2b3b3516
AV
283 This enables support for systems based on the Atmel AT91RM9200,
284 AT91SAM9 and AT91CAP9 processors.
4af6fee1 285
ccf50e23
RK
286config ARCH_BCMRING
287 bool "Broadcom BCMRING"
288 depends on MMU
289 select CPU_V6
290 select ARM_AMBA
6d803ba7 291 select CLKDEV_LOOKUP
ccf50e23
RK
292 select GENERIC_CLOCKEVENTS
293 select ARCH_WANT_OPTIONAL_GPIOLIB
294 help
295 Support for Broadcom's BCMRing platform.
296
1da177e4 297config ARCH_CLPS711X
4af6fee1 298 bool "Cirrus Logic CLPS711x/EP721x-based"
c750815e 299 select CPU_ARM720T
5cfc8ee0 300 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
301 help
302 Support for Cirrus Logic 711x/721x based boards.
1da177e4 303
d94f944e
AV
304config ARCH_CNS3XXX
305 bool "Cavium Networks CNS3XXX family"
306 select CPU_V6
d94f944e
AV
307 select GENERIC_CLOCKEVENTS
308 select ARM_GIC
0b05da72 309 select MIGHT_HAVE_PCI
5f32f7a0 310 select PCI_DOMAINS if PCI
d94f944e
AV
311 help
312 Support for Cavium Networks CNS3XXX platform.
313
788c9700
RK
314config ARCH_GEMINI
315 bool "Cortina Systems Gemini"
316 select CPU_FA526
788c9700 317 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 318 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
319 help
320 Support for the Cortina Systems Gemini family SoCs
321
1da177e4
LT
322config ARCH_EBSA110
323 bool "EBSA-110"
c750815e 324 select CPU_SA110
f7e68bbf 325 select ISA
c5eb2a2b 326 select NO_IOPORT
5cfc8ee0 327 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
328 help
329 This is an evaluation board for the StrongARM processor available
f6c8965a 330 from Digital. It has limited hardware on-board, including an
1da177e4
LT
331 Ethernet interface, two PCMCIA sockets, two serial ports and a
332 parallel port.
333
e7736d47
LB
334config ARCH_EP93XX
335 bool "EP93xx-based"
c750815e 336 select CPU_ARM920T
e7736d47
LB
337 select ARM_AMBA
338 select ARM_VIC
6d803ba7 339 select CLKDEV_LOOKUP
7444a72e 340 select ARCH_REQUIRE_GPIOLIB
eb33575c 341 select ARCH_HAS_HOLES_MEMORYMODEL
5cfc8ee0 342 select ARCH_USES_GETTIMEOFFSET
e7736d47
LB
343 help
344 This enables support for the Cirrus EP93xx series of CPUs.
345
1da177e4
LT
346config ARCH_FOOTBRIDGE
347 bool "FootBridge"
c750815e 348 select CPU_SA110
1da177e4 349 select FOOTBRIDGE
5cfc8ee0 350 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
351 help
352 Support for systems based on the DC21285 companion chip
353 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
1da177e4 354
788c9700
RK
355config ARCH_MXC
356 bool "Freescale MXC/iMX-based"
788c9700 357 select GENERIC_CLOCKEVENTS
788c9700 358 select ARCH_REQUIRE_GPIOLIB
6d803ba7 359 select CLKDEV_LOOKUP
788c9700
RK
360 help
361 Support for Freescale MXC/iMX-based family of processors
362
1d3f33d5
SG
363config ARCH_MXS
364 bool "Freescale MXS-based"
365 select GENERIC_CLOCKEVENTS
366 select ARCH_REQUIRE_GPIOLIB
b9214b97 367 select CLKDEV_LOOKUP
1d3f33d5
SG
368 help
369 Support for Freescale MXS-based family of processors
370
7bd0f2f5 371config ARCH_STMP3XXX
372 bool "Freescale STMP3xxx"
373 select CPU_ARM926T
6d803ba7 374 select CLKDEV_LOOKUP
7bd0f2f5 375 select ARCH_REQUIRE_GPIOLIB
7bd0f2f5 376 select GENERIC_CLOCKEVENTS
7bd0f2f5 377 select USB_ARCH_HAS_EHCI
378 help
379 Support for systems based on the Freescale 3xxx CPUs.
380
4af6fee1
DS
381config ARCH_NETX
382 bool "Hilscher NetX based"
c750815e 383 select CPU_ARM926T
4af6fee1 384 select ARM_VIC
2fcfe6b8 385 select GENERIC_CLOCKEVENTS
f999b8bd 386 help
4af6fee1
DS
387 This enables support for systems based on the Hilscher NetX Soc
388
389config ARCH_H720X
390 bool "Hynix HMS720x-based"
c750815e 391 select CPU_ARM720T
4af6fee1 392 select ISA_DMA_API
5cfc8ee0 393 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
394 help
395 This enables support for systems based on the Hynix HMS720x
396
3b938be6
RK
397config ARCH_IOP13XX
398 bool "IOP13xx-based"
399 depends on MMU
c750815e 400 select CPU_XSC3
3b938be6
RK
401 select PLAT_IOP
402 select PCI
403 select ARCH_SUPPORTS_MSI
8d5796d2 404 select VMSPLIT_1G
3b938be6
RK
405 help
406 Support for Intel's IOP13XX (XScale) family of processors.
407
3f7e5815
LB
408config ARCH_IOP32X
409 bool "IOP32x-based"
a4f7e763 410 depends on MMU
c750815e 411 select CPU_XSCALE
7ae1f7ec 412 select PLAT_IOP
f7e68bbf 413 select PCI
bb2b180c 414 select ARCH_REQUIRE_GPIOLIB
f999b8bd 415 help
3f7e5815
LB
416 Support for Intel's 80219 and IOP32X (XScale) family of
417 processors.
418
419config ARCH_IOP33X
420 bool "IOP33x-based"
421 depends on MMU
c750815e 422 select CPU_XSCALE
7ae1f7ec 423 select PLAT_IOP
3f7e5815 424 select PCI
bb2b180c 425 select ARCH_REQUIRE_GPIOLIB
3f7e5815
LB
426 help
427 Support for Intel's IOP33X (XScale) family of processors.
1da177e4 428
3b938be6
RK
429config ARCH_IXP23XX
430 bool "IXP23XX-based"
a4f7e763 431 depends on MMU
c750815e 432 select CPU_XSC3
3b938be6 433 select PCI
5cfc8ee0 434 select ARCH_USES_GETTIMEOFFSET
f999b8bd 435 help
3b938be6 436 Support for Intel's IXP23xx (XScale) family of processors.
1da177e4
LT
437
438config ARCH_IXP2000
439 bool "IXP2400/2800-based"
a4f7e763 440 depends on MMU
c750815e 441 select CPU_XSCALE
f7e68bbf 442 select PCI
5cfc8ee0 443 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
444 help
445 Support for Intel's IXP2400/2800 (XScale) family of processors.
1da177e4 446
3b938be6
RK
447config ARCH_IXP4XX
448 bool "IXP4xx-based"
a4f7e763 449 depends on MMU
c750815e 450 select CPU_XSCALE
8858e9af 451 select GENERIC_GPIO
3b938be6 452 select GENERIC_CLOCKEVENTS
5b0d495c 453 select HAVE_SCHED_CLOCK
0b05da72 454 select MIGHT_HAVE_PCI
485bdde7 455 select DMABOUNCE if PCI
c4713074 456 help
3b938be6 457 Support for Intel's IXP4XX (XScale) family of processors.
c4713074 458
edabd38e
SB
459config ARCH_DOVE
460 bool "Marvell Dove"
461 select PCI
edabd38e 462 select ARCH_REQUIRE_GPIOLIB
edabd38e
SB
463 select GENERIC_CLOCKEVENTS
464 select PLAT_ORION
465 help
466 Support for the Marvell Dove SoC 88AP510
467
651c74c7
SB
468config ARCH_KIRKWOOD
469 bool "Marvell Kirkwood"
c750815e 470 select CPU_FEROCEON
651c74c7 471 select PCI
a8865655 472 select ARCH_REQUIRE_GPIOLIB
651c74c7
SB
473 select GENERIC_CLOCKEVENTS
474 select PLAT_ORION
475 help
476 Support for the following Marvell Kirkwood series SoCs:
477 88F6180, 88F6192 and 88F6281.
478
777f9beb
LB
479config ARCH_LOKI
480 bool "Marvell Loki (88RC8480)"
c750815e 481 select CPU_FEROCEON
777f9beb
LB
482 select GENERIC_CLOCKEVENTS
483 select PLAT_ORION
484 help
485 Support for the Marvell Loki (88RC8480) SoC.
486
40805949
KW
487config ARCH_LPC32XX
488 bool "NXP LPC32XX"
489 select CPU_ARM926T
490 select ARCH_REQUIRE_GPIOLIB
491 select HAVE_IDE
492 select ARM_AMBA
493 select USB_ARCH_HAS_OHCI
6d803ba7 494 select CLKDEV_LOOKUP
40805949
KW
495 select GENERIC_TIME
496 select GENERIC_CLOCKEVENTS
497 help
498 Support for the NXP LPC32XX family of processors
499
794d15b2
SS
500config ARCH_MV78XX0
501 bool "Marvell MV78xx0"
c750815e 502 select CPU_FEROCEON
794d15b2 503 select PCI
a8865655 504 select ARCH_REQUIRE_GPIOLIB
794d15b2
SS
505 select GENERIC_CLOCKEVENTS
506 select PLAT_ORION
507 help
508 Support for the following Marvell MV78xx0 series SoCs:
509 MV781x0, MV782x0.
510
9dd0b194 511config ARCH_ORION5X
585cf175
TP
512 bool "Marvell Orion"
513 depends on MMU
c750815e 514 select CPU_FEROCEON
038ee083 515 select PCI
a8865655 516 select ARCH_REQUIRE_GPIOLIB
51cbff1d 517 select GENERIC_CLOCKEVENTS
69b02f6a 518 select PLAT_ORION
585cf175 519 help
9dd0b194 520 Support for the following Marvell Orion 5x series SoCs:
d2b2a6bb 521 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
d323ade1 522 Orion-2 (5281), Orion-1-90 (6183).
585cf175 523
788c9700 524config ARCH_MMP
2f7e8fae 525 bool "Marvell PXA168/910/MMP2"
788c9700 526 depends on MMU
788c9700 527 select ARCH_REQUIRE_GPIOLIB
6d803ba7 528 select CLKDEV_LOOKUP
788c9700 529 select GENERIC_CLOCKEVENTS
28bb7bc6 530 select HAVE_SCHED_CLOCK
788c9700
RK
531 select TICK_ONESHOT
532 select PLAT_PXA
0bd86961 533 select SPARSE_IRQ
788c9700 534 help
2f7e8fae 535 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
788c9700
RK
536
537config ARCH_KS8695
538 bool "Micrel/Kendin KS8695"
539 select CPU_ARM922T
98830bc9 540 select ARCH_REQUIRE_GPIOLIB
5cfc8ee0 541 select ARCH_USES_GETTIMEOFFSET
788c9700
RK
542 help
543 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
544 System-on-Chip devices.
545
546config ARCH_NS9XXX
547 bool "NetSilicon NS9xxx"
548 select CPU_ARM926T
549 select GENERIC_GPIO
788c9700
RK
550 select GENERIC_CLOCKEVENTS
551 select HAVE_CLK
552 help
553 Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
554 System.
555
556 <http://www.digi.com/products/microprocessors/index.jsp>
557
558config ARCH_W90X900
559 bool "Nuvoton W90X900 CPU"
560 select CPU_ARM926T
c52d3d68 561 select ARCH_REQUIRE_GPIOLIB
6d803ba7 562 select CLKDEV_LOOKUP
58b5369e 563 select GENERIC_CLOCKEVENTS
788c9700 564 help
a8bc4ead 565 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
566 At present, the w90x900 has been renamed nuc900, regarding
567 the ARM series product line, you can login the following
568 link address to know more.
569
570 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
571 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
788c9700 572
a62e9030 573config ARCH_NUC93X
574 bool "Nuvoton NUC93X CPU"
575 select CPU_ARM926T
6d803ba7 576 select CLKDEV_LOOKUP
a62e9030 577 help
578 Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
579 low-power and high performance MPEG-4/JPEG multimedia controller chip.
580
c5f80065
EG
581config ARCH_TEGRA
582 bool "NVIDIA Tegra"
4073723a 583 select CLKDEV_LOOKUP
c5f80065
EG
584 select GENERIC_TIME
585 select GENERIC_CLOCKEVENTS
586 select GENERIC_GPIO
587 select HAVE_CLK
e3f4c0ab 588 select HAVE_SCHED_CLOCK
c5f80065 589 select ARCH_HAS_BARRIERS if CACHE_L2X0
7056d423 590 select ARCH_HAS_CPUFREQ
c5f80065
EG
591 help
592 This enables support for NVIDIA Tegra based systems (Tegra APX,
593 Tegra 6xx and Tegra 2 series).
594
4af6fee1
DS
595config ARCH_PNX4008
596 bool "Philips Nexperia PNX4008 Mobile"
c750815e 597 select CPU_ARM926T
6d803ba7 598 select CLKDEV_LOOKUP
5cfc8ee0 599 select ARCH_USES_GETTIMEOFFSET
4af6fee1
DS
600 help
601 This enables support for Philips PNX4008 mobile platform.
602
1da177e4 603config ARCH_PXA
2c8086a5 604 bool "PXA2xx/PXA3xx-based"
a4f7e763 605 depends on MMU
034d2f5a 606 select ARCH_MTD_XIP
89c52ed4 607 select ARCH_HAS_CPUFREQ
6d803ba7 608 select CLKDEV_LOOKUP
7444a72e 609 select ARCH_REQUIRE_GPIOLIB
981d0f39 610 select GENERIC_CLOCKEVENTS
7ce83018 611 select HAVE_SCHED_CLOCK
a88264c2 612 select TICK_ONESHOT
bd5ce433 613 select PLAT_PXA
6ac6b817 614 select SPARSE_IRQ
f999b8bd 615 help
2c8086a5 616 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
1da177e4 617
788c9700
RK
618config ARCH_MSM
619 bool "Qualcomm MSM"
4b536b8d 620 select HAVE_CLK
49cbe786 621 select GENERIC_CLOCKEVENTS
923a081c 622 select ARCH_REQUIRE_GPIOLIB
49cbe786 623 help
4b53eb4f
DW
624 Support for Qualcomm MSM/QSD based systems. This runs on the
625 apps processor of the MSM/QSD and depends on a shared memory
626 interface to the modem processor which runs the baseband
627 stack and controls some vital subsystems
628 (clock and power control, etc).
49cbe786 629
c793c1b0 630config ARCH_SHMOBILE
6d72ad35
PM
631 bool "Renesas SH-Mobile / R-Mobile"
632 select HAVE_CLK
5e93c6b4 633 select CLKDEV_LOOKUP
6d72ad35
PM
634 select GENERIC_CLOCKEVENTS
635 select NO_IOPORT
636 select SPARSE_IRQ
60f1435c 637 select MULTI_IRQ_HANDLER
c793c1b0 638 help
6d72ad35 639 Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
c793c1b0 640
1da177e4
LT
641config ARCH_RPC
642 bool "RiscPC"
643 select ARCH_ACORN
644 select FIQ
645 select TIMER_ACORN
a08b6b79 646 select ARCH_MAY_HAVE_PC_FDC
341eb781 647 select HAVE_PATA_PLATFORM
065909b9 648 select ISA_DMA_API
5ea81769 649 select NO_IOPORT
07f841b7 650 select ARCH_SPARSEMEM_ENABLE
5cfc8ee0 651 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
652 help
653 On the Acorn Risc-PC, Linux can support the internal IDE disk and
654 CD-ROM interface, serial and parallel port, and the floppy drive.
655
656config ARCH_SA1100
657 bool "SA1100-based"
c750815e 658 select CPU_SA1100
f7e68bbf 659 select ISA
05944d74 660 select ARCH_SPARSEMEM_ENABLE
034d2f5a 661 select ARCH_MTD_XIP
89c52ed4 662 select ARCH_HAS_CPUFREQ
1937f5b9 663 select CPU_FREQ
3e238be2 664 select GENERIC_CLOCKEVENTS
9483a578 665 select HAVE_CLK
5094b92f 666 select HAVE_SCHED_CLOCK
3e238be2 667 select TICK_ONESHOT
7444a72e 668 select ARCH_REQUIRE_GPIOLIB
f999b8bd
MM
669 help
670 Support for StrongARM 11x0 based boards.
1da177e4
LT
671
672config ARCH_S3C2410
63b1f51b 673 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
0a938b97 674 select GENERIC_GPIO
9d56c02a 675 select ARCH_HAS_CPUFREQ
9483a578 676 select HAVE_CLK
5cfc8ee0 677 select ARCH_USES_GETTIMEOFFSET
20676c15 678 select HAVE_S3C2410_I2C if I2C
1da177e4
LT
679 help
680 Samsung S3C2410X CPU based systems, such as the Simtec Electronics
681 BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
f6c8965a 682 the Samsung SMDK2410 development board (and derivatives).
1da177e4 683
63b1f51b
BD
684 Note, the S3C2416 and the S3C2450 are so close that they even share
685 the same SoC ID code. This means that there is no seperate machine
686 directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
687
a08ab637
BD
688config ARCH_S3C64XX
689 bool "Samsung S3C64XX"
89f1fa08 690 select PLAT_SAMSUNG
89f0ce72 691 select CPU_V6
89f0ce72 692 select ARM_VIC
a08ab637 693 select HAVE_CLK
89f0ce72 694 select NO_IOPORT
5cfc8ee0 695 select ARCH_USES_GETTIMEOFFSET
89c52ed4 696 select ARCH_HAS_CPUFREQ
89f0ce72
BD
697 select ARCH_REQUIRE_GPIOLIB
698 select SAMSUNG_CLKSRC
699 select SAMSUNG_IRQ_VIC_TIMER
700 select SAMSUNG_IRQ_UART
701 select S3C_GPIO_TRACK
702 select S3C_GPIO_PULL_UPDOWN
703 select S3C_GPIO_CFG_S3C24XX
704 select S3C_GPIO_CFG_S3C64XX
705 select S3C_DEV_NAND
706 select USB_ARCH_HAS_OHCI
707 select SAMSUNG_GPIOLIB_4BIT
20676c15 708 select HAVE_S3C2410_I2C if I2C
c39d8d55 709 select HAVE_S3C2410_WATCHDOG if WATCHDOG
a08ab637
BD
710 help
711 Samsung S3C64XX series based systems
712
49b7a491
KK
713config ARCH_S5P64X0
714 bool "Samsung S5P6440 S5P6450"
c4ffccdd
KK
715 select CPU_V6
716 select GENERIC_GPIO
717 select HAVE_CLK
c39d8d55 718 select HAVE_S3C2410_WATCHDOG if WATCHDOG
925c68cd 719 select ARCH_USES_GETTIMEOFFSET
20676c15 720 select HAVE_S3C2410_I2C if I2C
754961a8 721 select HAVE_S3C_RTC if RTC_CLASS
c4ffccdd 722 help
49b7a491
KK
723 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
724 SMDK6450.
c4ffccdd 725
550db7f1
KK
726config ARCH_S5P6442
727 bool "Samsung S5P6442"
728 select CPU_V6
729 select GENERIC_GPIO
730 select HAVE_CLK
925c68cd 731 select ARCH_USES_GETTIMEOFFSET
c39d8d55 732 select HAVE_S3C2410_WATCHDOG if WATCHDOG
550db7f1
KK
733 help
734 Samsung S5P6442 CPU based systems
735
acc84707
MS
736config ARCH_S5PC100
737 bool "Samsung S5PC100"
5a7652f2
BM
738 select GENERIC_GPIO
739 select HAVE_CLK
740 select CPU_V7
d6d502fa 741 select ARM_L1_CACHE_SHIFT_6
925c68cd 742 select ARCH_USES_GETTIMEOFFSET
20676c15 743 select HAVE_S3C2410_I2C if I2C
754961a8 744 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 745 select HAVE_S3C2410_WATCHDOG if WATCHDOG
5a7652f2 746 help
acc84707 747 Samsung S5PC100 series based systems
5a7652f2 748
170f4e42
KK
749config ARCH_S5PV210
750 bool "Samsung S5PV210/S5PC110"
751 select CPU_V7
eecb6a84 752 select ARCH_SPARSEMEM_ENABLE
170f4e42
KK
753 select GENERIC_GPIO
754 select HAVE_CLK
755 select ARM_L1_CACHE_SHIFT_6
d8144aea 756 select ARCH_HAS_CPUFREQ
925c68cd 757 select ARCH_USES_GETTIMEOFFSET
20676c15 758 select HAVE_S3C2410_I2C if I2C
754961a8 759 select HAVE_S3C_RTC if RTC_CLASS
c39d8d55 760 select HAVE_S3C2410_WATCHDOG if WATCHDOG
170f4e42
KK
761 help
762 Samsung S5PV210/S5PC110 series based systems
763
cc0e72b8
CY
764config ARCH_S5PV310
765 bool "Samsung S5PV310/S5PC210"
766 select CPU_V7
f567fa6f 767 select ARCH_SPARSEMEM_ENABLE
cc0e72b8
CY
768 select GENERIC_GPIO
769 select HAVE_CLK
b333fb16 770 select ARCH_HAS_CPUFREQ
cc0e72b8 771 select GENERIC_CLOCKEVENTS
754961a8 772 select HAVE_S3C_RTC if RTC_CLASS
20676c15 773 select HAVE_S3C2410_I2C if I2C
c39d8d55 774 select HAVE_S3C2410_WATCHDOG if WATCHDOG
cc0e72b8
CY
775 help
776 Samsung S5PV310 series based systems
777
1da177e4
LT
778config ARCH_SHARK
779 bool "Shark"
c750815e 780 select CPU_SA110
f7e68bbf
RK
781 select ISA
782 select ISA_DMA
3bca103a 783 select ZONE_DMA
f7e68bbf 784 select PCI
5cfc8ee0 785 select ARCH_USES_GETTIMEOFFSET
f999b8bd
MM
786 help
787 Support for the StrongARM based Digital DNARD machine, also known
788 as "Shark" (<http://www.shark-linux.de/shark.html>).
1da177e4 789
83ef3338
HK
790config ARCH_TCC_926
791 bool "Telechips TCC ARM926-based systems"
792 select CPU_ARM926T
793 select HAVE_CLK
6d803ba7 794 select CLKDEV_LOOKUP
83ef3338
HK
795 select GENERIC_CLOCKEVENTS
796 help
797 Support for Telechips TCC ARM926-based systems.
798
1da177e4
LT
799config ARCH_LH7A40X
800 bool "Sharp LH7A40X"
c750815e 801 select CPU_ARM922T
4ba3f7c5 802 select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
5cfc8ee0 803 select ARCH_USES_GETTIMEOFFSET
1da177e4
LT
804 help
805 Say Y here for systems based on one of the Sharp LH7A40X
806 System on a Chip processors. These CPUs include an ARM922T
807 core with a wide array of integrated devices for
808 hand-held and low-power applications.
809
d98aac75
LW
810config ARCH_U300
811 bool "ST-Ericsson U300 Series"
812 depends on MMU
813 select CPU_ARM926T
5c21b7ca 814 select HAVE_SCHED_CLOCK
bc581770 815 select HAVE_TCM
d98aac75
LW
816 select ARM_AMBA
817 select ARM_VIC
d98aac75 818 select GENERIC_CLOCKEVENTS
6d803ba7 819 select CLKDEV_LOOKUP
d98aac75
LW
820 select GENERIC_GPIO
821 help
822 Support for ST-Ericsson U300 series mobile platforms.
823
ccf50e23
RK
824config ARCH_U8500
825 bool "ST-Ericsson U8500 Series"
826 select CPU_V7
827 select ARM_AMBA
ccf50e23 828 select GENERIC_CLOCKEVENTS
6d803ba7 829 select CLKDEV_LOOKUP
94bdc0e2 830 select ARCH_REQUIRE_GPIOLIB
7c1a70e9 831 select ARCH_HAS_CPUFREQ
ccf50e23
RK
832 help
833 Support for ST-Ericsson's Ux500 architecture
834
835config ARCH_NOMADIK
836 bool "STMicroelectronics Nomadik"
837 select ARM_AMBA
838 select ARM_VIC
839 select CPU_ARM926T
6d803ba7 840 select CLKDEV_LOOKUP
ccf50e23 841 select GENERIC_CLOCKEVENTS
ccf50e23
RK
842 select ARCH_REQUIRE_GPIOLIB
843 help
844 Support for the Nomadik platform by ST-Ericsson
845
7c6337e2
KH
846config ARCH_DAVINCI
847 bool "TI DaVinci"
7c6337e2 848 select GENERIC_CLOCKEVENTS
dce1115b 849 select ARCH_REQUIRE_GPIOLIB
3bca103a 850 select ZONE_DMA
9232fcc9 851 select HAVE_IDE
6d803ba7 852 select CLKDEV_LOOKUP
20e9969b 853 select GENERIC_ALLOCATOR
ae88e05a 854 select ARCH_HAS_HOLES_MEMORYMODEL
7c6337e2
KH
855 help
856 Support for TI's DaVinci platform.
857
3b938be6
RK
858config ARCH_OMAP
859 bool "TI OMAP"
9483a578 860 select HAVE_CLK
7444a72e 861 select ARCH_REQUIRE_GPIOLIB
89c52ed4 862 select ARCH_HAS_CPUFREQ
06cad098 863 select GENERIC_CLOCKEVENTS
dc548fbb 864 select HAVE_SCHED_CLOCK
9af915da 865 select ARCH_HAS_HOLES_MEMORYMODEL
3b938be6 866 help
6e457bb0 867 Support for TI's OMAP platform (OMAP1/2/3/4).
3b938be6 868
cee37e50 869config PLAT_SPEAR
870 bool "ST SPEAr"
871 select ARM_AMBA
872 select ARCH_REQUIRE_GPIOLIB
6d803ba7 873 select CLKDEV_LOOKUP
cee37e50 874 select GENERIC_CLOCKEVENTS
cee37e50 875 select HAVE_CLK
876 help
877 Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
878
1da177e4
LT
879endchoice
880
ccf50e23
RK
881#
882# This is sorted alphabetically by mach-* pathname. However, plat-*
883# Kconfigs may be included either alphabetically (according to the
884# plat- suffix) or along side the corresponding mach-* source.
885#
95b8f20f
RK
886source "arch/arm/mach-aaec2000/Kconfig"
887
888source "arch/arm/mach-at91/Kconfig"
889
890source "arch/arm/mach-bcmring/Kconfig"
891
1da177e4
LT
892source "arch/arm/mach-clps711x/Kconfig"
893
d94f944e
AV
894source "arch/arm/mach-cns3xxx/Kconfig"
895
95b8f20f
RK
896source "arch/arm/mach-davinci/Kconfig"
897
898source "arch/arm/mach-dove/Kconfig"
899
e7736d47
LB
900source "arch/arm/mach-ep93xx/Kconfig"
901
1da177e4
LT
902source "arch/arm/mach-footbridge/Kconfig"
903
59d3a193
PZ
904source "arch/arm/mach-gemini/Kconfig"
905
95b8f20f
RK
906source "arch/arm/mach-h720x/Kconfig"
907
1da177e4
LT
908source "arch/arm/mach-integrator/Kconfig"
909
3f7e5815
LB
910source "arch/arm/mach-iop32x/Kconfig"
911
912source "arch/arm/mach-iop33x/Kconfig"
1da177e4 913
285f5fa7
DW
914source "arch/arm/mach-iop13xx/Kconfig"
915
1da177e4
LT
916source "arch/arm/mach-ixp4xx/Kconfig"
917
918source "arch/arm/mach-ixp2000/Kconfig"
919
c4713074
LB
920source "arch/arm/mach-ixp23xx/Kconfig"
921
95b8f20f
RK
922source "arch/arm/mach-kirkwood/Kconfig"
923
924source "arch/arm/mach-ks8695/Kconfig"
925
926source "arch/arm/mach-lh7a40x/Kconfig"
927
777f9beb
LB
928source "arch/arm/mach-loki/Kconfig"
929
40805949
KW
930source "arch/arm/mach-lpc32xx/Kconfig"
931
95b8f20f
RK
932source "arch/arm/mach-msm/Kconfig"
933
794d15b2
SS
934source "arch/arm/mach-mv78xx0/Kconfig"
935
95b8f20f 936source "arch/arm/plat-mxc/Kconfig"
1da177e4 937
1d3f33d5
SG
938source "arch/arm/mach-mxs/Kconfig"
939
95b8f20f 940source "arch/arm/mach-netx/Kconfig"
49cbe786 941
95b8f20f
RK
942source "arch/arm/mach-nomadik/Kconfig"
943source "arch/arm/plat-nomadik/Kconfig"
944
945source "arch/arm/mach-ns9xxx/Kconfig"
1da177e4 946
186f93ea 947source "arch/arm/mach-nuc93x/Kconfig"
1da177e4 948
d48af15e
TL
949source "arch/arm/plat-omap/Kconfig"
950
951source "arch/arm/mach-omap1/Kconfig"
1da177e4 952
1dbae815
TL
953source "arch/arm/mach-omap2/Kconfig"
954
9dd0b194 955source "arch/arm/mach-orion5x/Kconfig"
585cf175 956
95b8f20f
RK
957source "arch/arm/mach-pxa/Kconfig"
958source "arch/arm/plat-pxa/Kconfig"
585cf175 959
95b8f20f
RK
960source "arch/arm/mach-mmp/Kconfig"
961
962source "arch/arm/mach-realview/Kconfig"
963
964source "arch/arm/mach-sa1100/Kconfig"
edabd38e 965
cf383678 966source "arch/arm/plat-samsung/Kconfig"
a21765a7 967source "arch/arm/plat-s3c24xx/Kconfig"
c4ffccdd 968source "arch/arm/plat-s5p/Kconfig"
a21765a7 969
cee37e50 970source "arch/arm/plat-spear/Kconfig"
a21765a7 971
83ef3338
HK
972source "arch/arm/plat-tcc/Kconfig"
973
a21765a7
BD
974if ARCH_S3C2410
975source "arch/arm/mach-s3c2400/Kconfig"
1da177e4 976source "arch/arm/mach-s3c2410/Kconfig"
a21765a7 977source "arch/arm/mach-s3c2412/Kconfig"
f1290a49 978source "arch/arm/mach-s3c2416/Kconfig"
a21765a7 979source "arch/arm/mach-s3c2440/Kconfig"
e4d06e39 980source "arch/arm/mach-s3c2443/Kconfig"
a21765a7 981endif
1da177e4 982
a08ab637 983if ARCH_S3C64XX
431107ea 984source "arch/arm/mach-s3c64xx/Kconfig"
a08ab637
BD
985endif
986
49b7a491 987source "arch/arm/mach-s5p64x0/Kconfig"
c4ffccdd 988
550db7f1 989source "arch/arm/mach-s5p6442/Kconfig"
7bd0f2f5 990
5a7652f2 991source "arch/arm/mach-s5pc100/Kconfig"
5a7652f2 992
170f4e42
KK
993source "arch/arm/mach-s5pv210/Kconfig"
994
cc0e72b8
CY
995source "arch/arm/mach-s5pv310/Kconfig"
996
882d01f9 997source "arch/arm/mach-shmobile/Kconfig"
52c543f9 998
882d01f9 999source "arch/arm/plat-stmp3xxx/Kconfig"
9e73c84c 1000
c5f80065
EG
1001source "arch/arm/mach-tegra/Kconfig"
1002
95b8f20f 1003source "arch/arm/mach-u300/Kconfig"
1da177e4 1004
95b8f20f 1005source "arch/arm/mach-ux500/Kconfig"
1da177e4
LT
1006
1007source "arch/arm/mach-versatile/Kconfig"
1008
ceade897 1009source "arch/arm/mach-vexpress/Kconfig"
420c34e4 1010source "arch/arm/plat-versatile/Kconfig"
ceade897 1011
7ec80ddf 1012source "arch/arm/mach-w90x900/Kconfig"
1013
1da177e4
LT
1014# Definitions to make life easier
1015config ARCH_ACORN
1016 bool
1017
7ae1f7ec
LB
1018config PLAT_IOP
1019 bool
469d3044 1020 select GENERIC_CLOCKEVENTS
08f26b1e 1021 select HAVE_SCHED_CLOCK
7ae1f7ec 1022
69b02f6a
LB
1023config PLAT_ORION
1024 bool
f06a1624 1025 select HAVE_SCHED_CLOCK
69b02f6a 1026
bd5ce433
EM
1027config PLAT_PXA
1028 bool
1029
f4b8b319
RK
1030config PLAT_VERSATILE
1031 bool
1032
e3887714
RK
1033config ARM_TIMER_SP804
1034 bool
1035
1da177e4
LT
1036source arch/arm/mm/Kconfig
1037
afe4b25e
LB
1038config IWMMXT
1039 bool "Enable iWMMXt support"
ef6c8445
HZ
1040 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
1041 default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
afe4b25e
LB
1042 help
1043 Enable support for iWMMXt context switching at run time if
1044 running on a CPU that supports it.
1045
1da177e4
LT
1046# bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
1047config XSCALE_PMU
1048 bool
1049 depends on CPU_XSCALE && !XSCALE_PMU_TIMER
1050 default y
1051
0f4f0672 1052config CPU_HAS_PMU
8954bb0d
WD
1053 depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
1054 (!ARCH_OMAP3 || OMAP3_EMU)
0f4f0672
JI
1055 default y
1056 bool
1057
52108641 1058config MULTI_IRQ_HANDLER
1059 bool
1060 help
1061 Allow each machine to specify it's own IRQ handler at run time.
1062
3b93e7b0
HC
1063if !MMU
1064source "arch/arm/Kconfig-nommu"
1065endif
1066
9cba3ccc
CM
1067config ARM_ERRATA_411920
1068 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
81d11955 1069 depends on CPU_V6
9cba3ccc
CM
1070 help
1071 Invalidation of the Instruction Cache operation can
1072 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1073 It does not affect the MPCore. This option enables the ARM Ltd.
1074 recommended workaround.
1075
7ce236fc
CM
1076config ARM_ERRATA_430973
1077 bool "ARM errata: Stale prediction on replaced interworking branch"
1078 depends on CPU_V7
1079 help
1080 This option enables the workaround for the 430973 Cortex-A8
1081 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1082 interworking branch is replaced with another code sequence at the
1083 same virtual address, whether due to self-modifying code or virtual
1084 to physical address re-mapping, Cortex-A8 does not recover from the
1085 stale interworking branch prediction. This results in Cortex-A8
1086 executing the new code sequence in the incorrect ARM or Thumb state.
1087 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
1088 and also flushes the branch target cache at every context switch.
1089 Note that setting specific bits in the ACTLR register may not be
1090 available in non-secure mode.
1091
855c551f
CM
1092config ARM_ERRATA_458693
1093 bool "ARM errata: Processor deadlock when a false hazard is created"
1094 depends on CPU_V7
1095 help
1096 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
1097 erratum. For very specific sequences of memory operations, it is
1098 possible for a hazard condition intended for a cache line to instead
1099 be incorrectly associated with a different cache line. This false
1100 hazard might then cause a processor deadlock. The workaround enables
1101 the L1 caching of the NEON accesses and disables the PLD instruction
1102 in the ACTLR register. Note that setting specific bits in the ACTLR
1103 register may not be available in non-secure mode.
1104
0516e464
CM
1105config ARM_ERRATA_460075
1106 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1107 depends on CPU_V7
1108 help
1109 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1110 erratum. Any asynchronous access to the L2 cache may encounter a
1111 situation in which recent store transactions to the L2 cache are lost
1112 and overwritten with stale memory contents from external memory. The
1113 workaround disables the write-allocate mode for the L2 cache via the
1114 ACTLR register. Note that setting specific bits in the ACTLR register
1115 may not be available in non-secure mode.
1116
9f05027c
WD
1117config ARM_ERRATA_742230
1118 bool "ARM errata: DMB operation may be faulty"
1119 depends on CPU_V7 && SMP
1120 help
1121 This option enables the workaround for the 742230 Cortex-A9
1122 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1123 between two write operations may not ensure the correct visibility
1124 ordering of the two writes. This workaround sets a specific bit in
1125 the diagnostic register of the Cortex-A9 which causes the DMB
1126 instruction to behave as a DSB, ensuring the correct behaviour of
1127 the two writes.
1128
a672e99b
WD
1129config ARM_ERRATA_742231
1130 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1131 depends on CPU_V7 && SMP
1132 help
1133 This option enables the workaround for the 742231 Cortex-A9
1134 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1135 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1136 accessing some data located in the same cache line, may get corrupted
1137 data due to bad handling of the address hazard when the line gets
1138 replaced from one of the CPUs at the same time as another CPU is
1139 accessing it. This workaround sets specific bits in the diagnostic
1140 register of the Cortex-A9 which reduces the linefill issuing
1141 capabilities of the processor.
1142
9e65582a
SS
1143config PL310_ERRATA_588369
1144 bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
1145 depends on CACHE_L2X0 && ARCH_OMAP4
1146 help
1147 The PL310 L2 cache controller implements three types of Clean &
1148 Invalidate maintenance operations: by Physical Address
1149 (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
1150 They are architecturally defined to behave as the execution of a
1151 clean operation followed immediately by an invalidate operation,
1152 both performing to the same memory location. This functionality
1153 is not correctly implemented in PL310 as clean lines are not
1154 invalidated as a result of these operations. Note that this errata
1155 uses Texas Instrument's secure monitor api.
cdf357f1
WD
1156
1157config ARM_ERRATA_720789
1158 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
1159 depends on CPU_V7 && SMP
1160 help
1161 This option enables the workaround for the 720789 Cortex-A9 (prior to
1162 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1163 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1164 As a consequence of this erratum, some TLB entries which should be
1165 invalidated are not, resulting in an incoherency in the system page
1166 tables. The workaround changes the TLB flushing routines to invalidate
1167 entries regardless of the ASID.
475d92fc
WD
1168
1169config ARM_ERRATA_743622
1170 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1171 depends on CPU_V7
1172 help
1173 This option enables the workaround for the 743622 Cortex-A9
1174 (r2p0..r2p2) erratum. Under very rare conditions, a faulty
1175 optimisation in the Cortex-A9 Store Buffer may lead to data
1176 corruption. This workaround sets a specific bit in the diagnostic
1177 register of the Cortex-A9 which disables the Store Buffer
1178 optimisation, preventing the defect from occurring. This has no
1179 visible impact on the overall performance or power consumption of the
1180 processor.
1181
1da177e4
LT
1182endmenu
1183
1184source "arch/arm/common/Kconfig"
1185
1da177e4
LT
1186menu "Bus support"
1187
1188config ARM_AMBA
1189 bool
1190
1191config ISA
1192 bool
1da177e4
LT
1193 help
1194 Find out whether you have ISA slots on your motherboard. ISA is the
1195 name of a bus system, i.e. the way the CPU talks to the other stuff
1196 inside your box. Other bus systems are PCI, EISA, MicroChannel
1197 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1198 newer boards don't support it. If you have ISA, say Y, otherwise N.
1199
065909b9 1200# Select ISA DMA controller support
1da177e4
LT
1201config ISA_DMA
1202 bool
065909b9 1203 select ISA_DMA_API
1da177e4 1204
065909b9 1205# Select ISA DMA interface
5cae841b
AV
1206config ISA_DMA_API
1207 bool
5cae841b 1208
1da177e4 1209config PCI
0b05da72 1210 bool "PCI support" if MIGHT_HAVE_PCI
1da177e4
LT
1211 help
1212 Find out whether you have a PCI motherboard. PCI is the name of a
1213 bus system, i.e. the way the CPU talks to the other stuff inside
1214 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1215 VESA. If you have PCI, say Y, otherwise N.
1216
52882173
AV
1217config PCI_DOMAINS
1218 bool
1219 depends on PCI
1220
b080ac8a
MRJ
1221config PCI_NANOENGINE
1222 bool "BSE nanoEngine PCI support"
1223 depends on SA1100_NANOENGINE
1224 help
1225 Enable PCI on the BSE nanoEngine board.
1226
36e23590
MW
1227config PCI_SYSCALL
1228 def_bool PCI
1229
1da177e4
LT
1230# Select the host bridge type
1231config PCI_HOST_VIA82C505
1232 bool
1233 depends on PCI && ARCH_SHARK
1234 default y
1235
a0113a99
MR
1236config PCI_HOST_ITE8152
1237 bool
1238 depends on PCI && MACH_ARMCORE
1239 default y
1240 select DMABOUNCE
1241
1da177e4
LT
1242source "drivers/pci/Kconfig"
1243
1244source "drivers/pcmcia/Kconfig"
1245
1246endmenu
1247
1248menu "Kernel Features"
1249
0567a0c0
KH
1250source "kernel/time/Kconfig"
1251
1da177e4
LT
1252config SMP
1253 bool "Symmetric Multi-Processing (EXPERIMENTAL)"
971acb9b 1254 depends on EXPERIMENTAL
bc28248e 1255 depends on GENERIC_CLOCKEVENTS
971acb9b 1256 depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
89c3dedf
DW
1257 MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
1258 ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
e9d728f5 1259 ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE
f6dd9fa5 1260 select USE_GENERIC_SMP_HELPERS
89c3dedf 1261 select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
1da177e4
LT
1262 help
1263 This enables support for systems with more than one CPU. If you have
1264 a system with only one CPU, like most personal computers, say N. If
1265 you have a system with more than one CPU, say Y.
1266
1267 If you say N here, the kernel will run on single and multiprocessor
1268 machines, but will use only one CPU of a multiprocessor machine. If
1269 you say Y here, the kernel will run on many, but not all, single
1270 processor machines. On a single processor machine, the kernel will
1271 run faster if you say N here.
1272
03502faa 1273 See also <file:Documentation/i386/IO-APIC.txt>,
1da177e4 1274 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
50a23e6e 1275 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
1da177e4
LT
1276
1277 If you don't know what to do here, say N.
1278
f00ec48f
RK
1279config SMP_ON_UP
1280 bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
1281 depends on EXPERIMENTAL
4d2692a7 1282 depends on SMP && !XIP_KERNEL
f00ec48f
RK
1283 default y
1284 help
1285 SMP kernels contain instructions which fail on non-SMP processors.
1286 Enabling this option allows the kernel to modify itself to make
1287 these instructions safe. Disabling it allows about 1K of space
1288 savings.
1289
1290 If you don't know what to do here, say Y.
1291
a8cbcd92
RK
1292config HAVE_ARM_SCU
1293 bool
1294 depends on SMP
1295 help
1296 This option enables support for the ARM system coherency unit
1297
f32f4ce2
RK
1298config HAVE_ARM_TWD
1299 bool
1300 depends on SMP
15095bb0 1301 select TICK_ONESHOT
f32f4ce2
RK
1302 help
1303 This options enables support for the ARM timer and watchdog unit
1304
8d5796d2
LB
1305choice
1306 prompt "Memory split"
1307 default VMSPLIT_3G
1308 help
1309 Select the desired split between kernel and user memory.
1310
1311 If you are not absolutely sure what you are doing, leave this
1312 option alone!
1313
1314 config VMSPLIT_3G
1315 bool "3G/1G user/kernel split"
1316 config VMSPLIT_2G
1317 bool "2G/2G user/kernel split"
1318 config VMSPLIT_1G
1319 bool "1G/3G user/kernel split"
1320endchoice
1321
1322config PAGE_OFFSET
1323 hex
1324 default 0x40000000 if VMSPLIT_1G
1325 default 0x80000000 if VMSPLIT_2G
1326 default 0xC0000000
1327
1da177e4
LT
1328config NR_CPUS
1329 int "Maximum number of CPUs (2-32)"
1330 range 2 32
1331 depends on SMP
1332 default "4"
1333
a054a811
RK
1334config HOTPLUG_CPU
1335 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
1336 depends on SMP && HOTPLUG && EXPERIMENTAL
176bfc44 1337 depends on !ARCH_MSM
a054a811
RK
1338 help
1339 Say Y here to experiment with turning CPUs off and on. CPUs
1340 can be controlled through /sys/devices/system/cpu.
1341
37ee16ae
RK
1342config LOCAL_TIMERS
1343 bool "Use local timer interrupts"
971acb9b 1344 depends on SMP
37ee16ae 1345 default y
89c3dedf 1346 select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
37ee16ae
RK
1347 help
1348 Enable support for local timers on SMP platforms, rather then the
1349 legacy IPI broadcast method. Local timers allows the system
1350 accounting to be spread across the timer interval, preventing a
1351 "thundering herd" at every timer tick.
1352
d45a398f 1353source kernel/Kconfig.preempt
1da177e4 1354
f8065813
RK
1355config HZ
1356 int
49b7a491 1357 default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
2192482e 1358 ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
bfe65704 1359 default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
5248c657 1360 default AT91_TIMER_HZ if ARCH_AT91
5da3e714 1361 default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
f8065813
RK
1362 default 100
1363
16c79651 1364config THUMB2_KERNEL
4a50bfe3 1365 bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
6e6fc998 1366 depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL
16c79651
CM
1367 select AEABI
1368 select ARM_ASM_UNIFIED
1369 help
1370 By enabling this option, the kernel will be compiled in
1371 Thumb-2 mode. A compiler/assembler that understand the unified
1372 ARM-Thumb syntax is needed.
1373
1374 If unsure, say N.
1375
0becb088
CM
1376config ARM_ASM_UNIFIED
1377 bool
1378
704bdda0
NP
1379config AEABI
1380 bool "Use the ARM EABI to compile the kernel"
1381 help
1382 This option allows for the kernel to be compiled using the latest
1383 ARM ABI (aka EABI). This is only useful if you are using a user
1384 space environment that is also compiled with EABI.
1385
1386 Since there are major incompatibilities between the legacy ABI and
1387 EABI, especially with regard to structure member alignment, this
1388 option also changes the kernel syscall calling convention to
1389 disambiguate both ABIs and allow for backward compatibility support
1390 (selected with CONFIG_OABI_COMPAT).
1391
1392 To use this you need GCC version 4.0.0 or later.
1393
6c90c872 1394config OABI_COMPAT
a73a3ff1 1395 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
61c484d4 1396 depends on AEABI && EXPERIMENTAL
6c90c872
NP
1397 default y
1398 help
1399 This option preserves the old syscall interface along with the
1400 new (ARM EABI) one. It also provides a compatibility layer to
1401 intercept syscalls that have structure arguments which layout
1402 in memory differs between the legacy ABI and the new ARM EABI
1403 (only for non "thumb" binaries). This option adds a tiny
1404 overhead to all syscalls and produces a slightly larger kernel.
1405 If you know you'll be using only pure EABI user space then you
1406 can say N here. If this option is not selected and you attempt
1407 to execute a legacy ABI binary then the result will be
1408 UNPREDICTABLE (in fact it can be predicted that it won't work
1409 at all). If in doubt say Y.
1410
eb33575c 1411config ARCH_HAS_HOLES_MEMORYMODEL
e80d6a24 1412 bool
e80d6a24 1413
05944d74
RK
1414config ARCH_SPARSEMEM_ENABLE
1415 bool
1416
07a2f737
RK
1417config ARCH_SPARSEMEM_DEFAULT
1418 def_bool ARCH_SPARSEMEM_ENABLE
1419
05944d74 1420config ARCH_SELECT_MEMORY_MODEL
be370302 1421 def_bool ARCH_SPARSEMEM_ENABLE
c80d79d7 1422
053a96ca
NP
1423config HIGHMEM
1424 bool "High Memory Support (EXPERIMENTAL)"
1425 depends on MMU && EXPERIMENTAL
1426 help
1427 The address space of ARM processors is only 4 Gigabytes large
1428 and it has to accommodate user address space, kernel address
1429 space as well as some memory mapped IO. That means that, if you
1430 have a large amount of physical memory and/or IO, not all of the
1431 memory can be "permanently mapped" by the kernel. The physical
1432 memory that is not permanently mapped is called "high memory".
1433
1434 Depending on the selected kernel/user memory split, minimum
1435 vmalloc space and actual amount of RAM, you may not need this
1436 option which should result in a slightly faster kernel.
1437
1438 If unsure, say n.
1439
65cec8e3
RK
1440config HIGHPTE
1441 bool "Allocate 2nd-level pagetables from highmem"
1442 depends on HIGHMEM
1443 depends on !OUTER_CACHE
1444
1b8873a0
JI
1445config HW_PERF_EVENTS
1446 bool "Enable hardware performance counter support for perf events"
fe166148 1447 depends on PERF_EVENTS && CPU_HAS_PMU
1b8873a0
JI
1448 default y
1449 help
1450 Enable hardware performance counter support for perf events. If
1451 disabled, perf events will use software events only.
1452
3f22ab27
DH
1453source "mm/Kconfig"
1454
c1b2d970
MD
1455config FORCE_MAX_ZONEORDER
1456 int "Maximum zone order" if ARCH_SHMOBILE
1457 range 11 64 if ARCH_SHMOBILE
1458 default "9" if SA1111
1459 default "11"
1460 help
1461 The kernel memory allocator divides physically contiguous memory
1462 blocks into "zones", where each zone is a power of two number of
1463 pages. This option selects the largest power of two that the kernel
1464 keeps in the memory allocator. If you need to allocate very large
1465 blocks of physically contiguous memory, then you may need to
1466 increase this value.
1467
1468 This config option is actually maximum order plus one. For example,
1469 a value of 11 means that the largest free memory block is 2^10 pages.
1470
1da177e4
LT
1471config LEDS
1472 bool "Timer and CPU usage LEDs"
e055d5bf 1473 depends on ARCH_CDB89712 || ARCH_EBSA110 || \
8c8fdbc9 1474 ARCH_EBSA285 || ARCH_INTEGRATOR || \
1da177e4
LT
1475 ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
1476 ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
73a59c1c 1477 ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
25329671 1478 ARCH_AT91 || ARCH_DAVINCI || \
ff3042fb 1479 ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
1da177e4
LT
1480 help
1481 If you say Y here, the LEDs on your machine will be used
1482 to provide useful information about your current system status.
1483
1484 If you are compiling a kernel for a NetWinder or EBSA-285, you will
1485 be able to select which LEDs are active using the options below. If
1486 you are compiling a kernel for the EBSA-110 or the LART however, the
1487 red LED will simply flash regularly to indicate that the system is
1488 still functional. It is safe to say Y here if you have a CATS
1489 system, but the driver will do nothing.
1490
1491config LEDS_TIMER
1492 bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
eebdf7d7
DB
1493 OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1494 || MACH_OMAP_PERSEUS2
1da177e4 1495 depends on LEDS
0567a0c0 1496 depends on !GENERIC_CLOCKEVENTS
1da177e4
LT
1497 default y if ARCH_EBSA110
1498 help
1499 If you say Y here, one of the system LEDs (the green one on the
1500 NetWinder, the amber one on the EBSA285, or the red one on the LART)
1501 will flash regularly to indicate that the system is still
1502 operational. This is mainly useful to kernel hackers who are
1503 debugging unstable kernels.
1504
1505 The LART uses the same LED for both Timer LED and CPU usage LED
1506 functions. You may choose to use both, but the Timer LED function
1507 will overrule the CPU usage LED.
1508
1509config LEDS_CPU
1510 bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
eebdf7d7
DB
1511 !ARCH_OMAP) \
1512 || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
1513 || MACH_OMAP_PERSEUS2
1da177e4
LT
1514 depends on LEDS
1515 help
1516 If you say Y here, the red LED will be used to give a good real
1517 time indication of CPU usage, by lighting whenever the idle task
1518 is not currently executing.
1519
1520 The LART uses the same LED for both Timer LED and CPU usage LED
1521 functions. You may choose to use both, but the Timer LED function
1522 will overrule the CPU usage LED.
1523
1524config ALIGNMENT_TRAP
1525 bool
f12d0d7c 1526 depends on CPU_CP15_MMU
1da177e4 1527 default y if !ARCH_EBSA110
e119bfff 1528 select HAVE_PROC_CPU if PROC_FS
1da177e4 1529 help
84eb8d06 1530 ARM processors cannot fetch/store information which is not
1da177e4
LT
1531 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1532 address divisible by 4. On 32-bit ARM processors, these non-aligned
1533 fetch/store instructions will be emulated in software if you say
1534 here, which has a severe performance impact. This is necessary for
1535 correct operation of some network protocols. With an IP-only
1536 configuration it is safe to say N, otherwise say Y.
1537
39ec58f3
LB
1538config UACCESS_WITH_MEMCPY
1539 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
1540 depends on MMU && EXPERIMENTAL
1541 default y if CPU_FEROCEON
1542 help
1543 Implement faster copy_to_user and clear_user methods for CPU
1544 cores where a 8-word STM instruction give significantly higher
1545 memory write throughput than a sequence of individual 32bit stores.
1546
1547 A possible side effect is a slight increase in scheduling latency
1548 between threads sharing the same address space if they invoke
1549 such copy operations with large buffers.
1550
1551 However, if the CPU data cache is using a write-allocate mode,
1552 this option is unlikely to provide any performance gain.
1553
70c70d97
NP
1554config SECCOMP
1555 bool
1556 prompt "Enable seccomp to safely compute untrusted bytecode"
1557 ---help---
1558 This kernel feature is useful for number crunching applications
1559 that may need to compute untrusted bytecode during their
1560 execution. By using pipes or other transports made available to
1561 the process as file descriptors supporting the read/write
1562 syscalls, it's possible to isolate those applications in
1563 their own address space using seccomp. Once seccomp is
1564 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1565 and the task is only allowed to execute a few safe syscalls
1566 defined by each seccomp mode.
1567
c743f380
NP
1568config CC_STACKPROTECTOR
1569 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
4a50bfe3 1570 depends on EXPERIMENTAL
c743f380
NP
1571 help
1572 This option turns on the -fstack-protector GCC feature. This
1573 feature puts, at the beginning of functions, a canary value on
1574 the stack just before the return address, and validates
1575 the value just before actually returning. Stack based buffer
1576 overflows (that need to overwrite this return address) now also
1577 overwrite the canary, which gets detected and the attack is then
1578 neutralized via a kernel panic.
1579 This feature requires gcc version 4.2 or above.
1580
73a65b3f
UKK
1581config DEPRECATED_PARAM_STRUCT
1582 bool "Provide old way to pass kernel parameters"
1583 help
1584 This was deprecated in 2001 and announced to live on for 5 years.
1585 Some old boot loaders still use this way.
1586
1da177e4
LT
1587endmenu
1588
1589menu "Boot options"
1590
1591# Compressed boot loader in ROM. Yes, we really want to ask about
1592# TEXT and BSS so we preserve their values in the config files.
1593config ZBOOT_ROM_TEXT
1594 hex "Compressed ROM boot loader base address"
1595 default "0"
1596 help
1597 The physical address at which the ROM-able zImage is to be
1598 placed in the target. Platforms which normally make use of
1599 ROM-able zImage formats normally set this to a suitable
1600 value in their defconfig file.
1601
1602 If ZBOOT_ROM is not enabled, this has no effect.
1603
1604config ZBOOT_ROM_BSS
1605 hex "Compressed ROM boot loader BSS address"
1606 default "0"
1607 help
f8c440b2
DF
1608 The base address of an area of read/write memory in the target
1609 for the ROM-able zImage which must be available while the
1610 decompressor is running. It must be large enough to hold the
1611 entire decompressed kernel plus an additional 128 KiB.
1612 Platforms which normally make use of ROM-able zImage formats
1613 normally set this to a suitable value in their defconfig file.
1da177e4
LT
1614
1615 If ZBOOT_ROM is not enabled, this has no effect.
1616
1617config ZBOOT_ROM
1618 bool "Compressed boot loader in ROM/flash"
1619 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
1620 help
1621 Say Y here if you intend to execute your compressed kernel image
1622 (zImage) directly from ROM or flash. If unsure, say N.
1623
1624config CMDLINE
1625 string "Default kernel command string"
1626 default ""
1627 help
1628 On some architectures (EBSA110 and CATS), there is currently no way
1629 for the boot loader to pass arguments to the kernel. For these
1630 architectures, you should supply some command-line options at build
1631 time by entering them here. As a minimum, you should specify the
1632 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1633
92d2040d
AH
1634config CMDLINE_FORCE
1635 bool "Always use the default kernel command string"
1636 depends on CMDLINE != ""
1637 help
1638 Always use the default kernel command string, even if the boot
1639 loader passes other arguments to the kernel.
1640 This is useful if you cannot or don't want to change the
1641 command-line options your boot loader passes to the kernel.
1642
1643 If unsure, say N.
1644
1da177e4
LT
1645config XIP_KERNEL
1646 bool "Kernel Execute-In-Place from ROM"
1647 depends on !ZBOOT_ROM
1648 help
1649 Execute-In-Place allows the kernel to run from non-volatile storage
1650 directly addressable by the CPU, such as NOR flash. This saves RAM
1651 space since the text section of the kernel is not loaded from flash
1652 to RAM. Read-write sections, such as the data section and stack,
1653 are still copied to RAM. The XIP kernel is not compressed since
1654 it has to run directly from flash, so it will take more space to
1655 store it. The flash address used to link the kernel object files,
1656 and for storing it, is configuration dependent. Therefore, if you
1657 say Y here, you must know the proper physical address where to
1658 store the kernel image depending on your own flash memory usage.
1659
1660 Also note that the make target becomes "make xipImage" rather than
1661 "make zImage" or "make Image". The final kernel binary to put in
1662 ROM memory will be arch/arm/boot/xipImage.
1663
1664 If unsure, say N.
1665
1666config XIP_PHYS_ADDR
1667 hex "XIP Kernel Physical Location"
1668 depends on XIP_KERNEL
1669 default "0x00080000"
1670 help
1671 This is the physical address in your flash memory the kernel will
1672 be linked for and stored to. This address is dependent on your
1673 own flash usage.
1674
c587e4a6
RP
1675config KEXEC
1676 bool "Kexec system call (EXPERIMENTAL)"
1677 depends on EXPERIMENTAL
1678 help
1679 kexec is a system call that implements the ability to shutdown your
1680 current kernel, and to start another kernel. It is like a reboot
01dd2fbf 1681 but it is independent of the system firmware. And like a reboot
c587e4a6
RP
1682 you can start any kernel with it, not just Linux.
1683
1684 It is an ongoing process to be certain the hardware in a machine
1685 is properly shutdown, so do not be surprised if this code does not
1686 initially work for you. It may help to enable device hotplugging
1687 support.
1688
4cd9d6f7
RP
1689config ATAGS_PROC
1690 bool "Export atags in procfs"
b98d7291
UL
1691 depends on KEXEC
1692 default y
4cd9d6f7
RP
1693 help
1694 Should the atags used to boot the kernel be exported in an "atags"
1695 file in procfs. Useful with kexec.
1696
cb5d39b3
MW
1697config CRASH_DUMP
1698 bool "Build kdump crash kernel (EXPERIMENTAL)"
1699 depends on EXPERIMENTAL
1700 help
1701 Generate crash dump after being started by kexec. This should
1702 be normally only set in special crash dump kernels which are
1703 loaded in the main kernel with kexec-tools into a specially
1704 reserved region and then later executed after a crash by
1705 kdump/kexec. The crash dump kernel must be compiled to a
1706 memory address not used by the main kernel
1707
1708 For more details see Documentation/kdump/kdump.txt
1709
e69edc79
EM
1710config AUTO_ZRELADDR
1711 bool "Auto calculation of the decompressed kernel image address"
1712 depends on !ZBOOT_ROM && !ARCH_U300
1713 help
1714 ZRELADDR is the physical address where the decompressed kernel
1715 image will be placed. If AUTO_ZRELADDR is selected, the address
1716 will be determined at run-time by masking the current IP with
1717 0xf8000000. This assumes the zImage being placed in the first 128MB
1718 from start of memory.
1719
1da177e4
LT
1720endmenu
1721
ac9d7efc 1722menu "CPU Power Management"
1da177e4 1723
89c52ed4 1724if ARCH_HAS_CPUFREQ
1da177e4
LT
1725
1726source "drivers/cpufreq/Kconfig"
1727
64f102b6
YS
1728config CPU_FREQ_IMX
1729 tristate "CPUfreq driver for i.MX CPUs"
1730 depends on ARCH_MXC && CPU_FREQ
1731 help
1732 This enables the CPUfreq driver for i.MX CPUs.
1733
1da177e4
LT
1734config CPU_FREQ_SA1100
1735 bool
1da177e4
LT
1736
1737config CPU_FREQ_SA1110
1738 bool
1da177e4
LT
1739
1740config CPU_FREQ_INTEGRATOR
1741 tristate "CPUfreq driver for ARM Integrator CPUs"
1742 depends on ARCH_INTEGRATOR && CPU_FREQ
1743 default y
1744 help
1745 This enables the CPUfreq driver for ARM Integrator CPUs.
1746
1747 For details, take a look at <file:Documentation/cpu-freq>.
1748
1749 If in doubt, say Y.
1750
9e2697ff
RK
1751config CPU_FREQ_PXA
1752 bool
1753 depends on CPU_FREQ && ARCH_PXA && PXA25x
1754 default y
1755 select CPU_FREQ_DEFAULT_GOV_USERSPACE
1756
b3748ddd
MB
1757config CPU_FREQ_S3C64XX
1758 bool "CPUfreq support for Samsung S3C64XX CPUs"
1759 depends on CPU_FREQ && CPU_S3C6410
1760
9d56c02a
BD
1761config CPU_FREQ_S3C
1762 bool
1763 help
1764 Internal configuration node for common cpufreq on Samsung SoC
1765
1766config CPU_FREQ_S3C24XX
4a50bfe3 1767 bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
9d56c02a
BD
1768 depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
1769 select CPU_FREQ_S3C
1770 help
1771 This enables the CPUfreq driver for the Samsung S3C24XX family
1772 of CPUs.
1773
1774 For details, take a look at <file:Documentation/cpu-freq>.
1775
1776 If in doubt, say N.
1777
1778config CPU_FREQ_S3C24XX_PLL
4a50bfe3 1779 bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
9d56c02a
BD
1780 depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
1781 help
1782 Compile in support for changing the PLL frequency from the
1783 S3C24XX series CPUfreq driver. The PLL takes time to settle
1784 after a frequency change, so by default it is not enabled.
1785
1786 This also means that the PLL tables for the selected CPU(s) will
1787 be built which may increase the size of the kernel image.
1788
1789config CPU_FREQ_S3C24XX_DEBUG
1790 bool "Debug CPUfreq Samsung driver core"
1791 depends on CPU_FREQ_S3C24XX
1792 help
1793 Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
1794
1795config CPU_FREQ_S3C24XX_IODEBUG
1796 bool "Debug CPUfreq Samsung driver IO timing"
1797 depends on CPU_FREQ_S3C24XX
1798 help
1799 Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
1800
e6d197a6
BD
1801config CPU_FREQ_S3C24XX_DEBUGFS
1802 bool "Export debugfs for CPUFreq"
1803 depends on CPU_FREQ_S3C24XX && DEBUG_FS
1804 help
1805 Export status information via debugfs.
1806
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LT
1807endif
1808
ac9d7efc
RK
1809source "drivers/cpuidle/Kconfig"
1810
1811endmenu
1812
1da177e4
LT
1813menu "Floating point emulation"
1814
1815comment "At least one emulation must be selected"
1816
1817config FPE_NWFPE
1818 bool "NWFPE math emulation"
593c252a 1819 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
1da177e4
LT
1820 ---help---
1821 Say Y to include the NWFPE floating point emulator in the kernel.
1822 This is necessary to run most binaries. Linux does not currently
1823 support floating point hardware so you need to say Y here even if
1824 your machine has an FPA or floating point co-processor podule.
1825
1826 You may say N here if you are going to load the Acorn FPEmulator
1827 early in the bootup.
1828
1829config FPE_NWFPE_XP
1830 bool "Support extended precision"
bedf142b 1831 depends on FPE_NWFPE
1da177e4
LT
1832 help
1833 Say Y to include 80-bit support in the kernel floating-point
1834 emulator. Otherwise, only 32 and 64-bit support is compiled in.
1835 Note that gcc does not generate 80-bit operations by default,
1836 so in most cases this option only enlarges the size of the
1837 floating point emulator without any good reason.
1838
1839 You almost surely want to say N here.
1840
1841config FPE_FASTFPE
1842 bool "FastFPE math emulation (EXPERIMENTAL)"
8993a44c 1843 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
1da177e4
LT
1844 ---help---
1845 Say Y here to include the FAST floating point emulator in the kernel.
1846 This is an experimental much faster emulator which now also has full
1847 precision for the mantissa. It does not support any exceptions.
1848 It is very simple, and approximately 3-6 times faster than NWFPE.
1849
1850 It should be sufficient for most programs. It may be not suitable
1851 for scientific calculations, but you have to check this for yourself.
1852 If you do not feel you need a faster FP emulation you should better
1853 choose NWFPE.
1854
1855config VFP
1856 bool "VFP-format floating point maths"
c00d4ffd 1857 depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
1da177e4
LT
1858 help
1859 Say Y to include VFP support code in the kernel. This is needed
1860 if your hardware includes a VFP unit.
1861
1862 Please see <file:Documentation/arm/VFP/release-notes.txt> for
1863 release notes and additional status information.
1864
1865 Say N if your target does not have VFP hardware.
1866
25ebee02
CM
1867config VFPv3
1868 bool
1869 depends on VFP
1870 default y if CPU_V7
1871
b5872db4
CM
1872config NEON
1873 bool "Advanced SIMD (NEON) Extension support"
1874 depends on VFPv3 && CPU_V7
1875 help
1876 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
1877 Extension.
1878
1da177e4
LT
1879endmenu
1880
1881menu "Userspace binary formats"
1882
1883source "fs/Kconfig.binfmt"
1884
1885config ARTHUR
1886 tristate "RISC OS personality"
704bdda0 1887 depends on !AEABI
1da177e4
LT
1888 help
1889 Say Y here to include the kernel code necessary if you want to run
1890 Acorn RISC OS/Arthur binaries under Linux. This code is still very
1891 experimental; if this sounds frightening, say N and sleep in peace.
1892 You can also say M here to compile this support as a module (which
1893 will be called arthur).
1894
1895endmenu
1896
1897menu "Power management options"
1898
eceab4ac 1899source "kernel/power/Kconfig"
1da177e4 1900
f4cb5700
JB
1901config ARCH_SUSPEND_POSSIBLE
1902 def_bool y
1903
1da177e4
LT
1904endmenu
1905
d5950b43
SR
1906source "net/Kconfig"
1907
ac25150f 1908source "drivers/Kconfig"
1da177e4
LT
1909
1910source "fs/Kconfig"
1911
1da177e4
LT
1912source "arch/arm/Kconfig.debug"
1913
1914source "security/Kconfig"
1915
1916source "crypto/Kconfig"
1917
1918source "lib/Kconfig"
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