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Merge tag 'at91-ab-4.8-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni...
[deliverable/linux.git] / arch / arm / boot / dts / am335x-bone-common.dtsi
CommitLineData
2ba35493
KK		 1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/ {
2ba35493
KK		 10 cpus {
11 cpu@0 {
12 cpu0-supply = <&dcdc2_reg>;
13 };
14 };
15
16 memory {
17 device_type = "memory";
18 reg = <0x80000000 0x10000000>; /* 256 MB */
19 };
20
2ba35493
KK		 21 leds {
22 pinctrl-names = "default";
23 pinctrl-0 = <&user_leds_s0>;
24
25 compatible = "gpio-leds";
26
27 led@2 {
28 label = "beaglebone:green:heartbeat";
29 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
30 linux,default-trigger = "heartbeat";
31 default-state = "off";
32 };
33
34 led@3 {
35 label = "beaglebone:green:mmc0";
36 gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
37 linux,default-trigger = "mmc0";
38 default-state = "off";
39 };
40
41 led@4 {
42 label = "beaglebone:green:usr2";
43 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
ec8a7597 44 linux,default-trigger = "cpu0";
2ba35493
KK		 45 default-state = "off";
46 };
47
48 led@5 {
49 label = "beaglebone:green:usr3";
50 gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
ec8a7597 51 linux,default-trigger = "mmc1";
2ba35493
KK		 52 default-state = "off";
53 };
54 };
ea5b7c10
NM		 55
56 vmmcsd_fixed: fixedregulator@0 {
57 compatible = "regulator-fixed";
58 regulator-name = "vmmcsd_fixed";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
61 };
2ba35493
KK		 62};
63
82d75afc
JMC		 64&am33xx_pinmux {
65 pinctrl-names = "default";
66 pinctrl-0 = <&clkout2_pin>;
67
68 user_leds_s0: user_leds_s0 {
69 pinctrl-single,pins = <
e03b2a26
JMC		 70 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
71 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
72 AM33XX_IOPAD(0x85c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
73 AM33XX_IOPAD(0x860, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */
82d75afc
JMC		 74 >;
75 };
76
77 i2c0_pins: pinmux_i2c0_pins {
78 pinctrl-single,pins = <
e03b2a26
JMC		 79 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
80 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
82d75afc
JMC		 81 >;
82 };
83
5d1a2961
PA		 84 i2c2_pins: pinmux_i2c2_pins {
85 pinctrl-single,pins = <
e03b2a26
JMC		 86 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
87 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
5d1a2961
PA		 88 >;
89 };
90
82d75afc
JMC		 91 uart0_pins: pinmux_uart0_pins {
92 pinctrl-single,pins = <
e03b2a26
JMC		 93 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
94 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
82d75afc
JMC		 95 >;
96 };
97
98 clkout2_pin: pinmux_clkout2_pin {
99 pinctrl-single,pins = <
e03b2a26 100 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
82d75afc
JMC		 101 >;
102 };
103
104 cpsw_default: cpsw_default {
105 pinctrl-single,pins = <
106 /* Slave 1 */
e03b2a26
JMC		 107 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
108 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
109 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
110 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
111 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
112 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
113 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
114 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
115 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
116 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
117 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
118 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
119 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
82d75afc
JMC		 120 >;
121 };
122
123 cpsw_sleep: cpsw_sleep {
124 pinctrl-single,pins = <
125 /* Slave 1 reset value */
e03b2a26
JMC		 126 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
127 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
128 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
129 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
130 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
131 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
132 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
133 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
134 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
135 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
136 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
137 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
138 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
82d75afc
JMC		 139 >;
140 };
141
142 davinci_mdio_default: davinci_mdio_default {
143 pinctrl-single,pins = <
144 /* MDIO */
e03b2a26
JMC		 145 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
146 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
82d75afc
JMC		 147 >;
148 };
149
150 davinci_mdio_sleep: davinci_mdio_sleep {
151 pinctrl-single,pins = <
152 /* MDIO reset value */
e03b2a26
JMC		 153 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
154 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
82d75afc
JMC		 155 >;
156 };
157
158 mmc1_pins: pinmux_mmc1_pins {
159 pinctrl-single,pins = <
e03b2a26 160 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
82d75afc
JMC		 161 >;
162 };
163
164 emmc_pins: pinmux_emmc_pins {
165 pinctrl-single,pins = <
e03b2a26
JMC		 166 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
167 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
168 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
169 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
170 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
171 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
172 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
173 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
174 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
175 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
82d75afc
JMC		 176 >;
177 };
178};
179
e0efaafb
JMC		 180&uart0 {
181 pinctrl-names = "default";
182 pinctrl-0 = <&uart0_pins>;
183
184 status = "okay";
185};
186
187&usb {
188 status = "okay";
081df89d 189};
e0efaafb 190
081df89d
GM		 191&usb_ctrl_mod {
192 status = "okay";
193};
e0efaafb 194
081df89d
GM		 195&usb0_phy {
196 status = "okay";
197};
e0efaafb 198
081df89d
GM		 199&usb1_phy {
200 status = "okay";
201};
e0efaafb 202
081df89d
GM		 203&usb0 {
204 status = "okay";
67fd14b3 205 dr_mode = "peripheral";
081df89d 206};
e0efaafb 207
081df89d
GM		 208&usb1 {
209 status = "okay";
210 dr_mode = "host";
211};
e0efaafb 212
081df89d
GM		 213&cppi41dma {
214 status = "okay";
e0efaafb
JMC		 215};
216
217&i2c0 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&i2c0_pins>;
220
221 status = "okay";
222 clock-frequency = <400000>;
223
224 tps: tps@24 {
225 reg = <0x24>;
226 };
227
5d1a2961
PA		 228 baseboard_eeprom: baseboard_eeprom@50 {
229 compatible = "at,24c256";
230 reg = <0x50>;
231
232 #address-cells = <1>;
233 #size-cells = <1>;
234 baseboard_data: baseboard_data@0 {
235 reg = <0 0x100>;
236 };
237 };
238};
239
240&i2c2 {
241 pinctrl-names = "default";
242 pinctrl-0 = <&i2c2_pins>;
243
244 status = "okay";
245 clock-frequency = <100000>;
246
247 cape_eeprom0: cape_eeprom0@54 {
248 compatible = "at,24c256";
249 reg = <0x54>;
250 #address-cells = <1>;
251 #size-cells = <1>;
252 cape0_data: cape_data@0 {
253 reg = <0 0x100>;
254 };
255 };
256
257 cape_eeprom1: cape_eeprom1@55 {
258 compatible = "at,24c256";
259 reg = <0x55>;
260 #address-cells = <1>;
261 #size-cells = <1>;
262 cape1_data: cape_data@0 {
263 reg = <0 0x100>;
264 };
265 };
266
267 cape_eeprom2: cape_eeprom2@56 {
268 compatible = "at,24c256";
269 reg = <0x56>;
270 #address-cells = <1>;
271 #size-cells = <1>;
272 cape2_data: cape_data@0 {
273 reg = <0 0x100>;
274 };
275 };
276
277 cape_eeprom3: cape_eeprom3@57 {
278 compatible = "at,24c256";
279 reg = <0x57>;
280 #address-cells = <1>;
281 #size-cells = <1>;
282 cape3_data: cape_data@0 {
283 reg = <0 0x100>;
284 };
285 };
e0efaafb
JMC		 286};
287
e327b3f5
PU		 288
289/include/ "tps65217.dtsi"
290
2ba35493 291&tps {
7a6cb0ab
MD		 292 /*
293 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
294 * mode") at poweroff. Most BeagleBone versions do not support RTC-only
295 * mode and risk hardware damage if this mode is entered.
296 *
297 * For details, see linux-omap mailing list May 2015 thread
298 * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
299 * In particular, messages:
300 * http://www.spinics.net/lists/linux-omap/msg118585.html
301 * http://www.spinics.net/lists/linux-omap/msg118615.html
302 *
303 * You can override this later with
304 * &tps { /delete-property/ ti,pmic-shutdown-controller; }
305 * if you want to use RTC-only mode and made sure you are not affected
306 * by the hardware problems. (Tip: double-check by performing a current
307 * measurement after shutdown: it should be less than 1 mA.)
308 */
309 ti,pmic-shutdown-controller;
310
2ba35493
KK		 311 regulators {
312 dcdc1_reg: regulator@0 {
83c9b2af 313 regulator-name = "vdds_dpr";
2ba35493
KK		 314 regulator-always-on;
315 };
316
317 dcdc2_reg: regulator@1 {
318 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
319 regulator-name = "vdd_mpu";
320 regulator-min-microvolt = <925000>;
321 regulator-max-microvolt = <1325000>;
322 regulator-boot-on;
323 regulator-always-on;
324 };
325
326 dcdc3_reg: regulator@2 {
327 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
328 regulator-name = "vdd_core";
329 regulator-min-microvolt = <925000>;
330 regulator-max-microvolt = <1150000>;
331 regulator-boot-on;
332 regulator-always-on;
333 };
334
335 ldo1_reg: regulator@3 {
83c9b2af 336 regulator-name = "vio,vrtc,vdds";
2ba35493
KK		 337 regulator-always-on;
338 };
339
340 ldo2_reg: regulator@4 {
83c9b2af 341 regulator-name = "vdd_3v3aux";
2ba35493
KK		 342 regulator-always-on;
343 };
344
345 ldo3_reg: regulator@5 {
83c9b2af 346 regulator-name = "vdd_1v8";
2ba35493
KK		 347 regulator-always-on;
348 };
349
350 ldo4_reg: regulator@6 {
83c9b2af 351 regulator-name = "vdd_3v3a";
2ba35493
KK		 352 regulator-always-on;
353 };
354 };
355};
356
357&cpsw_emac0 {
358 phy_id = <&davinci_mdio>, <0>;
359 phy-mode = "mii";
360};
361
362&cpsw_emac1 {
363 phy_id = <&davinci_mdio>, <1>;
364 phy-mode = "mii";
365};
366
367&mac {
368 pinctrl-names = "default", "sleep";
369 pinctrl-0 = <&cpsw_default>;
370 pinctrl-1 = <&cpsw_sleep>;
16c75a13 371 status = "okay";
2ba35493
KK		 372};
373
374&davinci_mdio {
375 pinctrl-names = "default", "sleep";
376 pinctrl-0 = <&davinci_mdio_default>;
377 pinctrl-1 = <&davinci_mdio_sleep>;
16c75a13 378 status = "okay";
2ba35493 379};
3045ffff
AH		 380
381&mmc1 {
382 status = "okay";
757a90e6 383 bus-width = <0x4>;
3045ffff
AH		 384 pinctrl-names = "default";
385 pinctrl-0 = <&mmc1_pins>;
c7ce74bc 386 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
3045ffff 387};
a43b446d
MP		 388
389&aes {
390 status = "okay";
391};
392
393&sham {
394 status = "okay";
395};
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