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6a66a8b2 AC |
1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | /dts-v1/; | |
9 | ||
eb33ef66 | 10 | #include "am33xx.dtsi" |
6a66a8b2 AC |
11 | |
12 | / { | |
13 | model = "TI AM335x BeagleBone"; | |
14 | compatible = "ti,am335x-bone", "ti,am33xx"; | |
15 | ||
efeedcf2 AC |
16 | cpus { |
17 | cpu@0 { | |
18 | cpu0-supply = <&dcdc2_reg>; | |
19 | }; | |
20 | }; | |
21 | ||
6a66a8b2 AC |
22 | memory { |
23 | device_type = "memory"; | |
24 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
25 | }; | |
53d91034 | 26 | |
7e782c41 AC |
27 | am33xx_pinmux: pinmux@44e10800 { |
28 | pinctrl-names = "default"; | |
4d927570 | 29 | pinctrl-0 = <&clkout2_pin>; |
7e782c41 AC |
30 | |
31 | user_leds_s0: user_leds_s0 { | |
32 | pinctrl-single,pins = < | |
6a8a6b65 FV |
33 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ |
34 | 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ | |
35 | 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ | |
36 | 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ | |
7e782c41 AC |
37 | >; |
38 | }; | |
3f866445 VH |
39 | |
40 | i2c0_pins: pinmux_i2c0_pins { | |
41 | pinctrl-single,pins = < | |
6a8a6b65 FV |
42 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
43 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
3f866445 VH |
44 | >; |
45 | }; | |
9f2fbe17 VH |
46 | |
47 | uart0_pins: pinmux_uart0_pins { | |
48 | pinctrl-single,pins = < | |
6a8a6b65 FV |
49 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
50 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
9f2fbe17 VH |
51 | >; |
52 | }; | |
4d927570 VH |
53 | |
54 | clkout2_pin: pinmux_clkout2_pin { | |
55 | pinctrl-single,pins = < | |
6a8a6b65 | 56 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
4d927570 VH |
57 | >; |
58 | }; | |
be814fda M |
59 | |
60 | cpsw_default: cpsw_default { | |
61 | pinctrl-single,pins = < | |
62 | /* Slave 1 */ | |
63 | 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ | |
64 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ | |
65 | 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ | |
66 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ | |
67 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ | |
68 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ | |
69 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ | |
70 | 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ | |
71 | 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ | |
72 | 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ | |
73 | 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ | |
74 | 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ | |
75 | 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ | |
76 | >; | |
77 | }; | |
78 | ||
79 | cpsw_sleep: cpsw_sleep { | |
80 | pinctrl-single,pins = < | |
81 | /* Slave 1 reset value */ | |
82 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
83 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
84 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
85 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
86 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
87 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
88 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
89 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
90 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
91 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
92 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
93 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
94 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
95 | >; | |
96 | }; | |
97 | ||
98 | davinci_mdio_default: davinci_mdio_default { | |
99 | pinctrl-single,pins = < | |
100 | /* MDIO */ | |
101 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
102 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
103 | >; | |
104 | }; | |
105 | ||
106 | davinci_mdio_sleep: davinci_mdio_sleep { | |
107 | pinctrl-single,pins = < | |
108 | /* MDIO reset value */ | |
109 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
110 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
111 | >; | |
112 | }; | |
7e782c41 AC |
113 | }; |
114 | ||
53d91034 | 115 | ocp { |
dde3b0d6 | 116 | uart0: serial@44e09000 { |
9f2fbe17 VH |
117 | pinctrl-names = "default"; |
118 | pinctrl-0 = <&uart0_pins>; | |
119 | ||
53d91034 VH |
120 | status = "okay"; |
121 | }; | |
a06ceff6 | 122 | |
b918e2c0 | 123 | i2c0: i2c@44e0b000 { |
3f866445 VH |
124 | pinctrl-names = "default"; |
125 | pinctrl-0 = <&i2c0_pins>; | |
126 | ||
a06ceff6 AC |
127 | status = "okay"; |
128 | clock-frequency = <400000>; | |
129 | ||
130 | tps: tps@24 { | |
131 | reg = <0x24>; | |
132 | }; | |
133 | ||
134 | }; | |
135 | }; | |
5d4e1706 AC |
136 | |
137 | leds { | |
b8f70c3a VH |
138 | pinctrl-names = "default"; |
139 | pinctrl-0 = <&user_leds_s0>; | |
140 | ||
5d4e1706 AC |
141 | compatible = "gpio-leds"; |
142 | ||
143 | led@2 { | |
144 | label = "beaglebone:green:heartbeat"; | |
e94233c2 | 145 | gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; |
5d4e1706 AC |
146 | linux,default-trigger = "heartbeat"; |
147 | default-state = "off"; | |
148 | }; | |
149 | ||
150 | led@3 { | |
151 | label = "beaglebone:green:mmc0"; | |
e94233c2 | 152 | gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; |
5d4e1706 AC |
153 | linux,default-trigger = "mmc0"; |
154 | default-state = "off"; | |
155 | }; | |
156 | ||
157 | led@4 { | |
158 | label = "beaglebone:green:usr2"; | |
e94233c2 | 159 | gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; |
5d4e1706 AC |
160 | default-state = "off"; |
161 | }; | |
162 | ||
163 | led@5 { | |
164 | label = "beaglebone:green:usr3"; | |
e94233c2 | 165 | gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; |
5d4e1706 AC |
166 | default-state = "off"; |
167 | }; | |
168 | }; | |
a06ceff6 AC |
169 | }; |
170 | ||
171 | /include/ "tps65217.dtsi" | |
172 | ||
173 | &tps { | |
174 | regulators { | |
175 | dcdc1_reg: regulator@0 { | |
176 | regulator-always-on; | |
177 | }; | |
178 | ||
179 | dcdc2_reg: regulator@1 { | |
180 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
181 | regulator-name = "vdd_mpu"; | |
182 | regulator-min-microvolt = <925000>; | |
183 | regulator-max-microvolt = <1325000>; | |
184 | regulator-boot-on; | |
185 | regulator-always-on; | |
186 | }; | |
187 | ||
188 | dcdc3_reg: regulator@2 { | |
189 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
190 | regulator-name = "vdd_core"; | |
191 | regulator-min-microvolt = <925000>; | |
192 | regulator-max-microvolt = <1150000>; | |
193 | regulator-boot-on; | |
194 | regulator-always-on; | |
195 | }; | |
196 | ||
197 | ldo1_reg: regulator@3 { | |
198 | regulator-always-on; | |
199 | }; | |
200 | ||
201 | ldo2_reg: regulator@4 { | |
202 | regulator-always-on; | |
203 | }; | |
204 | ||
205 | ldo3_reg: regulator@5 { | |
206 | regulator-always-on; | |
207 | }; | |
208 | ||
209 | ldo4_reg: regulator@6 { | |
210 | regulator-always-on; | |
211 | }; | |
53d91034 | 212 | }; |
6a66a8b2 | 213 | }; |
1a39a65c M |
214 | |
215 | &cpsw_emac0 { | |
216 | phy_id = <&davinci_mdio>, <0>; | |
6d75afe2 | 217 | phy-mode = "mii"; |
1a39a65c M |
218 | }; |
219 | ||
220 | &cpsw_emac1 { | |
221 | phy_id = <&davinci_mdio>, <1>; | |
6d75afe2 | 222 | phy-mode = "mii"; |
1a39a65c | 223 | }; |
be814fda M |
224 | |
225 | &mac { | |
226 | pinctrl-names = "default", "sleep"; | |
227 | pinctrl-0 = <&cpsw_default>; | |
228 | pinctrl-1 = <&cpsw_sleep>; | |
229 | ||
230 | }; | |
231 | ||
232 | &davinci_mdio { | |
233 | pinctrl-names = "default", "sleep"; | |
234 | pinctrl-0 = <&davinci_mdio_default>; | |
235 | pinctrl-1 = <&davinci_mdio_sleep>; | |
236 | }; |