Commit | Line | Data |
---|---|---|
571ccb28 AC |
1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * AM335x Starter Kit | |
11 | * http://www.ti.com/tool/tmdssk3358 | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
15 | ||
eb33ef66 | 16 | #include "am33xx.dtsi" |
eb9bdef1 | 17 | #include <dt-bindings/pwm/pwm.h> |
571ccb28 AC |
18 | |
19 | / { | |
20 | model = "TI AM335x EVM-SK"; | |
21 | compatible = "ti,am335x-evmsk", "ti,am33xx"; | |
22 | ||
23 | cpus { | |
24 | cpu@0 { | |
25 | cpu0-supply = <&vdd1_reg>; | |
26 | }; | |
27 | }; | |
28 | ||
29 | memory { | |
30 | device_type = "memory"; | |
31 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
32 | }; | |
33 | ||
571ccb28 AC |
34 | vbat: fixedregulator@0 { |
35 | compatible = "regulator-fixed"; | |
36 | regulator-name = "vbat"; | |
37 | regulator-min-microvolt = <5000000>; | |
38 | regulator-max-microvolt = <5000000>; | |
39 | regulator-boot-on; | |
40 | }; | |
41 | ||
42 | lis3_reg: fixedregulator@1 { | |
43 | compatible = "regulator-fixed"; | |
44 | regulator-name = "lis3_reg"; | |
45 | regulator-boot-on; | |
46 | }; | |
29b0b843 | 47 | |
90f4f01b IK |
48 | wl12xx_vmmc: fixedregulator@2 { |
49 | pinctrl-names = "default"; | |
50 | pinctrl-0 = <&wl12xx_gpio>; | |
51 | compatible = "regulator-fixed"; | |
52 | regulator-name = "vwl1271"; | |
53 | regulator-min-microvolt = <1800000>; | |
54 | regulator-max-microvolt = <1800000>; | |
55 | gpio = <&gpio1 29 0>; | |
56 | startup-delay-us = <70000>; | |
57 | enable-active-high; | |
58 | }; | |
59 | ||
12f03236 DG |
60 | vtt_fixed: fixedregulator@3 { |
61 | compatible = "regulator-fixed"; | |
62 | regulator-name = "vtt"; | |
63 | regulator-min-microvolt = <1500000>; | |
64 | regulator-max-microvolt = <1500000>; | |
65 | gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>; | |
66 | regulator-always-on; | |
67 | regulator-boot-on; | |
68 | enable-active-high; | |
69 | }; | |
70 | ||
29b0b843 | 71 | leds { |
b8f70c3a VH |
72 | pinctrl-names = "default"; |
73 | pinctrl-0 = <&user_leds_s0>; | |
74 | ||
29b0b843 AC |
75 | compatible = "gpio-leds"; |
76 | ||
77 | led@1 { | |
78 | label = "evmsk:green:usr0"; | |
e94233c2 | 79 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
80 | default-state = "off"; |
81 | }; | |
82 | ||
83 | led@2 { | |
84 | label = "evmsk:green:usr1"; | |
e94233c2 | 85 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
86 | default-state = "off"; |
87 | }; | |
88 | ||
89 | led@3 { | |
90 | label = "evmsk:green:mmc0"; | |
e94233c2 | 91 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
92 | linux,default-trigger = "mmc0"; |
93 | default-state = "off"; | |
94 | }; | |
95 | ||
96 | led@4 { | |
97 | label = "evmsk:green:heartbeat"; | |
e94233c2 | 98 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
99 | linux,default-trigger = "heartbeat"; |
100 | default-state = "off"; | |
101 | }; | |
102 | }; | |
00834b78 AC |
103 | |
104 | gpio_buttons: gpio_buttons@0 { | |
105 | compatible = "gpio-keys"; | |
106 | #address-cells = <1>; | |
107 | #size-cells = <0>; | |
108 | ||
109 | switch@1 { | |
110 | label = "button0"; | |
111 | linux,code = <0x100>; | |
e94233c2 | 112 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
113 | }; |
114 | ||
115 | switch@2 { | |
116 | label = "button1"; | |
117 | linux,code = <0x101>; | |
e94233c2 | 118 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
119 | }; |
120 | ||
121 | switch@3 { | |
122 | label = "button2"; | |
123 | linux,code = <0x102>; | |
e94233c2 | 124 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
125 | gpio-key,wakeup; |
126 | }; | |
127 | ||
128 | switch@4 { | |
129 | label = "button3"; | |
130 | linux,code = <0x103>; | |
e94233c2 | 131 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
132 | }; |
133 | }; | |
1632fbde PA |
134 | |
135 | backlight { | |
136 | compatible = "pwm-backlight"; | |
eb9bdef1 | 137 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
1632fbde PA |
138 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
139 | default-brightness-level = <8>; | |
140 | }; | |
b452985b PU |
141 | |
142 | sound { | |
143 | compatible = "ti,da830-evm-audio"; | |
144 | ti,model = "AM335x-EVMSK"; | |
145 | ti,audio-codec = <&tlv320aic3106>; | |
146 | ti,mcasp-controller = <&mcasp1>; | |
d2c28923 | 147 | ti,codec-clock-rate = <24000000>; |
b452985b PU |
148 | ti,audio-routing = |
149 | "Headphone Jack", "HPLOUT", | |
150 | "Headphone Jack", "HPROUT"; | |
151 | }; | |
b675d1ec DE |
152 | |
153 | panel { | |
154 | compatible = "ti,tilcdc,panel"; | |
155 | pinctrl-names = "default", "sleep"; | |
156 | pinctrl-0 = <&lcd_pins_default>; | |
157 | pinctrl-1 = <&lcd_pins_sleep>; | |
158 | status = "okay"; | |
159 | panel-info { | |
160 | ac-bias = <255>; | |
161 | ac-bias-intrpt = <0>; | |
162 | dma-burst-sz = <16>; | |
163 | bpp = <32>; | |
164 | fdd = <0x80>; | |
165 | sync-edge = <0>; | |
166 | sync-ctrl = <1>; | |
167 | raster-order = <0>; | |
168 | fifo-th = <0>; | |
169 | }; | |
170 | display-timings { | |
171 | 480x272 { | |
172 | hactive = <480>; | |
173 | vactive = <272>; | |
174 | hback-porch = <43>; | |
175 | hfront-porch = <8>; | |
176 | hsync-len = <4>; | |
177 | vback-porch = <12>; | |
178 | vfront-porch = <4>; | |
179 | vsync-len = <10>; | |
180 | clock-frequency = <9000000>; | |
181 | hsync-active = <0>; | |
182 | vsync-active = <0>; | |
183 | }; | |
184 | }; | |
185 | }; | |
571ccb28 AC |
186 | }; |
187 | ||
82d75afc JMC |
188 | &am33xx_pinmux { |
189 | pinctrl-names = "default"; | |
190 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; | |
191 | ||
b675d1ec DE |
192 | lcd_pins_default: lcd_pins_default { |
193 | pinctrl-single,pins = < | |
194 | 0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ | |
195 | 0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ | |
196 | 0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ | |
197 | 0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ | |
198 | 0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ | |
199 | 0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ | |
200 | 0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ | |
201 | 0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ | |
202 | 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ | |
203 | 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ | |
204 | 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ | |
205 | 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ | |
206 | 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ | |
207 | 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ | |
208 | 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ | |
209 | 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ | |
210 | 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ | |
211 | 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ | |
212 | 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ | |
213 | 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ | |
214 | 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ | |
215 | 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ | |
216 | 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ | |
217 | 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ | |
218 | 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ | |
219 | 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ | |
220 | 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ | |
221 | 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ | |
222 | >; | |
223 | }; | |
224 | ||
225 | lcd_pins_sleep: lcd_pins_sleep { | |
226 | pinctrl-single,pins = < | |
227 | 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */ | |
228 | 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */ | |
229 | 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */ | |
230 | 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */ | |
231 | 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */ | |
232 | 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */ | |
233 | 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */ | |
234 | 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */ | |
235 | 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */ | |
236 | 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */ | |
237 | 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */ | |
238 | 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */ | |
239 | 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */ | |
240 | 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */ | |
241 | 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */ | |
242 | 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */ | |
243 | 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */ | |
244 | 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */ | |
245 | 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */ | |
246 | 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */ | |
247 | 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */ | |
248 | 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */ | |
249 | 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */ | |
250 | 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */ | |
251 | 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */ | |
252 | 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */ | |
253 | 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */ | |
254 | 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */ | |
255 | >; | |
256 | }; | |
257 | ||
258 | ||
82d75afc JMC |
259 | user_leds_s0: user_leds_s0 { |
260 | pinctrl-single,pins = < | |
261 | 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ | |
262 | 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ | |
263 | 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ | |
264 | 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ | |
265 | >; | |
266 | }; | |
267 | ||
268 | gpio_keys_s0: gpio_keys_s0 { | |
269 | pinctrl-single,pins = < | |
270 | 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ | |
271 | 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ | |
272 | 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ | |
273 | 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ | |
274 | >; | |
275 | }; | |
276 | ||
277 | i2c0_pins: pinmux_i2c0_pins { | |
278 | pinctrl-single,pins = < | |
279 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
280 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
281 | >; | |
282 | }; | |
283 | ||
284 | uart0_pins: pinmux_uart0_pins { | |
285 | pinctrl-single,pins = < | |
286 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
287 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
288 | >; | |
289 | }; | |
290 | ||
291 | clkout2_pin: pinmux_clkout2_pin { | |
292 | pinctrl-single,pins = < | |
293 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | |
294 | >; | |
295 | }; | |
296 | ||
297 | ecap2_pins: backlight_pins { | |
298 | pinctrl-single,pins = < | |
299 | 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ | |
300 | >; | |
301 | }; | |
302 | ||
303 | cpsw_default: cpsw_default { | |
304 | pinctrl-single,pins = < | |
305 | /* Slave 1 */ | |
306 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
307 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
308 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ | |
309 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ | |
310 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
311 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
312 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ | |
313 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ | |
314 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ | |
315 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ | |
316 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
317 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
318 | ||
319 | /* Slave 2 */ | |
320 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
321 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ | |
322 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
323 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
324 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
325 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
326 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
327 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
328 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
329 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
330 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
331 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
332 | >; | |
333 | }; | |
334 | ||
335 | cpsw_sleep: cpsw_sleep { | |
336 | pinctrl-single,pins = < | |
337 | /* Slave 1 reset value */ | |
338 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
339 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
340 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
341 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
342 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
343 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
344 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
345 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
346 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
347 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
348 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
349 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
350 | ||
351 | /* Slave 2 reset value*/ | |
352 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
353 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
354 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
355 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
356 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
357 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
358 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
359 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
360 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
361 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
362 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
363 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
364 | >; | |
365 | }; | |
366 | ||
367 | davinci_mdio_default: davinci_mdio_default { | |
368 | pinctrl-single,pins = < | |
369 | /* MDIO */ | |
370 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
371 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
372 | >; | |
373 | }; | |
374 | ||
375 | davinci_mdio_sleep: davinci_mdio_sleep { | |
376 | pinctrl-single,pins = < | |
377 | /* MDIO reset value */ | |
378 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
379 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
380 | >; | |
381 | }; | |
b452985b | 382 | |
29ea5efb PU |
383 | mmc1_pins: pinmux_mmc1_pins { |
384 | pinctrl-single,pins = < | |
385 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
386 | >; | |
387 | }; | |
388 | ||
b452985b PU |
389 | mcasp1_pins: mcasp1_pins { |
390 | pinctrl-single,pins = < | |
391 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ | |
392 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ | |
393 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ | |
394 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ | |
395 | >; | |
396 | }; | |
90f4f01b IK |
397 | |
398 | mmc2_pins: pinmux_mmc2_pins { | |
399 | pinctrl-single,pins = < | |
400 | 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ | |
401 | 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
402 | 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
403 | 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
404 | 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
405 | 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
406 | 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
407 | >; | |
408 | }; | |
409 | ||
410 | wl12xx_gpio: pinmux_wl12xx_gpio { | |
411 | pinctrl-single,pins = < | |
412 | 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ | |
413 | >; | |
414 | }; | |
82d75afc JMC |
415 | }; |
416 | ||
e0efaafb JMC |
417 | &uart0 { |
418 | pinctrl-names = "default"; | |
419 | pinctrl-0 = <&uart0_pins>; | |
420 | ||
421 | status = "okay"; | |
422 | }; | |
423 | ||
424 | &i2c0 { | |
425 | pinctrl-names = "default"; | |
426 | pinctrl-0 = <&i2c0_pins>; | |
427 | ||
428 | status = "okay"; | |
429 | clock-frequency = <400000>; | |
430 | ||
431 | tps: tps@2d { | |
432 | reg = <0x2d>; | |
433 | }; | |
434 | ||
435 | lis331dlh: lis331dlh@18 { | |
436 | compatible = "st,lis331dlh", "st,lis3lv02d"; | |
437 | reg = <0x18>; | |
438 | Vdd-supply = <&lis3_reg>; | |
439 | Vdd_IO-supply = <&lis3_reg>; | |
440 | ||
441 | st,click-single-x; | |
442 | st,click-single-y; | |
443 | st,click-single-z; | |
444 | st,click-thresh-x = <10>; | |
445 | st,click-thresh-y = <10>; | |
446 | st,click-thresh-z = <10>; | |
447 | st,irq1-click; | |
448 | st,irq2-click; | |
449 | st,wakeup-x-lo; | |
450 | st,wakeup-x-hi; | |
451 | st,wakeup-y-lo; | |
452 | st,wakeup-y-hi; | |
453 | st,wakeup-z-lo; | |
454 | st,wakeup-z-hi; | |
455 | st,min-limit-x = <120>; | |
456 | st,min-limit-y = <120>; | |
457 | st,min-limit-z = <140>; | |
458 | st,max-limit-x = <550>; | |
459 | st,max-limit-y = <550>; | |
460 | st,max-limit-z = <750>; | |
461 | }; | |
b452985b PU |
462 | |
463 | tlv320aic3106: tlv320aic3106@1b { | |
464 | compatible = "ti,tlv320aic3106"; | |
465 | reg = <0x1b>; | |
466 | status = "okay"; | |
467 | ||
468 | /* Regulators */ | |
469 | AVDD-supply = <&vaux2_reg>; | |
470 | IOVDD-supply = <&vaux2_reg>; | |
471 | DRVDD-supply = <&vaux2_reg>; | |
472 | DVDD-supply = <&vbat>; | |
473 | }; | |
e0efaafb JMC |
474 | }; |
475 | ||
476 | &usb { | |
477 | status = "okay"; | |
0f686d20 | 478 | }; |
e0efaafb | 479 | |
0f686d20 GM |
480 | &usb_ctrl_mod { |
481 | status = "okay"; | |
482 | }; | |
e0efaafb | 483 | |
0f686d20 GM |
484 | &usb0_phy { |
485 | status = "okay"; | |
486 | }; | |
e0efaafb | 487 | |
0f686d20 GM |
488 | &usb1_phy { |
489 | status = "okay"; | |
490 | }; | |
eda1a4bf | 491 | |
0f686d20 GM |
492 | &usb0 { |
493 | status = "okay"; | |
494 | }; | |
eda1a4bf | 495 | |
0f686d20 GM |
496 | &usb1 { |
497 | status = "okay"; | |
498 | dr_mode = "host"; | |
499 | }; | |
cae2a9e3 | 500 | |
0f686d20 GM |
501 | &cppi41dma { |
502 | status = "okay"; | |
e0efaafb JMC |
503 | }; |
504 | ||
505 | &epwmss2 { | |
506 | status = "okay"; | |
507 | ||
508 | ecap2: ecap@48304100 { | |
509 | status = "okay"; | |
510 | pinctrl-names = "default"; | |
511 | pinctrl-0 = <&ecap2_pins>; | |
512 | }; | |
513 | }; | |
514 | ||
eb33ef66 | 515 | #include "tps65910.dtsi" |
571ccb28 AC |
516 | |
517 | &tps { | |
518 | vcc1-supply = <&vbat>; | |
519 | vcc2-supply = <&vbat>; | |
520 | vcc3-supply = <&vbat>; | |
521 | vcc4-supply = <&vbat>; | |
522 | vcc5-supply = <&vbat>; | |
523 | vcc6-supply = <&vbat>; | |
524 | vcc7-supply = <&vbat>; | |
525 | vccio-supply = <&vbat>; | |
526 | ||
527 | regulators { | |
528 | vrtc_reg: regulator@0 { | |
529 | regulator-always-on; | |
530 | }; | |
531 | ||
532 | vio_reg: regulator@1 { | |
533 | regulator-always-on; | |
534 | }; | |
535 | ||
536 | vdd1_reg: regulator@2 { | |
537 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
538 | regulator-name = "vdd_mpu"; | |
539 | regulator-min-microvolt = <912500>; | |
540 | regulator-max-microvolt = <1312500>; | |
541 | regulator-boot-on; | |
542 | regulator-always-on; | |
543 | }; | |
544 | ||
545 | vdd2_reg: regulator@3 { | |
546 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
547 | regulator-name = "vdd_core"; | |
548 | regulator-min-microvolt = <912500>; | |
549 | regulator-max-microvolt = <1150000>; | |
550 | regulator-boot-on; | |
551 | regulator-always-on; | |
552 | }; | |
553 | ||
554 | vdd3_reg: regulator@4 { | |
555 | regulator-always-on; | |
556 | }; | |
557 | ||
558 | vdig1_reg: regulator@5 { | |
559 | regulator-always-on; | |
560 | }; | |
561 | ||
562 | vdig2_reg: regulator@6 { | |
563 | regulator-always-on; | |
564 | }; | |
565 | ||
566 | vpll_reg: regulator@7 { | |
567 | regulator-always-on; | |
568 | }; | |
569 | ||
570 | vdac_reg: regulator@8 { | |
571 | regulator-always-on; | |
572 | }; | |
573 | ||
574 | vaux1_reg: regulator@9 { | |
575 | regulator-always-on; | |
576 | }; | |
577 | ||
578 | vaux2_reg: regulator@10 { | |
579 | regulator-always-on; | |
580 | }; | |
581 | ||
582 | vaux33_reg: regulator@11 { | |
583 | regulator-always-on; | |
584 | }; | |
585 | ||
586 | vmmc_reg: regulator@12 { | |
55b4452b MP |
587 | regulator-min-microvolt = <1800000>; |
588 | regulator-max-microvolt = <3300000>; | |
571ccb28 AC |
589 | regulator-always-on; |
590 | }; | |
591 | }; | |
592 | }; | |
94a924ca M |
593 | |
594 | &mac { | |
595 | pinctrl-names = "default", "sleep"; | |
596 | pinctrl-0 = <&cpsw_default>; | |
597 | pinctrl-1 = <&cpsw_sleep>; | |
18c49af3 | 598 | dual_emac = <1>; |
16c75a13 | 599 | status = "okay"; |
94a924ca M |
600 | }; |
601 | ||
602 | &davinci_mdio { | |
603 | pinctrl-names = "default", "sleep"; | |
604 | pinctrl-0 = <&davinci_mdio_default>; | |
605 | pinctrl-1 = <&davinci_mdio_sleep>; | |
16c75a13 | 606 | status = "okay"; |
94a924ca | 607 | }; |
496322bc | 608 | |
f6655d69 M |
609 | &cpsw_emac0 { |
610 | phy_id = <&davinci_mdio>, <0>; | |
6d75afe2 | 611 | phy-mode = "rgmii-txid"; |
18c49af3 | 612 | dual_emac_res_vlan = <1>; |
f6655d69 M |
613 | }; |
614 | ||
615 | &cpsw_emac1 { | |
616 | phy_id = <&davinci_mdio>, <1>; | |
6d75afe2 | 617 | phy-mode = "rgmii-txid"; |
18c49af3 | 618 | dual_emac_res_vlan = <2>; |
f6655d69 | 619 | }; |
55b4452b MP |
620 | |
621 | &mmc1 { | |
622 | status = "okay"; | |
623 | vmmc-supply = <&vmmc_reg>; | |
0d8d40fc | 624 | bus-width = <4>; |
29ea5efb PU |
625 | pinctrl-names = "default"; |
626 | pinctrl-0 = <&mmc1_pins>; | |
627 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
55b4452b | 628 | }; |
f8302e1e MG |
629 | |
630 | &sham { | |
631 | status = "okay"; | |
632 | }; | |
99919e5e MG |
633 | |
634 | &aes { | |
635 | status = "okay"; | |
636 | }; | |
6046adb6 RN |
637 | |
638 | &gpio0 { | |
639 | ti,no-reset-on-init; | |
640 | }; | |
b452985b | 641 | |
90f4f01b IK |
642 | &mmc2 { |
643 | status = "okay"; | |
644 | vmmc-supply = <&wl12xx_vmmc>; | |
645 | ti,non-removable; | |
646 | bus-width = <4>; | |
647 | cap-power-off-card; | |
648 | pinctrl-names = "default"; | |
649 | pinctrl-0 = <&mmc2_pins>; | |
650 | }; | |
651 | ||
b452985b PU |
652 | &mcasp1 { |
653 | pinctrl-names = "default"; | |
654 | pinctrl-0 = <&mcasp1_pins>; | |
655 | ||
656 | status = "okay"; | |
657 | ||
658 | op-mode = <0>; /* MCASP_IIS_MODE */ | |
659 | tdm-slots = <2>; | |
660 | /* 4 serializers */ | |
661 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
662 | 0 0 1 2 | |
663 | >; | |
6f2f52b5 PU |
664 | tx-num-evt = <32>; |
665 | rx-num-evt = <32>; | |
b452985b | 666 | }; |
4937e2a6 | 667 | |
2c027b7c FB |
668 | &tscadc { |
669 | status = "okay"; | |
670 | tsc { | |
671 | ti,wires = <4>; | |
672 | ti,x-plate-resistance = <200>; | |
673 | ti,coordinate-readouts = <5>; | |
674 | ti,wire-config = <0x00 0x11 0x22 0x33>; | |
675 | }; | |
676 | }; | |
b675d1ec DE |
677 | |
678 | &lcdc { | |
679 | status = "okay"; | |
680 | }; |