Commit | Line | Data |
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571ccb28 AC |
1 | /* |
2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | /* | |
10 | * AM335x Starter Kit | |
11 | * http://www.ti.com/tool/tmdssk3358 | |
12 | */ | |
13 | ||
14 | /dts-v1/; | |
15 | ||
eb33ef66 | 16 | #include "am33xx.dtsi" |
eb9bdef1 | 17 | #include <dt-bindings/pwm/pwm.h> |
571ccb28 AC |
18 | |
19 | / { | |
20 | model = "TI AM335x EVM-SK"; | |
21 | compatible = "ti,am335x-evmsk", "ti,am33xx"; | |
22 | ||
23 | cpus { | |
24 | cpu@0 { | |
25 | cpu0-supply = <&vdd1_reg>; | |
26 | }; | |
27 | }; | |
28 | ||
29 | memory { | |
30 | device_type = "memory"; | |
31 | reg = <0x80000000 0x10000000>; /* 256 MB */ | |
32 | }; | |
33 | ||
571ccb28 AC |
34 | vbat: fixedregulator@0 { |
35 | compatible = "regulator-fixed"; | |
36 | regulator-name = "vbat"; | |
37 | regulator-min-microvolt = <5000000>; | |
38 | regulator-max-microvolt = <5000000>; | |
39 | regulator-boot-on; | |
40 | }; | |
41 | ||
42 | lis3_reg: fixedregulator@1 { | |
43 | compatible = "regulator-fixed"; | |
44 | regulator-name = "lis3_reg"; | |
45 | regulator-boot-on; | |
46 | }; | |
29b0b843 | 47 | |
90f4f01b IK |
48 | wl12xx_vmmc: fixedregulator@2 { |
49 | pinctrl-names = "default"; | |
50 | pinctrl-0 = <&wl12xx_gpio>; | |
51 | compatible = "regulator-fixed"; | |
52 | regulator-name = "vwl1271"; | |
53 | regulator-min-microvolt = <1800000>; | |
54 | regulator-max-microvolt = <1800000>; | |
55 | gpio = <&gpio1 29 0>; | |
56 | startup-delay-us = <70000>; | |
57 | enable-active-high; | |
58 | }; | |
59 | ||
29b0b843 | 60 | leds { |
b8f70c3a VH |
61 | pinctrl-names = "default"; |
62 | pinctrl-0 = <&user_leds_s0>; | |
63 | ||
29b0b843 AC |
64 | compatible = "gpio-leds"; |
65 | ||
66 | led@1 { | |
67 | label = "evmsk:green:usr0"; | |
e94233c2 | 68 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
69 | default-state = "off"; |
70 | }; | |
71 | ||
72 | led@2 { | |
73 | label = "evmsk:green:usr1"; | |
e94233c2 | 74 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
75 | default-state = "off"; |
76 | }; | |
77 | ||
78 | led@3 { | |
79 | label = "evmsk:green:mmc0"; | |
e94233c2 | 80 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
81 | linux,default-trigger = "mmc0"; |
82 | default-state = "off"; | |
83 | }; | |
84 | ||
85 | led@4 { | |
86 | label = "evmsk:green:heartbeat"; | |
e94233c2 | 87 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
29b0b843 AC |
88 | linux,default-trigger = "heartbeat"; |
89 | default-state = "off"; | |
90 | }; | |
91 | }; | |
00834b78 AC |
92 | |
93 | gpio_buttons: gpio_buttons@0 { | |
94 | compatible = "gpio-keys"; | |
95 | #address-cells = <1>; | |
96 | #size-cells = <0>; | |
97 | ||
98 | switch@1 { | |
99 | label = "button0"; | |
100 | linux,code = <0x100>; | |
e94233c2 | 101 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
102 | }; |
103 | ||
104 | switch@2 { | |
105 | label = "button1"; | |
106 | linux,code = <0x101>; | |
e94233c2 | 107 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
108 | }; |
109 | ||
110 | switch@3 { | |
111 | label = "button2"; | |
112 | linux,code = <0x102>; | |
e94233c2 | 113 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
114 | gpio-key,wakeup; |
115 | }; | |
116 | ||
117 | switch@4 { | |
118 | label = "button3"; | |
119 | linux,code = <0x103>; | |
e94233c2 | 120 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
00834b78 AC |
121 | }; |
122 | }; | |
1632fbde PA |
123 | |
124 | backlight { | |
125 | compatible = "pwm-backlight"; | |
eb9bdef1 | 126 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
1632fbde PA |
127 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
128 | default-brightness-level = <8>; | |
129 | }; | |
b452985b PU |
130 | |
131 | sound { | |
132 | compatible = "ti,da830-evm-audio"; | |
133 | ti,model = "AM335x-EVMSK"; | |
134 | ti,audio-codec = <&tlv320aic3106>; | |
135 | ti,mcasp-controller = <&mcasp1>; | |
d2c28923 | 136 | ti,codec-clock-rate = <24000000>; |
b452985b PU |
137 | ti,audio-routing = |
138 | "Headphone Jack", "HPLOUT", | |
139 | "Headphone Jack", "HPROUT"; | |
140 | }; | |
571ccb28 AC |
141 | }; |
142 | ||
82d75afc JMC |
143 | &am33xx_pinmux { |
144 | pinctrl-names = "default"; | |
145 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; | |
146 | ||
147 | user_leds_s0: user_leds_s0 { | |
148 | pinctrl-single,pins = < | |
149 | 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ | |
150 | 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ | |
151 | 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ | |
152 | 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ | |
153 | >; | |
154 | }; | |
155 | ||
156 | gpio_keys_s0: gpio_keys_s0 { | |
157 | pinctrl-single,pins = < | |
158 | 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ | |
159 | 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ | |
160 | 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ | |
161 | 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ | |
162 | >; | |
163 | }; | |
164 | ||
165 | i2c0_pins: pinmux_i2c0_pins { | |
166 | pinctrl-single,pins = < | |
167 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
168 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
169 | >; | |
170 | }; | |
171 | ||
172 | uart0_pins: pinmux_uart0_pins { | |
173 | pinctrl-single,pins = < | |
174 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
175 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
176 | >; | |
177 | }; | |
178 | ||
179 | clkout2_pin: pinmux_clkout2_pin { | |
180 | pinctrl-single,pins = < | |
181 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ | |
182 | >; | |
183 | }; | |
184 | ||
185 | ecap2_pins: backlight_pins { | |
186 | pinctrl-single,pins = < | |
187 | 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ | |
188 | >; | |
189 | }; | |
190 | ||
191 | cpsw_default: cpsw_default { | |
192 | pinctrl-single,pins = < | |
193 | /* Slave 1 */ | |
194 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
195 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
196 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ | |
197 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ | |
198 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
199 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
200 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ | |
201 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ | |
202 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ | |
203 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ | |
204 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
205 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
206 | ||
207 | /* Slave 2 */ | |
208 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
209 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ | |
210 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
211 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
212 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
213 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
214 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
215 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
216 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
217 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
218 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
219 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
220 | >; | |
221 | }; | |
222 | ||
223 | cpsw_sleep: cpsw_sleep { | |
224 | pinctrl-single,pins = < | |
225 | /* Slave 1 reset value */ | |
226 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
227 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
228 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
229 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
230 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
231 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
232 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
233 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
234 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
235 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
236 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
237 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
238 | ||
239 | /* Slave 2 reset value*/ | |
240 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
241 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
242 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
243 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
244 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
245 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
246 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
247 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
248 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
249 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
250 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
251 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
252 | >; | |
253 | }; | |
254 | ||
255 | davinci_mdio_default: davinci_mdio_default { | |
256 | pinctrl-single,pins = < | |
257 | /* MDIO */ | |
258 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
259 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
260 | >; | |
261 | }; | |
262 | ||
263 | davinci_mdio_sleep: davinci_mdio_sleep { | |
264 | pinctrl-single,pins = < | |
265 | /* MDIO reset value */ | |
266 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
267 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
268 | >; | |
269 | }; | |
b452985b | 270 | |
29ea5efb PU |
271 | mmc1_pins: pinmux_mmc1_pins { |
272 | pinctrl-single,pins = < | |
273 | 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
274 | >; | |
275 | }; | |
276 | ||
b452985b PU |
277 | mcasp1_pins: mcasp1_pins { |
278 | pinctrl-single,pins = < | |
279 | 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ | |
280 | 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ | |
281 | 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ | |
282 | 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ | |
283 | >; | |
284 | }; | |
90f4f01b IK |
285 | |
286 | mmc2_pins: pinmux_mmc2_pins { | |
287 | pinctrl-single,pins = < | |
288 | 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ | |
289 | 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
290 | 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
291 | 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
292 | 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
293 | 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
294 | 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
295 | >; | |
296 | }; | |
297 | ||
298 | wl12xx_gpio: pinmux_wl12xx_gpio { | |
299 | pinctrl-single,pins = < | |
300 | 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ | |
301 | >; | |
302 | }; | |
82d75afc JMC |
303 | }; |
304 | ||
e0efaafb JMC |
305 | &uart0 { |
306 | pinctrl-names = "default"; | |
307 | pinctrl-0 = <&uart0_pins>; | |
308 | ||
309 | status = "okay"; | |
310 | }; | |
311 | ||
312 | &i2c0 { | |
313 | pinctrl-names = "default"; | |
314 | pinctrl-0 = <&i2c0_pins>; | |
315 | ||
316 | status = "okay"; | |
317 | clock-frequency = <400000>; | |
318 | ||
319 | tps: tps@2d { | |
320 | reg = <0x2d>; | |
321 | }; | |
322 | ||
323 | lis331dlh: lis331dlh@18 { | |
324 | compatible = "st,lis331dlh", "st,lis3lv02d"; | |
325 | reg = <0x18>; | |
326 | Vdd-supply = <&lis3_reg>; | |
327 | Vdd_IO-supply = <&lis3_reg>; | |
328 | ||
329 | st,click-single-x; | |
330 | st,click-single-y; | |
331 | st,click-single-z; | |
332 | st,click-thresh-x = <10>; | |
333 | st,click-thresh-y = <10>; | |
334 | st,click-thresh-z = <10>; | |
335 | st,irq1-click; | |
336 | st,irq2-click; | |
337 | st,wakeup-x-lo; | |
338 | st,wakeup-x-hi; | |
339 | st,wakeup-y-lo; | |
340 | st,wakeup-y-hi; | |
341 | st,wakeup-z-lo; | |
342 | st,wakeup-z-hi; | |
343 | st,min-limit-x = <120>; | |
344 | st,min-limit-y = <120>; | |
345 | st,min-limit-z = <140>; | |
346 | st,max-limit-x = <550>; | |
347 | st,max-limit-y = <550>; | |
348 | st,max-limit-z = <750>; | |
349 | }; | |
b452985b PU |
350 | |
351 | tlv320aic3106: tlv320aic3106@1b { | |
352 | compatible = "ti,tlv320aic3106"; | |
353 | reg = <0x1b>; | |
354 | status = "okay"; | |
355 | ||
356 | /* Regulators */ | |
357 | AVDD-supply = <&vaux2_reg>; | |
358 | IOVDD-supply = <&vaux2_reg>; | |
359 | DRVDD-supply = <&vaux2_reg>; | |
360 | DVDD-supply = <&vbat>; | |
361 | }; | |
e0efaafb JMC |
362 | }; |
363 | ||
364 | &usb { | |
365 | status = "okay"; | |
0f686d20 | 366 | }; |
e0efaafb | 367 | |
0f686d20 GM |
368 | &usb_ctrl_mod { |
369 | status = "okay"; | |
370 | }; | |
e0efaafb | 371 | |
0f686d20 GM |
372 | &usb0_phy { |
373 | status = "okay"; | |
374 | }; | |
e0efaafb | 375 | |
0f686d20 GM |
376 | &usb1_phy { |
377 | status = "okay"; | |
378 | }; | |
eda1a4bf | 379 | |
0f686d20 GM |
380 | &usb0 { |
381 | status = "okay"; | |
382 | }; | |
eda1a4bf | 383 | |
0f686d20 GM |
384 | &usb1 { |
385 | status = "okay"; | |
386 | dr_mode = "host"; | |
387 | }; | |
cae2a9e3 | 388 | |
0f686d20 GM |
389 | &cppi41dma { |
390 | status = "okay"; | |
e0efaafb JMC |
391 | }; |
392 | ||
393 | &epwmss2 { | |
394 | status = "okay"; | |
395 | ||
396 | ecap2: ecap@48304100 { | |
397 | status = "okay"; | |
398 | pinctrl-names = "default"; | |
399 | pinctrl-0 = <&ecap2_pins>; | |
400 | }; | |
401 | }; | |
402 | ||
eb33ef66 | 403 | #include "tps65910.dtsi" |
571ccb28 AC |
404 | |
405 | &tps { | |
406 | vcc1-supply = <&vbat>; | |
407 | vcc2-supply = <&vbat>; | |
408 | vcc3-supply = <&vbat>; | |
409 | vcc4-supply = <&vbat>; | |
410 | vcc5-supply = <&vbat>; | |
411 | vcc6-supply = <&vbat>; | |
412 | vcc7-supply = <&vbat>; | |
413 | vccio-supply = <&vbat>; | |
414 | ||
415 | regulators { | |
416 | vrtc_reg: regulator@0 { | |
417 | regulator-always-on; | |
418 | }; | |
419 | ||
420 | vio_reg: regulator@1 { | |
421 | regulator-always-on; | |
422 | }; | |
423 | ||
424 | vdd1_reg: regulator@2 { | |
425 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ | |
426 | regulator-name = "vdd_mpu"; | |
427 | regulator-min-microvolt = <912500>; | |
428 | regulator-max-microvolt = <1312500>; | |
429 | regulator-boot-on; | |
430 | regulator-always-on; | |
431 | }; | |
432 | ||
433 | vdd2_reg: regulator@3 { | |
434 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ | |
435 | regulator-name = "vdd_core"; | |
436 | regulator-min-microvolt = <912500>; | |
437 | regulator-max-microvolt = <1150000>; | |
438 | regulator-boot-on; | |
439 | regulator-always-on; | |
440 | }; | |
441 | ||
442 | vdd3_reg: regulator@4 { | |
443 | regulator-always-on; | |
444 | }; | |
445 | ||
446 | vdig1_reg: regulator@5 { | |
447 | regulator-always-on; | |
448 | }; | |
449 | ||
450 | vdig2_reg: regulator@6 { | |
451 | regulator-always-on; | |
452 | }; | |
453 | ||
454 | vpll_reg: regulator@7 { | |
455 | regulator-always-on; | |
456 | }; | |
457 | ||
458 | vdac_reg: regulator@8 { | |
459 | regulator-always-on; | |
460 | }; | |
461 | ||
462 | vaux1_reg: regulator@9 { | |
463 | regulator-always-on; | |
464 | }; | |
465 | ||
466 | vaux2_reg: regulator@10 { | |
467 | regulator-always-on; | |
468 | }; | |
469 | ||
470 | vaux33_reg: regulator@11 { | |
471 | regulator-always-on; | |
472 | }; | |
473 | ||
474 | vmmc_reg: regulator@12 { | |
55b4452b MP |
475 | regulator-min-microvolt = <1800000>; |
476 | regulator-max-microvolt = <3300000>; | |
571ccb28 AC |
477 | regulator-always-on; |
478 | }; | |
479 | }; | |
480 | }; | |
94a924ca M |
481 | |
482 | &mac { | |
483 | pinctrl-names = "default", "sleep"; | |
484 | pinctrl-0 = <&cpsw_default>; | |
485 | pinctrl-1 = <&cpsw_sleep>; | |
18c49af3 | 486 | dual_emac = <1>; |
94a924ca M |
487 | }; |
488 | ||
489 | &davinci_mdio { | |
490 | pinctrl-names = "default", "sleep"; | |
491 | pinctrl-0 = <&davinci_mdio_default>; | |
492 | pinctrl-1 = <&davinci_mdio_sleep>; | |
493 | }; | |
496322bc | 494 | |
f6655d69 M |
495 | &cpsw_emac0 { |
496 | phy_id = <&davinci_mdio>, <0>; | |
6d75afe2 | 497 | phy-mode = "rgmii-txid"; |
18c49af3 | 498 | dual_emac_res_vlan = <1>; |
f6655d69 M |
499 | }; |
500 | ||
501 | &cpsw_emac1 { | |
502 | phy_id = <&davinci_mdio>, <1>; | |
6d75afe2 | 503 | phy-mode = "rgmii-txid"; |
18c49af3 | 504 | dual_emac_res_vlan = <2>; |
f6655d69 | 505 | }; |
55b4452b MP |
506 | |
507 | &mmc1 { | |
508 | status = "okay"; | |
509 | vmmc-supply = <&vmmc_reg>; | |
0d8d40fc | 510 | bus-width = <4>; |
29ea5efb PU |
511 | pinctrl-names = "default"; |
512 | pinctrl-0 = <&mmc1_pins>; | |
513 | cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
55b4452b | 514 | }; |
f8302e1e MG |
515 | |
516 | &sham { | |
517 | status = "okay"; | |
518 | }; | |
99919e5e MG |
519 | |
520 | &aes { | |
521 | status = "okay"; | |
522 | }; | |
6046adb6 RN |
523 | |
524 | &gpio0 { | |
525 | ti,no-reset-on-init; | |
526 | }; | |
b452985b | 527 | |
90f4f01b IK |
528 | &mmc2 { |
529 | status = "okay"; | |
530 | vmmc-supply = <&wl12xx_vmmc>; | |
531 | ti,non-removable; | |
532 | bus-width = <4>; | |
533 | cap-power-off-card; | |
534 | pinctrl-names = "default"; | |
535 | pinctrl-0 = <&mmc2_pins>; | |
536 | }; | |
537 | ||
b452985b PU |
538 | &mcasp1 { |
539 | pinctrl-names = "default"; | |
540 | pinctrl-0 = <&mcasp1_pins>; | |
541 | ||
542 | status = "okay"; | |
543 | ||
544 | op-mode = <0>; /* MCASP_IIS_MODE */ | |
545 | tdm-slots = <2>; | |
546 | /* 4 serializers */ | |
547 | serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
548 | 0 0 1 2 | |
549 | >; | |
550 | tx-num-evt = <1>; | |
551 | rx-num-evt = <1>; | |
552 | }; | |
4937e2a6 | 553 | |
2c027b7c FB |
554 | &tscadc { |
555 | status = "okay"; | |
556 | tsc { | |
557 | ti,wires = <4>; | |
558 | ti,x-plate-resistance = <200>; | |
559 | ti,coordinate-readouts = <5>; | |
560 | ti,wire-config = <0x00 0x11 0x22 0x33>; | |
561 | }; | |
562 | }; |