Commit | Line | Data |
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5fc0b42a AC |
1 | /* |
2 | * Device Tree Source for AM33XX SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
e94233c2 | 13 | |
eb33ef66 | 14 | #include "skeleton.dtsi" |
5fc0b42a AC |
15 | |
16 | / { | |
17 | compatible = "ti,am33xx"; | |
4c94ac29 | 18 | interrupt-parent = <&intc>; |
5fc0b42a AC |
19 | |
20 | aliases { | |
6a968678 NM |
21 | i2c0 = &i2c0; |
22 | i2c1 = &i2c1; | |
23 | i2c2 = &i2c2; | |
dde3b0d6 VH |
24 | serial0 = &uart0; |
25 | serial1 = &uart1; | |
26 | serial2 = &uart2; | |
27 | serial3 = &uart3; | |
28 | serial4 = &uart4; | |
29 | serial5 = &uart5; | |
7a57ee87 AC |
30 | d_can0 = &dcan0; |
31 | d_can1 = &dcan1; | |
97238b35 SAS |
32 | usb0 = &usb0; |
33 | usb1 = &usb1; | |
34 | phy0 = &usb0_phy; | |
35 | phy1 = &usb1_phy; | |
8170056d DM |
36 | ethernet0 = &cpsw_emac0; |
37 | ethernet1 = &cpsw_emac1; | |
5fc0b42a AC |
38 | }; |
39 | ||
40 | cpus { | |
2e0d513f LP |
41 | #address-cells = <1>; |
42 | #size-cells = <0>; | |
5fc0b42a AC |
43 | cpu@0 { |
44 | compatible = "arm,cortex-a8"; | |
2e0d513f LP |
45 | device_type = "cpu"; |
46 | reg = <0>; | |
efeedcf2 AC |
47 | |
48 | /* | |
49 | * To consider voltage drop between PMIC and SoC, | |
50 | * tolerance value is reduced to 2% from 4% and | |
51 | * voltage value is increased as a precaution. | |
52 | */ | |
53 | operating-points = < | |
54 | /* kHz uV */ | |
55 | 720000 1285000 | |
56 | 600000 1225000 | |
57 | 500000 1125000 | |
58 | 275000 1125000 | |
59 | >; | |
60 | voltage-tolerance = <2>; /* 2 percentage */ | |
8d766fa2 NM |
61 | |
62 | clocks = <&dpll_mpu_ck>; | |
63 | clock-names = "cpu"; | |
64 | ||
efeedcf2 | 65 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
5fc0b42a AC |
66 | }; |
67 | }; | |
68 | ||
6797cdbe AB |
69 | pmu { |
70 | compatible = "arm,cortex-a8-pmu"; | |
71 | interrupts = <3>; | |
72 | }; | |
73 | ||
5fc0b42a | 74 | /* |
5c5be9db | 75 | * The soc node represents the soc top level view. It is used for IPs |
5fc0b42a AC |
76 | * that are not memory mapped in the MPU view or for the MPU itself. |
77 | */ | |
78 | soc { | |
79 | compatible = "ti,omap-infra"; | |
80 | mpu { | |
81 | compatible = "ti,omap3-mpu"; | |
82 | ti,hwmods = "mpu"; | |
83 | }; | |
84 | }; | |
85 | ||
86 | /* | |
87 | * XXX: Use a flat representation of the AM33XX interconnect. | |
b7ab524b GU |
88 | * The real AM33XX interconnect network is quite complex. Since |
89 | * it will not bring real advantage to represent that in DT | |
5fc0b42a AC |
90 | * for the moment, just use a fake OCP bus entry to represent |
91 | * the whole bus hierarchy. | |
92 | */ | |
93 | ocp { | |
94 | compatible = "simple-bus"; | |
95 | #address-cells = <1>; | |
96 | #size-cells = <1>; | |
97 | ranges; | |
98 | ti,hwmods = "l3_main"; | |
99 | ||
e3bc5358 TK |
100 | l4_wkup: l4_wkup@44c00000 { |
101 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
102 | #address-cells = <1>; | |
103 | #size-cells = <1>; | |
104 | ranges = <0 0x44c00000 0x280000>; | |
ea291c98 | 105 | |
d129be27 SA |
106 | wkup_m3: wkup_m3@100000 { |
107 | compatible = "ti,am3352-wkup-m3"; | |
108 | reg = <0x100000 0x4000>, | |
109 | <0x180000 0x2000>; | |
110 | reg-names = "umem", "dmem"; | |
111 | ti,hwmods = "wkup_m3"; | |
112 | ti,pm-firmware = "am335x-pm-firmware.elf"; | |
113 | }; | |
114 | ||
e3bc5358 TK |
115 | prcm: prcm@200000 { |
116 | compatible = "ti,am3-prcm"; | |
117 | reg = <0x200000 0x4000>; | |
ea291c98 | 118 | |
e3bc5358 TK |
119 | prcm_clocks: clocks { |
120 | #address-cells = <1>; | |
121 | #size-cells = <0>; | |
122 | }; | |
ea291c98 | 123 | |
e3bc5358 TK |
124 | prcm_clockdomains: clockdomains { |
125 | }; | |
ea291c98 TK |
126 | }; |
127 | ||
e3bc5358 TK |
128 | scm: scm@210000 { |
129 | compatible = "ti,am3-scm", "simple-bus"; | |
130 | reg = <0x210000 0x2000>; | |
131 | #address-cells = <1>; | |
132 | #size-cells = <1>; | |
133 | ranges = <0 0x210000 0x2000>; | |
134 | ||
135 | am33xx_pinmux: pinmux@800 { | |
136 | compatible = "pinctrl-single"; | |
137 | reg = <0x800 0x238>; | |
138 | #address-cells = <1>; | |
139 | #size-cells = <0>; | |
140 | pinctrl-single,register-width = <32>; | |
141 | pinctrl-single,function-mask = <0x7f>; | |
142 | }; | |
143 | ||
144 | scm_conf: scm_conf@0 { | |
145 | compatible = "syscon"; | |
146 | reg = <0x0 0x800>; | |
147 | #address-cells = <1>; | |
148 | #size-cells = <1>; | |
149 | ||
150 | scm_clocks: clocks { | |
151 | #address-cells = <1>; | |
152 | #size-cells = <0>; | |
153 | }; | |
154 | }; | |
155 | ||
99937129 SA |
156 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
157 | compatible = "ti,am3352-wkup-m3-ipc"; | |
158 | reg = <0x1324 0x24>; | |
159 | interrupts = <78>; | |
160 | ti,rproc = <&wkup_m3>; | |
161 | mboxes = <&mailbox &mbox_wkupm3>; | |
162 | }; | |
163 | ||
b5e50906 PU |
164 | edma_xbar: dma-router@f90 { |
165 | compatible = "ti,am335x-edma-crossbar"; | |
166 | reg = <0xf90 0x40>; | |
167 | #dma-cells = <3>; | |
168 | dma-requests = <32>; | |
169 | dma-masters = <&edma>; | |
170 | }; | |
171 | ||
e3bc5358 TK |
172 | scm_clockdomains: clockdomains { |
173 | }; | |
ea291c98 TK |
174 | }; |
175 | }; | |
176 | ||
5fc0b42a | 177 | intc: interrupt-controller@48200000 { |
cab82b76 | 178 | compatible = "ti,am33xx-intc"; |
5fc0b42a AC |
179 | interrupt-controller; |
180 | #interrupt-cells = <1>; | |
5fc0b42a AC |
181 | reg = <0x48200000 0x1000>; |
182 | }; | |
183 | ||
505975d3 | 184 | edma: edma@49000000 { |
b5e50906 PU |
185 | compatible = "ti,edma3-tpcc"; |
186 | ti,hwmods = "tpcc"; | |
187 | reg = <0x49000000 0x10000>; | |
188 | reg-names = "edma3_cc"; | |
505975d3 | 189 | interrupts = <12 13 14>; |
b5e50906 PU |
190 | interrupt-names = "edma3_ccint", "emda3_mperr", |
191 | "edma3_ccerrint"; | |
192 | dma-requests = <64>; | |
193 | #dma-cells = <2>; | |
194 | ||
195 | ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, | |
196 | <&edma_tptc2 0>; | |
197 | ||
198 | ti,edma-memcpy-channels = <20 21>; | |
199 | }; | |
200 | ||
201 | edma_tptc0: tptc@49800000 { | |
202 | compatible = "ti,edma3-tptc"; | |
203 | ti,hwmods = "tptc0"; | |
204 | reg = <0x49800000 0x100000>; | |
205 | interrupts = <112>; | |
206 | interrupt-names = "edma3_tcerrint"; | |
207 | }; | |
208 | ||
209 | edma_tptc1: tptc@49900000 { | |
210 | compatible = "ti,edma3-tptc"; | |
211 | ti,hwmods = "tptc1"; | |
212 | reg = <0x49900000 0x100000>; | |
213 | interrupts = <113>; | |
214 | interrupt-names = "edma3_tcerrint"; | |
215 | }; | |
216 | ||
217 | edma_tptc2: tptc@49a00000 { | |
218 | compatible = "ti,edma3-tptc"; | |
219 | ti,hwmods = "tptc2"; | |
220 | reg = <0x49a00000 0x100000>; | |
221 | interrupts = <114>; | |
222 | interrupt-names = "edma3_tcerrint"; | |
505975d3 MP |
223 | }; |
224 | ||
b918e2c0 | 225 | gpio0: gpio@44e07000 { |
5fc0b42a AC |
226 | compatible = "ti,omap4-gpio"; |
227 | ti,hwmods = "gpio1"; | |
228 | gpio-controller; | |
229 | #gpio-cells = <2>; | |
230 | interrupt-controller; | |
5eac0eb7 | 231 | #interrupt-cells = <2>; |
4462b31c | 232 | reg = <0x44e07000 0x1000>; |
4462b31c | 233 | interrupts = <96>; |
5fc0b42a AC |
234 | }; |
235 | ||
b918e2c0 | 236 | gpio1: gpio@4804c000 { |
5fc0b42a AC |
237 | compatible = "ti,omap4-gpio"; |
238 | ti,hwmods = "gpio2"; | |
239 | gpio-controller; | |
240 | #gpio-cells = <2>; | |
241 | interrupt-controller; | |
5eac0eb7 | 242 | #interrupt-cells = <2>; |
4462b31c | 243 | reg = <0x4804c000 0x1000>; |
4462b31c | 244 | interrupts = <98>; |
5fc0b42a AC |
245 | }; |
246 | ||
b918e2c0 | 247 | gpio2: gpio@481ac000 { |
5fc0b42a AC |
248 | compatible = "ti,omap4-gpio"; |
249 | ti,hwmods = "gpio3"; | |
250 | gpio-controller; | |
251 | #gpio-cells = <2>; | |
252 | interrupt-controller; | |
5eac0eb7 | 253 | #interrupt-cells = <2>; |
4462b31c | 254 | reg = <0x481ac000 0x1000>; |
4462b31c | 255 | interrupts = <32>; |
5fc0b42a AC |
256 | }; |
257 | ||
b918e2c0 | 258 | gpio3: gpio@481ae000 { |
5fc0b42a AC |
259 | compatible = "ti,omap4-gpio"; |
260 | ti,hwmods = "gpio4"; | |
261 | gpio-controller; | |
262 | #gpio-cells = <2>; | |
263 | interrupt-controller; | |
5eac0eb7 | 264 | #interrupt-cells = <2>; |
4462b31c | 265 | reg = <0x481ae000 0x1000>; |
4462b31c | 266 | interrupts = <62>; |
5fc0b42a AC |
267 | }; |
268 | ||
dde3b0d6 | 269 | uart0: serial@44e09000 { |
4fcdff9b | 270 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
271 | ti,hwmods = "uart1"; |
272 | clock-frequency = <48000000>; | |
4462b31c | 273 | reg = <0x44e09000 0x2000>; |
4462b31c | 274 | interrupts = <72>; |
53d91034 | 275 | status = "disabled"; |
b5e50906 | 276 | dmas = <&edma 26 0>, <&edma 27 0>; |
13fd3d57 | 277 | dma-names = "tx", "rx"; |
5fc0b42a AC |
278 | }; |
279 | ||
dde3b0d6 | 280 | uart1: serial@48022000 { |
4fcdff9b | 281 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
282 | ti,hwmods = "uart2"; |
283 | clock-frequency = <48000000>; | |
4462b31c | 284 | reg = <0x48022000 0x2000>; |
4462b31c | 285 | interrupts = <73>; |
53d91034 | 286 | status = "disabled"; |
b5e50906 | 287 | dmas = <&edma 28 0>, <&edma 29 0>; |
13fd3d57 | 288 | dma-names = "tx", "rx"; |
5fc0b42a AC |
289 | }; |
290 | ||
dde3b0d6 | 291 | uart2: serial@48024000 { |
4fcdff9b | 292 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
293 | ti,hwmods = "uart3"; |
294 | clock-frequency = <48000000>; | |
4462b31c | 295 | reg = <0x48024000 0x2000>; |
4462b31c | 296 | interrupts = <74>; |
53d91034 | 297 | status = "disabled"; |
b5e50906 | 298 | dmas = <&edma 30 0>, <&edma 31 0>; |
13fd3d57 | 299 | dma-names = "tx", "rx"; |
5fc0b42a AC |
300 | }; |
301 | ||
dde3b0d6 | 302 | uart3: serial@481a6000 { |
4fcdff9b | 303 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
304 | ti,hwmods = "uart4"; |
305 | clock-frequency = <48000000>; | |
4462b31c | 306 | reg = <0x481a6000 0x2000>; |
4462b31c | 307 | interrupts = <44>; |
53d91034 | 308 | status = "disabled"; |
5fc0b42a AC |
309 | }; |
310 | ||
dde3b0d6 | 311 | uart4: serial@481a8000 { |
4fcdff9b | 312 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
313 | ti,hwmods = "uart5"; |
314 | clock-frequency = <48000000>; | |
4462b31c | 315 | reg = <0x481a8000 0x2000>; |
4462b31c | 316 | interrupts = <45>; |
53d91034 | 317 | status = "disabled"; |
5fc0b42a AC |
318 | }; |
319 | ||
dde3b0d6 | 320 | uart5: serial@481aa000 { |
4fcdff9b | 321 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
322 | ti,hwmods = "uart6"; |
323 | clock-frequency = <48000000>; | |
4462b31c | 324 | reg = <0x481aa000 0x2000>; |
4462b31c | 325 | interrupts = <46>; |
53d91034 | 326 | status = "disabled"; |
5fc0b42a AC |
327 | }; |
328 | ||
b918e2c0 | 329 | i2c0: i2c@44e0b000 { |
5fc0b42a AC |
330 | compatible = "ti,omap4-i2c"; |
331 | #address-cells = <1>; | |
332 | #size-cells = <0>; | |
333 | ti,hwmods = "i2c1"; | |
4462b31c | 334 | reg = <0x44e0b000 0x1000>; |
4462b31c | 335 | interrupts = <70>; |
53d91034 | 336 | status = "disabled"; |
5fc0b42a AC |
337 | }; |
338 | ||
b918e2c0 | 339 | i2c1: i2c@4802a000 { |
5fc0b42a AC |
340 | compatible = "ti,omap4-i2c"; |
341 | #address-cells = <1>; | |
342 | #size-cells = <0>; | |
343 | ti,hwmods = "i2c2"; | |
4462b31c | 344 | reg = <0x4802a000 0x1000>; |
4462b31c | 345 | interrupts = <71>; |
53d91034 | 346 | status = "disabled"; |
5fc0b42a AC |
347 | }; |
348 | ||
b918e2c0 | 349 | i2c2: i2c@4819c000 { |
5fc0b42a AC |
350 | compatible = "ti,omap4-i2c"; |
351 | #address-cells = <1>; | |
352 | #size-cells = <0>; | |
353 | ti,hwmods = "i2c3"; | |
4462b31c | 354 | reg = <0x4819c000 0x1000>; |
4462b31c | 355 | interrupts = <30>; |
53d91034 | 356 | status = "disabled"; |
5fc0b42a | 357 | }; |
5f789ebc | 358 | |
55b4452b MP |
359 | mmc1: mmc@48060000 { |
360 | compatible = "ti,omap4-hsmmc"; | |
361 | ti,hwmods = "mmc1"; | |
362 | ti,dual-volt; | |
363 | ti,needs-special-reset; | |
364 | ti,needs-special-hs-handling; | |
b5e50906 PU |
365 | dmas = <&edma_xbar 24 0 0 |
366 | &edma_xbar 25 0 0>; | |
55b4452b MP |
367 | dma-names = "tx", "rx"; |
368 | interrupts = <64>; | |
369 | interrupt-parent = <&intc>; | |
370 | reg = <0x48060000 0x1000>; | |
371 | status = "disabled"; | |
372 | }; | |
373 | ||
374 | mmc2: mmc@481d8000 { | |
375 | compatible = "ti,omap4-hsmmc"; | |
376 | ti,hwmods = "mmc2"; | |
377 | ti,needs-special-reset; | |
b5e50906 PU |
378 | dmas = <&edma 2 0 |
379 | &edma 3 0>; | |
55b4452b MP |
380 | dma-names = "tx", "rx"; |
381 | interrupts = <28>; | |
382 | interrupt-parent = <&intc>; | |
383 | reg = <0x481d8000 0x1000>; | |
384 | status = "disabled"; | |
385 | }; | |
386 | ||
387 | mmc3: mmc@47810000 { | |
388 | compatible = "ti,omap4-hsmmc"; | |
389 | ti,hwmods = "mmc3"; | |
390 | ti,needs-special-reset; | |
391 | interrupts = <29>; | |
392 | interrupt-parent = <&intc>; | |
393 | reg = <0x47810000 0x1000>; | |
394 | status = "disabled"; | |
395 | }; | |
396 | ||
d4cbe80d SA |
397 | hwspinlock: spinlock@480ca000 { |
398 | compatible = "ti,omap4-hwspinlock"; | |
399 | reg = <0x480ca000 0x1000>; | |
400 | ti,hwmods = "spinlock"; | |
34054213 | 401 | #hwlock-cells = <1>; |
d4cbe80d SA |
402 | }; |
403 | ||
5f789ebc AM |
404 | wdt2: wdt@44e35000 { |
405 | compatible = "ti,omap3-wdt"; | |
406 | ti,hwmods = "wd_timer2"; | |
4462b31c | 407 | reg = <0x44e35000 0x1000>; |
4462b31c | 408 | interrupts = <91>; |
5f789ebc | 409 | }; |
059b185d | 410 | |
e23aabc6 RQ |
411 | dcan0: can@481cc000 { |
412 | compatible = "ti,am3352-d_can"; | |
059b185d | 413 | ti,hwmods = "d_can0"; |
e23aabc6 RQ |
414 | reg = <0x481cc000 0x2000>; |
415 | clocks = <&dcan0_fck>; | |
416 | clock-names = "fck"; | |
e3bc5358 | 417 | syscon-raminit = <&scm_conf 0x644 0>; |
059b185d | 418 | interrupts = <52>; |
059b185d AC |
419 | status = "disabled"; |
420 | }; | |
421 | ||
e23aabc6 RQ |
422 | dcan1: can@481d0000 { |
423 | compatible = "ti,am3352-d_can"; | |
059b185d | 424 | ti,hwmods = "d_can1"; |
e23aabc6 RQ |
425 | reg = <0x481d0000 0x2000>; |
426 | clocks = <&dcan1_fck>; | |
427 | clock-names = "fck"; | |
e3bc5358 | 428 | syscon-raminit = <&scm_conf 0x644 1>; |
059b185d | 429 | interrupts = <55>; |
059b185d AC |
430 | status = "disabled"; |
431 | }; | |
fab8ad0b | 432 | |
40242301 SA |
433 | mailbox: mailbox@480C8000 { |
434 | compatible = "ti,omap4-mailbox"; | |
435 | reg = <0x480C8000 0x200>; | |
436 | interrupts = <77>; | |
437 | ti,hwmods = "mailbox"; | |
24df0453 | 438 | #mbox-cells = <1>; |
40242301 SA |
439 | ti,mbox-num-users = <4>; |
440 | ti,mbox-num-fifos = <8>; | |
d27704d1 | 441 | mbox_wkupm3: wkup_m3 { |
2800971f | 442 | ti,mbox-send-noirq; |
d27704d1 SA |
443 | ti,mbox-tx = <0 0 0>; |
444 | ti,mbox-rx = <0 0 3>; | |
445 | }; | |
40242301 SA |
446 | }; |
447 | ||
fab8ad0b | 448 | timer1: timer@44e31000 { |
002e1ec5 | 449 | compatible = "ti,am335x-timer-1ms"; |
fab8ad0b JH |
450 | reg = <0x44e31000 0x400>; |
451 | interrupts = <67>; | |
452 | ti,hwmods = "timer1"; | |
453 | ti,timer-alwon; | |
454 | }; | |
455 | ||
456 | timer2: timer@48040000 { | |
002e1ec5 | 457 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
458 | reg = <0x48040000 0x400>; |
459 | interrupts = <68>; | |
460 | ti,hwmods = "timer2"; | |
461 | }; | |
462 | ||
463 | timer3: timer@48042000 { | |
002e1ec5 | 464 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
465 | reg = <0x48042000 0x400>; |
466 | interrupts = <69>; | |
467 | ti,hwmods = "timer3"; | |
468 | }; | |
469 | ||
470 | timer4: timer@48044000 { | |
002e1ec5 | 471 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
472 | reg = <0x48044000 0x400>; |
473 | interrupts = <92>; | |
474 | ti,hwmods = "timer4"; | |
475 | ti,timer-pwm; | |
476 | }; | |
477 | ||
478 | timer5: timer@48046000 { | |
002e1ec5 | 479 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
480 | reg = <0x48046000 0x400>; |
481 | interrupts = <93>; | |
482 | ti,hwmods = "timer5"; | |
483 | ti,timer-pwm; | |
484 | }; | |
485 | ||
486 | timer6: timer@48048000 { | |
002e1ec5 | 487 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
488 | reg = <0x48048000 0x400>; |
489 | interrupts = <94>; | |
490 | ti,hwmods = "timer6"; | |
491 | ti,timer-pwm; | |
492 | }; | |
493 | ||
494 | timer7: timer@4804a000 { | |
002e1ec5 | 495 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
496 | reg = <0x4804a000 0x400>; |
497 | interrupts = <95>; | |
498 | ti,hwmods = "timer7"; | |
499 | ti,timer-pwm; | |
500 | }; | |
0d935c16 | 501 | |
ccd8b9e0 | 502 | rtc: rtc@44e3e000 { |
6ac7b4a2 | 503 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
0d935c16 AM |
504 | reg = <0x44e3e000 0x1000>; |
505 | interrupts = <75 | |
506 | 76>; | |
507 | ti,hwmods = "rtc"; | |
508 | }; | |
9fd3c748 PA |
509 | |
510 | spi0: spi@48030000 { | |
511 | compatible = "ti,omap4-mcspi"; | |
512 | #address-cells = <1>; | |
513 | #size-cells = <0>; | |
514 | reg = <0x48030000 0x400>; | |
7b3754c6 | 515 | interrupts = <65>; |
9fd3c748 PA |
516 | ti,spi-num-cs = <2>; |
517 | ti,hwmods = "spi0"; | |
b5e50906 PU |
518 | dmas = <&edma 16 0 |
519 | &edma 17 0 | |
520 | &edma 18 0 | |
521 | &edma 19 0>; | |
f5e2f807 | 522 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
523 | status = "disabled"; |
524 | }; | |
525 | ||
526 | spi1: spi@481a0000 { | |
527 | compatible = "ti,omap4-mcspi"; | |
528 | #address-cells = <1>; | |
529 | #size-cells = <0>; | |
530 | reg = <0x481a0000 0x400>; | |
7b3754c6 | 531 | interrupts = <125>; |
9fd3c748 PA |
532 | ti,spi-num-cs = <2>; |
533 | ti,hwmods = "spi1"; | |
b5e50906 PU |
534 | dmas = <&edma 42 0 |
535 | &edma 43 0 | |
536 | &edma 44 0 | |
537 | &edma 45 0>; | |
f5e2f807 | 538 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
539 | status = "disabled"; |
540 | }; | |
35b47fbb | 541 | |
97238b35 SAS |
542 | usb: usb@47400000 { |
543 | compatible = "ti,am33xx-usb"; | |
544 | reg = <0x47400000 0x1000>; | |
545 | ranges; | |
546 | #address-cells = <1>; | |
547 | #size-cells = <1>; | |
35b47fbb | 548 | ti,hwmods = "usb_otg_hs"; |
97238b35 SAS |
549 | status = "disabled"; |
550 | ||
8abcdd68 | 551 | usb_ctrl_mod: control@44e10620 { |
97238b35 SAS |
552 | compatible = "ti,am335x-usb-ctrl-module"; |
553 | reg = <0x44e10620 0x10 | |
554 | 0x44e10648 0x4>; | |
555 | reg-names = "phy_ctrl", "wakeup"; | |
556 | status = "disabled"; | |
557 | }; | |
558 | ||
c031a7d4 | 559 | usb0_phy: usb-phy@47401300 { |
97238b35 SAS |
560 | compatible = "ti,am335x-usb-phy"; |
561 | reg = <0x47401300 0x100>; | |
562 | reg-names = "phy"; | |
563 | status = "disabled"; | |
e7243b76 | 564 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
565 | }; |
566 | ||
567 | usb0: usb@47401000 { | |
568 | compatible = "ti,musb-am33xx"; | |
97238b35 | 569 | status = "disabled"; |
c031a7d4 SAS |
570 | reg = <0x47401400 0x400 |
571 | 0x47401000 0x200>; | |
572 | reg-names = "mc", "control"; | |
573 | ||
574 | interrupts = <18>; | |
575 | interrupt-names = "mc"; | |
576 | dr_mode = "otg"; | |
577 | mentor,multipoint = <1>; | |
578 | mentor,num-eps = <16>; | |
579 | mentor,ram-bits = <12>; | |
580 | mentor,power = <500>; | |
581 | phys = <&usb0_phy>; | |
9b3452d1 SAS |
582 | |
583 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
584 | &cppi41dma 2 0 &cppi41dma 3 0 | |
585 | &cppi41dma 4 0 &cppi41dma 5 0 | |
586 | &cppi41dma 6 0 &cppi41dma 7 0 | |
587 | &cppi41dma 8 0 &cppi41dma 9 0 | |
588 | &cppi41dma 10 0 &cppi41dma 11 0 | |
589 | &cppi41dma 12 0 &cppi41dma 13 0 | |
590 | &cppi41dma 14 0 &cppi41dma 0 1 | |
591 | &cppi41dma 1 1 &cppi41dma 2 1 | |
592 | &cppi41dma 3 1 &cppi41dma 4 1 | |
593 | &cppi41dma 5 1 &cppi41dma 6 1 | |
594 | &cppi41dma 7 1 &cppi41dma 8 1 | |
595 | &cppi41dma 9 1 &cppi41dma 10 1 | |
596 | &cppi41dma 11 1 &cppi41dma 12 1 | |
597 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
598 | dma-names = | |
599 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
600 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
601 | "rx14", "rx15", | |
602 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
603 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
604 | "tx14", "tx15"; | |
97238b35 SAS |
605 | }; |
606 | ||
c031a7d4 | 607 | usb1_phy: usb-phy@47401b00 { |
97238b35 SAS |
608 | compatible = "ti,am335x-usb-phy"; |
609 | reg = <0x47401b00 0x100>; | |
610 | reg-names = "phy"; | |
611 | status = "disabled"; | |
e7243b76 | 612 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
613 | }; |
614 | ||
615 | usb1: usb@47401800 { | |
616 | compatible = "ti,musb-am33xx"; | |
97238b35 | 617 | status = "disabled"; |
c031a7d4 SAS |
618 | reg = <0x47401c00 0x400 |
619 | 0x47401800 0x200>; | |
620 | reg-names = "mc", "control"; | |
621 | interrupts = <19>; | |
622 | interrupt-names = "mc"; | |
623 | dr_mode = "otg"; | |
624 | mentor,multipoint = <1>; | |
625 | mentor,num-eps = <16>; | |
626 | mentor,ram-bits = <12>; | |
627 | mentor,power = <500>; | |
628 | phys = <&usb1_phy>; | |
9b3452d1 SAS |
629 | |
630 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
631 | &cppi41dma 17 0 &cppi41dma 18 0 | |
632 | &cppi41dma 19 0 &cppi41dma 20 0 | |
633 | &cppi41dma 21 0 &cppi41dma 22 0 | |
634 | &cppi41dma 23 0 &cppi41dma 24 0 | |
635 | &cppi41dma 25 0 &cppi41dma 26 0 | |
636 | &cppi41dma 27 0 &cppi41dma 28 0 | |
637 | &cppi41dma 29 0 &cppi41dma 15 1 | |
638 | &cppi41dma 16 1 &cppi41dma 17 1 | |
639 | &cppi41dma 18 1 &cppi41dma 19 1 | |
640 | &cppi41dma 20 1 &cppi41dma 21 1 | |
641 | &cppi41dma 22 1 &cppi41dma 23 1 | |
642 | &cppi41dma 24 1 &cppi41dma 25 1 | |
643 | &cppi41dma 26 1 &cppi41dma 27 1 | |
644 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
645 | dma-names = | |
646 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
647 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
648 | "rx14", "rx15", | |
649 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
650 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
651 | "tx14", "tx15"; | |
97238b35 | 652 | }; |
9b3452d1 | 653 | |
8abcdd68 | 654 | cppi41dma: dma-controller@47402000 { |
9b3452d1 SAS |
655 | compatible = "ti,am3359-cppi41"; |
656 | reg = <0x47400000 0x1000 | |
657 | 0x47402000 0x1000 | |
658 | 0x47403000 0x1000 | |
659 | 0x47404000 0x4000>; | |
3b6394b4 | 660 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
9b3452d1 SAS |
661 | interrupts = <17>; |
662 | interrupt-names = "glue"; | |
663 | #dma-cells = <2>; | |
664 | #dma-channels = <30>; | |
665 | #dma-requests = <256>; | |
666 | status = "disabled"; | |
667 | }; | |
35b47fbb | 668 | }; |
6be35c70 | 669 | |
0a7486c9 PA |
670 | epwmss0: epwmss@48300000 { |
671 | compatible = "ti,am33xx-pwmss"; | |
672 | reg = <0x48300000 0x10>; | |
673 | ti,hwmods = "epwmss0"; | |
674 | #address-cells = <1>; | |
675 | #size-cells = <1>; | |
676 | status = "disabled"; | |
677 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
678 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
679 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
680 | ||
681 | ecap0: ecap@48300100 { | |
682 | compatible = "ti,am33xx-ecap"; | |
683 | #pwm-cells = <3>; | |
684 | reg = <0x48300100 0x80>; | |
e8c85a3e MP |
685 | interrupts = <31>; |
686 | interrupt-names = "ecap0"; | |
0a7486c9 PA |
687 | ti,hwmods = "ecap0"; |
688 | status = "disabled"; | |
689 | }; | |
690 | ||
dce2a652 | 691 | ehrpwm0: pwm@48300200 { |
0a7486c9 PA |
692 | compatible = "ti,am33xx-ehrpwm"; |
693 | #pwm-cells = <3>; | |
694 | reg = <0x48300200 0x80>; | |
695 | ti,hwmods = "ehrpwm0"; | |
696 | status = "disabled"; | |
697 | }; | |
698 | }; | |
699 | ||
700 | epwmss1: epwmss@48302000 { | |
701 | compatible = "ti,am33xx-pwmss"; | |
702 | reg = <0x48302000 0x10>; | |
703 | ti,hwmods = "epwmss1"; | |
704 | #address-cells = <1>; | |
705 | #size-cells = <1>; | |
706 | status = "disabled"; | |
707 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
708 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
709 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
710 | ||
711 | ecap1: ecap@48302100 { | |
712 | compatible = "ti,am33xx-ecap"; | |
713 | #pwm-cells = <3>; | |
714 | reg = <0x48302100 0x80>; | |
e8c85a3e MP |
715 | interrupts = <47>; |
716 | interrupt-names = "ecap1"; | |
0a7486c9 PA |
717 | ti,hwmods = "ecap1"; |
718 | status = "disabled"; | |
719 | }; | |
720 | ||
dce2a652 | 721 | ehrpwm1: pwm@48302200 { |
0a7486c9 PA |
722 | compatible = "ti,am33xx-ehrpwm"; |
723 | #pwm-cells = <3>; | |
724 | reg = <0x48302200 0x80>; | |
725 | ti,hwmods = "ehrpwm1"; | |
726 | status = "disabled"; | |
727 | }; | |
728 | }; | |
729 | ||
730 | epwmss2: epwmss@48304000 { | |
731 | compatible = "ti,am33xx-pwmss"; | |
732 | reg = <0x48304000 0x10>; | |
733 | ti,hwmods = "epwmss2"; | |
734 | #address-cells = <1>; | |
735 | #size-cells = <1>; | |
736 | status = "disabled"; | |
737 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
738 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
739 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
740 | ||
741 | ecap2: ecap@48304100 { | |
742 | compatible = "ti,am33xx-ecap"; | |
743 | #pwm-cells = <3>; | |
744 | reg = <0x48304100 0x80>; | |
e8c85a3e MP |
745 | interrupts = <61>; |
746 | interrupt-names = "ecap2"; | |
0a7486c9 PA |
747 | ti,hwmods = "ecap2"; |
748 | status = "disabled"; | |
749 | }; | |
750 | ||
dce2a652 | 751 | ehrpwm2: pwm@48304200 { |
0a7486c9 PA |
752 | compatible = "ti,am33xx-ehrpwm"; |
753 | #pwm-cells = <3>; | |
754 | reg = <0x48304200 0x80>; | |
755 | ti,hwmods = "ehrpwm2"; | |
756 | status = "disabled"; | |
757 | }; | |
758 | }; | |
759 | ||
1a39a65c | 760 | mac: ethernet@4a100000 { |
21696f71 | 761 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
1a39a65c | 762 | ti,hwmods = "cpgmac0"; |
0987a6ef GC |
763 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
764 | clock-names = "fck", "cpts"; | |
1a39a65c M |
765 | cpdma_channels = <8>; |
766 | ale_entries = <1024>; | |
767 | bd_ram_size = <0x2000>; | |
768 | no_bd_ram = <0>; | |
769 | rx_descs = <64>; | |
770 | mac_control = <0x20>; | |
771 | slaves = <2>; | |
e86ac13b | 772 | active_slave = <0>; |
1a39a65c M |
773 | cpts_clock_mult = <0x80000000>; |
774 | cpts_clock_shift = <29>; | |
775 | reg = <0x4a100000 0x800 | |
776 | 0x4a101200 0x100>; | |
777 | #address-cells = <1>; | |
778 | #size-cells = <1>; | |
779 | interrupt-parent = <&intc>; | |
780 | /* | |
781 | * c0_rx_thresh_pend | |
782 | * c0_rx_pend | |
783 | * c0_tx_pend | |
784 | * c0_misc_pend | |
785 | */ | |
786 | interrupts = <40 41 42 43>; | |
787 | ranges; | |
e3bc5358 | 788 | syscon = <&scm_conf>; |
16c75a13 | 789 | status = "disabled"; |
1a39a65c M |
790 | |
791 | davinci_mdio: mdio@4a101000 { | |
792 | compatible = "ti,davinci_mdio"; | |
793 | #address-cells = <1>; | |
794 | #size-cells = <0>; | |
795 | ti,hwmods = "davinci_mdio"; | |
796 | bus_freq = <1000000>; | |
797 | reg = <0x4a101000 0x100>; | |
16c75a13 | 798 | status = "disabled"; |
1a39a65c M |
799 | }; |
800 | ||
801 | cpsw_emac0: slave@4a100200 { | |
802 | /* Filled in by U-Boot */ | |
803 | mac-address = [ 00 00 00 00 00 00 ]; | |
804 | }; | |
805 | ||
806 | cpsw_emac1: slave@4a100300 { | |
807 | /* Filled in by U-Boot */ | |
808 | mac-address = [ 00 00 00 00 00 00 ]; | |
809 | }; | |
39ffbd91 M |
810 | |
811 | phy_sel: cpsw-phy-sel@44e10650 { | |
812 | compatible = "ti,am3352-cpsw-phy-sel"; | |
813 | reg= <0x44e10650 0x4>; | |
814 | reg-names = "gmii-sel"; | |
815 | }; | |
1a39a65c | 816 | }; |
f6575c90 VB |
817 | |
818 | ocmcram: ocmcram@40300000 { | |
8b9a2810 RN |
819 | compatible = "mmio-sram"; |
820 | reg = <0x40300000 0x10000>; /* 64k */ | |
f6575c90 VB |
821 | }; |
822 | ||
15e8246b PA |
823 | elm: elm@48080000 { |
824 | compatible = "ti,am3352-elm"; | |
825 | reg = <0x48080000 0x2000>; | |
826 | interrupts = <4>; | |
827 | ti,hwmods = "elm"; | |
d6cfc1e2 BP |
828 | status = "disabled"; |
829 | }; | |
830 | ||
831 | lcdc: lcdc@4830e000 { | |
832 | compatible = "ti,am33xx-tilcdc"; | |
833 | reg = <0x4830e000 0x1000>; | |
834 | interrupt-parent = <&intc>; | |
835 | interrupts = <36>; | |
836 | ti,hwmods = "lcdc"; | |
15e8246b PA |
837 | status = "disabled"; |
838 | }; | |
839 | ||
a82279dd PR |
840 | tscadc: tscadc@44e0d000 { |
841 | compatible = "ti,am3359-tscadc"; | |
842 | reg = <0x44e0d000 0x1000>; | |
843 | interrupt-parent = <&intc>; | |
844 | interrupts = <16>; | |
845 | ti,hwmods = "adc_tsc"; | |
846 | status = "disabled"; | |
847 | ||
848 | tsc { | |
849 | compatible = "ti,am3359-tsc"; | |
850 | }; | |
851 | am335x_adc: adc { | |
852 | #io-channel-cells = <1>; | |
853 | compatible = "ti,am3359-adc"; | |
854 | }; | |
a82279dd PR |
855 | }; |
856 | ||
e45879ec PA |
857 | gpmc: gpmc@50000000 { |
858 | compatible = "ti,am3352-gpmc"; | |
859 | ti,hwmods = "gpmc"; | |
f12ecbe2 | 860 | ti,no-idle-on-init; |
e45879ec PA |
861 | reg = <0x50000000 0x2000>; |
862 | interrupts = <100>; | |
a2abf904 | 863 | dmas = <&edma 52 0>; |
201c7e33 | 864 | dma-names = "rxtx"; |
00dddcaa LP |
865 | gpmc,num-cs = <7>; |
866 | gpmc,num-waitpins = <2>; | |
e45879ec PA |
867 | #address-cells = <2>; |
868 | #size-cells = <1>; | |
03752148 RQ |
869 | interrupt-controller; |
870 | #interrupt-cells = <2>; | |
4eb4dd57 RQ |
871 | gpio-controller; |
872 | #gpio-cells = <2>; | |
e45879ec PA |
873 | status = "disabled"; |
874 | }; | |
f8302e1e MG |
875 | |
876 | sham: sham@53100000 { | |
877 | compatible = "ti,omap4-sham"; | |
878 | ti,hwmods = "sham"; | |
879 | reg = <0x53100000 0x200>; | |
880 | interrupts = <109>; | |
b5e50906 | 881 | dmas = <&edma 36 0>; |
f8302e1e MG |
882 | dma-names = "rx"; |
883 | }; | |
99919e5e MG |
884 | |
885 | aes: aes@53500000 { | |
886 | compatible = "ti,omap4-aes"; | |
887 | ti,hwmods = "aes"; | |
888 | reg = <0x53500000 0xa0>; | |
7af8884a | 889 | interrupts = <103>; |
b5e50906 PU |
890 | dmas = <&edma 6 0>, |
891 | <&edma 5 0>; | |
99919e5e MG |
892 | dma-names = "tx", "rx"; |
893 | }; | |
3f72f875 PA |
894 | |
895 | mcasp0: mcasp@48038000 { | |
896 | compatible = "ti,am33xx-mcasp-audio"; | |
897 | ti,hwmods = "mcasp0"; | |
0bee55ab JS |
898 | reg = <0x48038000 0x2000>, |
899 | <0x46000000 0x400000>; | |
900 | reg-names = "mpu", "dat"; | |
3f72f875 | 901 | interrupts = <80>, <81>; |
ae107d06 | 902 | interrupt-names = "tx", "rx"; |
3f72f875 | 903 | status = "disabled"; |
b5e50906 PU |
904 | dmas = <&edma 8 2>, |
905 | <&edma 9 2>; | |
3f72f875 PA |
906 | dma-names = "tx", "rx"; |
907 | }; | |
908 | ||
909 | mcasp1: mcasp@4803C000 { | |
910 | compatible = "ti,am33xx-mcasp-audio"; | |
911 | ti,hwmods = "mcasp1"; | |
0bee55ab JS |
912 | reg = <0x4803C000 0x2000>, |
913 | <0x46400000 0x400000>; | |
914 | reg-names = "mpu", "dat"; | |
3f72f875 | 915 | interrupts = <82>, <83>; |
ae107d06 | 916 | interrupt-names = "tx", "rx"; |
3f72f875 | 917 | status = "disabled"; |
b5e50906 PU |
918 | dmas = <&edma 10 2>, |
919 | <&edma 11 2>; | |
3f72f875 PA |
920 | dma-names = "tx", "rx"; |
921 | }; | |
ed845d6b LV |
922 | |
923 | rng: rng@48310000 { | |
924 | compatible = "ti,omap4-rng"; | |
925 | ti,hwmods = "rng"; | |
926 | reg = <0x48310000 0x2000>; | |
927 | interrupts = <111>; | |
928 | }; | |
5fc0b42a AC |
929 | }; |
930 | }; | |
ea291c98 TK |
931 | |
932 | /include/ "am33xx-clocks.dtsi" |