Commit | Line | Data |
---|---|---|
5fc0b42a AC |
1 | /* |
2 | * Device Tree Source for AM33XX SoC | |
3 | * | |
4 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
e94233c2 | 11 | #include <dt-bindings/gpio/gpio.h> |
6a8a6b65 | 12 | #include <dt-bindings/pinctrl/am33xx.h> |
e94233c2 | 13 | |
eb33ef66 | 14 | #include "skeleton.dtsi" |
5fc0b42a AC |
15 | |
16 | / { | |
17 | compatible = "ti,am33xx"; | |
4c94ac29 | 18 | interrupt-parent = <&intc>; |
5fc0b42a AC |
19 | |
20 | aliases { | |
6a968678 NM |
21 | i2c0 = &i2c0; |
22 | i2c1 = &i2c1; | |
23 | i2c2 = &i2c2; | |
dde3b0d6 VH |
24 | serial0 = &uart0; |
25 | serial1 = &uart1; | |
26 | serial2 = &uart2; | |
27 | serial3 = &uart3; | |
28 | serial4 = &uart4; | |
29 | serial5 = &uart5; | |
7a57ee87 AC |
30 | d_can0 = &dcan0; |
31 | d_can1 = &dcan1; | |
97238b35 SAS |
32 | usb0 = &usb0; |
33 | usb1 = &usb1; | |
34 | phy0 = &usb0_phy; | |
35 | phy1 = &usb1_phy; | |
8170056d DM |
36 | ethernet0 = &cpsw_emac0; |
37 | ethernet1 = &cpsw_emac1; | |
5fc0b42a AC |
38 | }; |
39 | ||
40 | cpus { | |
2e0d513f LP |
41 | #address-cells = <1>; |
42 | #size-cells = <0>; | |
5fc0b42a AC |
43 | cpu@0 { |
44 | compatible = "arm,cortex-a8"; | |
2e0d513f LP |
45 | device_type = "cpu"; |
46 | reg = <0>; | |
efeedcf2 | 47 | |
4317be11 DG |
48 | operating-points-v2 = <&cpu0_opp_table>; |
49 | ti,syscon-efuse = <&scm_conf 0x7fc 0x1fff 0>; | |
50 | ti,syscon-rev = <&scm_conf 0x600>; | |
8d766fa2 NM |
51 | |
52 | clocks = <&dpll_mpu_ck>; | |
53 | clock-names = "cpu"; | |
54 | ||
efeedcf2 | 55 | clock-latency = <300000>; /* From omap-cpufreq driver */ |
5fc0b42a AC |
56 | }; |
57 | }; | |
58 | ||
4317be11 DG |
59 | cpu0_opp_table: opp_table0 { |
60 | compatible = "operating-points-v2"; | |
61 | ||
62 | /* | |
63 | * The three following nodes are marked with opp-suspend | |
64 | * because the can not be enabled simultaneously on a | |
65 | * single SoC. | |
66 | */ | |
67 | opp50@300000000 { | |
68 | opp-hz = /bits/ 64 <300000000>; | |
69 | opp-microvolt = <950000 931000 969000>; | |
70 | opp-supported-hw = <0x06 0x0010>; | |
71 | opp-suspend; | |
72 | }; | |
73 | ||
74 | opp100@275000000 { | |
75 | opp-hz = /bits/ 64 <275000000>; | |
76 | opp-microvolt = <1100000 1078000 1122000>; | |
77 | opp-supported-hw = <0x01 0x00FF>; | |
78 | opp-suspend; | |
79 | }; | |
80 | ||
81 | opp100@300000000 { | |
82 | opp-hz = /bits/ 64 <300000000>; | |
83 | opp-microvolt = <1100000 1078000 1122000>; | |
84 | opp-supported-hw = <0x06 0x0020>; | |
85 | opp-suspend; | |
86 | }; | |
87 | ||
88 | opp100@500000000 { | |
89 | opp-hz = /bits/ 64 <500000000>; | |
90 | opp-microvolt = <1100000 1078000 1122000>; | |
91 | opp-supported-hw = <0x01 0xFFFF>; | |
92 | }; | |
93 | ||
94 | opp100@600000000 { | |
95 | opp-hz = /bits/ 64 <600000000>; | |
96 | opp-microvolt = <1100000 1078000 1122000>; | |
97 | opp-supported-hw = <0x06 0x0040>; | |
98 | }; | |
99 | ||
100 | opp120@600000000 { | |
101 | opp-hz = /bits/ 64 <600000000>; | |
102 | opp-microvolt = <1200000 1176000 1224000>; | |
103 | opp-supported-hw = <0x01 0xFFFF>; | |
104 | }; | |
105 | ||
106 | opp120@720000000 { | |
107 | opp-hz = /bits/ 64 <720000000>; | |
108 | opp-microvolt = <1200000 1176000 1224000>; | |
109 | opp-supported-hw = <0x06 0x0080>; | |
110 | }; | |
111 | ||
112 | oppturbo@720000000 { | |
113 | opp-hz = /bits/ 64 <720000000>; | |
114 | opp-microvolt = <1260000 1234800 1285200>; | |
115 | opp-supported-hw = <0x01 0xFFFF>; | |
116 | }; | |
117 | ||
118 | oppturbo@800000000 { | |
119 | opp-hz = /bits/ 64 <800000000>; | |
120 | opp-microvolt = <1260000 1234800 1285200>; | |
121 | opp-supported-hw = <0x06 0x0100>; | |
122 | }; | |
123 | ||
124 | oppnitro@1000000000 { | |
125 | opp-hz = /bits/ 64 <1000000000>; | |
126 | opp-microvolt = <1325000 1298500 1351500>; | |
127 | opp-supported-hw = <0x04 0x0200>; | |
128 | }; | |
129 | }; | |
130 | ||
6797cdbe AB |
131 | pmu { |
132 | compatible = "arm,cortex-a8-pmu"; | |
133 | interrupts = <3>; | |
134 | }; | |
135 | ||
5fc0b42a | 136 | /* |
5c5be9db | 137 | * The soc node represents the soc top level view. It is used for IPs |
5fc0b42a AC |
138 | * that are not memory mapped in the MPU view or for the MPU itself. |
139 | */ | |
140 | soc { | |
141 | compatible = "ti,omap-infra"; | |
142 | mpu { | |
143 | compatible = "ti,omap3-mpu"; | |
144 | ti,hwmods = "mpu"; | |
145 | }; | |
146 | }; | |
147 | ||
148 | /* | |
149 | * XXX: Use a flat representation of the AM33XX interconnect. | |
b7ab524b GU |
150 | * The real AM33XX interconnect network is quite complex. Since |
151 | * it will not bring real advantage to represent that in DT | |
5fc0b42a AC |
152 | * for the moment, just use a fake OCP bus entry to represent |
153 | * the whole bus hierarchy. | |
154 | */ | |
155 | ocp { | |
156 | compatible = "simple-bus"; | |
157 | #address-cells = <1>; | |
158 | #size-cells = <1>; | |
159 | ranges; | |
160 | ti,hwmods = "l3_main"; | |
161 | ||
e3bc5358 TK |
162 | l4_wkup: l4_wkup@44c00000 { |
163 | compatible = "ti,am3-l4-wkup", "simple-bus"; | |
164 | #address-cells = <1>; | |
165 | #size-cells = <1>; | |
166 | ranges = <0 0x44c00000 0x280000>; | |
ea291c98 | 167 | |
d129be27 SA |
168 | wkup_m3: wkup_m3@100000 { |
169 | compatible = "ti,am3352-wkup-m3"; | |
170 | reg = <0x100000 0x4000>, | |
171 | <0x180000 0x2000>; | |
172 | reg-names = "umem", "dmem"; | |
173 | ti,hwmods = "wkup_m3"; | |
174 | ti,pm-firmware = "am335x-pm-firmware.elf"; | |
175 | }; | |
176 | ||
e3bc5358 TK |
177 | prcm: prcm@200000 { |
178 | compatible = "ti,am3-prcm"; | |
179 | reg = <0x200000 0x4000>; | |
ea291c98 | 180 | |
e3bc5358 TK |
181 | prcm_clocks: clocks { |
182 | #address-cells = <1>; | |
183 | #size-cells = <0>; | |
184 | }; | |
ea291c98 | 185 | |
e3bc5358 TK |
186 | prcm_clockdomains: clockdomains { |
187 | }; | |
ea291c98 TK |
188 | }; |
189 | ||
e3bc5358 TK |
190 | scm: scm@210000 { |
191 | compatible = "ti,am3-scm", "simple-bus"; | |
192 | reg = <0x210000 0x2000>; | |
193 | #address-cells = <1>; | |
194 | #size-cells = <1>; | |
195 | ranges = <0 0x210000 0x2000>; | |
196 | ||
197 | am33xx_pinmux: pinmux@800 { | |
198 | compatible = "pinctrl-single"; | |
199 | reg = <0x800 0x238>; | |
200 | #address-cells = <1>; | |
201 | #size-cells = <0>; | |
202 | pinctrl-single,register-width = <32>; | |
203 | pinctrl-single,function-mask = <0x7f>; | |
204 | }; | |
205 | ||
206 | scm_conf: scm_conf@0 { | |
207 | compatible = "syscon"; | |
208 | reg = <0x0 0x800>; | |
209 | #address-cells = <1>; | |
210 | #size-cells = <1>; | |
211 | ||
212 | scm_clocks: clocks { | |
213 | #address-cells = <1>; | |
214 | #size-cells = <0>; | |
215 | }; | |
216 | }; | |
217 | ||
99937129 SA |
218 | wkup_m3_ipc: wkup_m3_ipc@1324 { |
219 | compatible = "ti,am3352-wkup-m3-ipc"; | |
220 | reg = <0x1324 0x24>; | |
221 | interrupts = <78>; | |
222 | ti,rproc = <&wkup_m3>; | |
223 | mboxes = <&mailbox &mbox_wkupm3>; | |
224 | }; | |
225 | ||
b5e50906 PU |
226 | edma_xbar: dma-router@f90 { |
227 | compatible = "ti,am335x-edma-crossbar"; | |
228 | reg = <0xf90 0x40>; | |
229 | #dma-cells = <3>; | |
230 | dma-requests = <32>; | |
231 | dma-masters = <&edma>; | |
232 | }; | |
233 | ||
e3bc5358 TK |
234 | scm_clockdomains: clockdomains { |
235 | }; | |
ea291c98 TK |
236 | }; |
237 | }; | |
238 | ||
5fc0b42a | 239 | intc: interrupt-controller@48200000 { |
cab82b76 | 240 | compatible = "ti,am33xx-intc"; |
5fc0b42a AC |
241 | interrupt-controller; |
242 | #interrupt-cells = <1>; | |
5fc0b42a AC |
243 | reg = <0x48200000 0x1000>; |
244 | }; | |
245 | ||
505975d3 | 246 | edma: edma@49000000 { |
b5e50906 PU |
247 | compatible = "ti,edma3-tpcc"; |
248 | ti,hwmods = "tpcc"; | |
249 | reg = <0x49000000 0x10000>; | |
250 | reg-names = "edma3_cc"; | |
505975d3 | 251 | interrupts = <12 13 14>; |
a5206553 | 252 | interrupt-names = "edma3_ccint", "edma3_mperr", |
b5e50906 PU |
253 | "edma3_ccerrint"; |
254 | dma-requests = <64>; | |
255 | #dma-cells = <2>; | |
256 | ||
257 | ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, | |
258 | <&edma_tptc2 0>; | |
259 | ||
260 | ti,edma-memcpy-channels = <20 21>; | |
261 | }; | |
262 | ||
263 | edma_tptc0: tptc@49800000 { | |
264 | compatible = "ti,edma3-tptc"; | |
265 | ti,hwmods = "tptc0"; | |
266 | reg = <0x49800000 0x100000>; | |
267 | interrupts = <112>; | |
268 | interrupt-names = "edma3_tcerrint"; | |
269 | }; | |
270 | ||
271 | edma_tptc1: tptc@49900000 { | |
272 | compatible = "ti,edma3-tptc"; | |
273 | ti,hwmods = "tptc1"; | |
274 | reg = <0x49900000 0x100000>; | |
275 | interrupts = <113>; | |
276 | interrupt-names = "edma3_tcerrint"; | |
277 | }; | |
278 | ||
279 | edma_tptc2: tptc@49a00000 { | |
280 | compatible = "ti,edma3-tptc"; | |
281 | ti,hwmods = "tptc2"; | |
282 | reg = <0x49a00000 0x100000>; | |
283 | interrupts = <114>; | |
284 | interrupt-names = "edma3_tcerrint"; | |
505975d3 MP |
285 | }; |
286 | ||
b918e2c0 | 287 | gpio0: gpio@44e07000 { |
5fc0b42a AC |
288 | compatible = "ti,omap4-gpio"; |
289 | ti,hwmods = "gpio1"; | |
290 | gpio-controller; | |
291 | #gpio-cells = <2>; | |
292 | interrupt-controller; | |
5eac0eb7 | 293 | #interrupt-cells = <2>; |
4462b31c | 294 | reg = <0x44e07000 0x1000>; |
4462b31c | 295 | interrupts = <96>; |
5fc0b42a AC |
296 | }; |
297 | ||
b918e2c0 | 298 | gpio1: gpio@4804c000 { |
5fc0b42a AC |
299 | compatible = "ti,omap4-gpio"; |
300 | ti,hwmods = "gpio2"; | |
301 | gpio-controller; | |
302 | #gpio-cells = <2>; | |
303 | interrupt-controller; | |
5eac0eb7 | 304 | #interrupt-cells = <2>; |
4462b31c | 305 | reg = <0x4804c000 0x1000>; |
4462b31c | 306 | interrupts = <98>; |
5fc0b42a AC |
307 | }; |
308 | ||
b918e2c0 | 309 | gpio2: gpio@481ac000 { |
5fc0b42a AC |
310 | compatible = "ti,omap4-gpio"; |
311 | ti,hwmods = "gpio3"; | |
312 | gpio-controller; | |
313 | #gpio-cells = <2>; | |
314 | interrupt-controller; | |
5eac0eb7 | 315 | #interrupt-cells = <2>; |
4462b31c | 316 | reg = <0x481ac000 0x1000>; |
4462b31c | 317 | interrupts = <32>; |
5fc0b42a AC |
318 | }; |
319 | ||
b918e2c0 | 320 | gpio3: gpio@481ae000 { |
5fc0b42a AC |
321 | compatible = "ti,omap4-gpio"; |
322 | ti,hwmods = "gpio4"; | |
323 | gpio-controller; | |
324 | #gpio-cells = <2>; | |
325 | interrupt-controller; | |
5eac0eb7 | 326 | #interrupt-cells = <2>; |
4462b31c | 327 | reg = <0x481ae000 0x1000>; |
4462b31c | 328 | interrupts = <62>; |
5fc0b42a AC |
329 | }; |
330 | ||
dde3b0d6 | 331 | uart0: serial@44e09000 { |
4fcdff9b | 332 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
333 | ti,hwmods = "uart1"; |
334 | clock-frequency = <48000000>; | |
4462b31c | 335 | reg = <0x44e09000 0x2000>; |
4462b31c | 336 | interrupts = <72>; |
53d91034 | 337 | status = "disabled"; |
b5e50906 | 338 | dmas = <&edma 26 0>, <&edma 27 0>; |
13fd3d57 | 339 | dma-names = "tx", "rx"; |
5fc0b42a AC |
340 | }; |
341 | ||
dde3b0d6 | 342 | uart1: serial@48022000 { |
4fcdff9b | 343 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
344 | ti,hwmods = "uart2"; |
345 | clock-frequency = <48000000>; | |
4462b31c | 346 | reg = <0x48022000 0x2000>; |
4462b31c | 347 | interrupts = <73>; |
53d91034 | 348 | status = "disabled"; |
b5e50906 | 349 | dmas = <&edma 28 0>, <&edma 29 0>; |
13fd3d57 | 350 | dma-names = "tx", "rx"; |
5fc0b42a AC |
351 | }; |
352 | ||
dde3b0d6 | 353 | uart2: serial@48024000 { |
4fcdff9b | 354 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
355 | ti,hwmods = "uart3"; |
356 | clock-frequency = <48000000>; | |
4462b31c | 357 | reg = <0x48024000 0x2000>; |
4462b31c | 358 | interrupts = <74>; |
53d91034 | 359 | status = "disabled"; |
b5e50906 | 360 | dmas = <&edma 30 0>, <&edma 31 0>; |
13fd3d57 | 361 | dma-names = "tx", "rx"; |
5fc0b42a AC |
362 | }; |
363 | ||
dde3b0d6 | 364 | uart3: serial@481a6000 { |
4fcdff9b | 365 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
366 | ti,hwmods = "uart4"; |
367 | clock-frequency = <48000000>; | |
4462b31c | 368 | reg = <0x481a6000 0x2000>; |
4462b31c | 369 | interrupts = <44>; |
53d91034 | 370 | status = "disabled"; |
5fc0b42a AC |
371 | }; |
372 | ||
dde3b0d6 | 373 | uart4: serial@481a8000 { |
4fcdff9b | 374 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
375 | ti,hwmods = "uart5"; |
376 | clock-frequency = <48000000>; | |
4462b31c | 377 | reg = <0x481a8000 0x2000>; |
4462b31c | 378 | interrupts = <45>; |
53d91034 | 379 | status = "disabled"; |
5fc0b42a AC |
380 | }; |
381 | ||
dde3b0d6 | 382 | uart5: serial@481aa000 { |
4fcdff9b | 383 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
5fc0b42a AC |
384 | ti,hwmods = "uart6"; |
385 | clock-frequency = <48000000>; | |
4462b31c | 386 | reg = <0x481aa000 0x2000>; |
4462b31c | 387 | interrupts = <46>; |
53d91034 | 388 | status = "disabled"; |
5fc0b42a AC |
389 | }; |
390 | ||
b918e2c0 | 391 | i2c0: i2c@44e0b000 { |
5fc0b42a AC |
392 | compatible = "ti,omap4-i2c"; |
393 | #address-cells = <1>; | |
394 | #size-cells = <0>; | |
395 | ti,hwmods = "i2c1"; | |
4462b31c | 396 | reg = <0x44e0b000 0x1000>; |
4462b31c | 397 | interrupts = <70>; |
53d91034 | 398 | status = "disabled"; |
5fc0b42a AC |
399 | }; |
400 | ||
b918e2c0 | 401 | i2c1: i2c@4802a000 { |
5fc0b42a AC |
402 | compatible = "ti,omap4-i2c"; |
403 | #address-cells = <1>; | |
404 | #size-cells = <0>; | |
405 | ti,hwmods = "i2c2"; | |
4462b31c | 406 | reg = <0x4802a000 0x1000>; |
4462b31c | 407 | interrupts = <71>; |
53d91034 | 408 | status = "disabled"; |
5fc0b42a AC |
409 | }; |
410 | ||
b918e2c0 | 411 | i2c2: i2c@4819c000 { |
5fc0b42a AC |
412 | compatible = "ti,omap4-i2c"; |
413 | #address-cells = <1>; | |
414 | #size-cells = <0>; | |
415 | ti,hwmods = "i2c3"; | |
4462b31c | 416 | reg = <0x4819c000 0x1000>; |
4462b31c | 417 | interrupts = <30>; |
53d91034 | 418 | status = "disabled"; |
5fc0b42a | 419 | }; |
5f789ebc | 420 | |
55b4452b MP |
421 | mmc1: mmc@48060000 { |
422 | compatible = "ti,omap4-hsmmc"; | |
423 | ti,hwmods = "mmc1"; | |
424 | ti,dual-volt; | |
425 | ti,needs-special-reset; | |
426 | ti,needs-special-hs-handling; | |
b5e50906 PU |
427 | dmas = <&edma_xbar 24 0 0 |
428 | &edma_xbar 25 0 0>; | |
55b4452b MP |
429 | dma-names = "tx", "rx"; |
430 | interrupts = <64>; | |
431 | interrupt-parent = <&intc>; | |
432 | reg = <0x48060000 0x1000>; | |
433 | status = "disabled"; | |
434 | }; | |
435 | ||
436 | mmc2: mmc@481d8000 { | |
437 | compatible = "ti,omap4-hsmmc"; | |
438 | ti,hwmods = "mmc2"; | |
439 | ti,needs-special-reset; | |
b5e50906 PU |
440 | dmas = <&edma 2 0 |
441 | &edma 3 0>; | |
55b4452b MP |
442 | dma-names = "tx", "rx"; |
443 | interrupts = <28>; | |
444 | interrupt-parent = <&intc>; | |
445 | reg = <0x481d8000 0x1000>; | |
446 | status = "disabled"; | |
447 | }; | |
448 | ||
449 | mmc3: mmc@47810000 { | |
450 | compatible = "ti,omap4-hsmmc"; | |
451 | ti,hwmods = "mmc3"; | |
452 | ti,needs-special-reset; | |
453 | interrupts = <29>; | |
454 | interrupt-parent = <&intc>; | |
455 | reg = <0x47810000 0x1000>; | |
456 | status = "disabled"; | |
457 | }; | |
458 | ||
d4cbe80d SA |
459 | hwspinlock: spinlock@480ca000 { |
460 | compatible = "ti,omap4-hwspinlock"; | |
461 | reg = <0x480ca000 0x1000>; | |
462 | ti,hwmods = "spinlock"; | |
34054213 | 463 | #hwlock-cells = <1>; |
d4cbe80d SA |
464 | }; |
465 | ||
5f789ebc AM |
466 | wdt2: wdt@44e35000 { |
467 | compatible = "ti,omap3-wdt"; | |
468 | ti,hwmods = "wd_timer2"; | |
4462b31c | 469 | reg = <0x44e35000 0x1000>; |
4462b31c | 470 | interrupts = <91>; |
5f789ebc | 471 | }; |
059b185d | 472 | |
e23aabc6 RQ |
473 | dcan0: can@481cc000 { |
474 | compatible = "ti,am3352-d_can"; | |
059b185d | 475 | ti,hwmods = "d_can0"; |
e23aabc6 RQ |
476 | reg = <0x481cc000 0x2000>; |
477 | clocks = <&dcan0_fck>; | |
478 | clock-names = "fck"; | |
e3bc5358 | 479 | syscon-raminit = <&scm_conf 0x644 0>; |
059b185d | 480 | interrupts = <52>; |
059b185d AC |
481 | status = "disabled"; |
482 | }; | |
483 | ||
e23aabc6 RQ |
484 | dcan1: can@481d0000 { |
485 | compatible = "ti,am3352-d_can"; | |
059b185d | 486 | ti,hwmods = "d_can1"; |
e23aabc6 RQ |
487 | reg = <0x481d0000 0x2000>; |
488 | clocks = <&dcan1_fck>; | |
489 | clock-names = "fck"; | |
e3bc5358 | 490 | syscon-raminit = <&scm_conf 0x644 1>; |
059b185d | 491 | interrupts = <55>; |
059b185d AC |
492 | status = "disabled"; |
493 | }; | |
fab8ad0b | 494 | |
40242301 SA |
495 | mailbox: mailbox@480C8000 { |
496 | compatible = "ti,omap4-mailbox"; | |
497 | reg = <0x480C8000 0x200>; | |
498 | interrupts = <77>; | |
499 | ti,hwmods = "mailbox"; | |
24df0453 | 500 | #mbox-cells = <1>; |
40242301 SA |
501 | ti,mbox-num-users = <4>; |
502 | ti,mbox-num-fifos = <8>; | |
d27704d1 | 503 | mbox_wkupm3: wkup_m3 { |
2800971f | 504 | ti,mbox-send-noirq; |
d27704d1 SA |
505 | ti,mbox-tx = <0 0 0>; |
506 | ti,mbox-rx = <0 0 3>; | |
507 | }; | |
40242301 SA |
508 | }; |
509 | ||
fab8ad0b | 510 | timer1: timer@44e31000 { |
002e1ec5 | 511 | compatible = "ti,am335x-timer-1ms"; |
fab8ad0b JH |
512 | reg = <0x44e31000 0x400>; |
513 | interrupts = <67>; | |
514 | ti,hwmods = "timer1"; | |
515 | ti,timer-alwon; | |
516 | }; | |
517 | ||
518 | timer2: timer@48040000 { | |
002e1ec5 | 519 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
520 | reg = <0x48040000 0x400>; |
521 | interrupts = <68>; | |
522 | ti,hwmods = "timer2"; | |
523 | }; | |
524 | ||
525 | timer3: timer@48042000 { | |
002e1ec5 | 526 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
527 | reg = <0x48042000 0x400>; |
528 | interrupts = <69>; | |
529 | ti,hwmods = "timer3"; | |
530 | }; | |
531 | ||
532 | timer4: timer@48044000 { | |
002e1ec5 | 533 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
534 | reg = <0x48044000 0x400>; |
535 | interrupts = <92>; | |
536 | ti,hwmods = "timer4"; | |
537 | ti,timer-pwm; | |
538 | }; | |
539 | ||
540 | timer5: timer@48046000 { | |
002e1ec5 | 541 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
542 | reg = <0x48046000 0x400>; |
543 | interrupts = <93>; | |
544 | ti,hwmods = "timer5"; | |
545 | ti,timer-pwm; | |
546 | }; | |
547 | ||
548 | timer6: timer@48048000 { | |
002e1ec5 | 549 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
550 | reg = <0x48048000 0x400>; |
551 | interrupts = <94>; | |
552 | ti,hwmods = "timer6"; | |
553 | ti,timer-pwm; | |
554 | }; | |
555 | ||
556 | timer7: timer@4804a000 { | |
002e1ec5 | 557 | compatible = "ti,am335x-timer"; |
fab8ad0b JH |
558 | reg = <0x4804a000 0x400>; |
559 | interrupts = <95>; | |
560 | ti,hwmods = "timer7"; | |
561 | ti,timer-pwm; | |
562 | }; | |
0d935c16 | 563 | |
ccd8b9e0 | 564 | rtc: rtc@44e3e000 { |
6ac7b4a2 | 565 | compatible = "ti,am3352-rtc", "ti,da830-rtc"; |
0d935c16 AM |
566 | reg = <0x44e3e000 0x1000>; |
567 | interrupts = <75 | |
568 | 76>; | |
569 | ti,hwmods = "rtc"; | |
570 | }; | |
9fd3c748 PA |
571 | |
572 | spi0: spi@48030000 { | |
573 | compatible = "ti,omap4-mcspi"; | |
574 | #address-cells = <1>; | |
575 | #size-cells = <0>; | |
576 | reg = <0x48030000 0x400>; | |
7b3754c6 | 577 | interrupts = <65>; |
9fd3c748 PA |
578 | ti,spi-num-cs = <2>; |
579 | ti,hwmods = "spi0"; | |
b5e50906 PU |
580 | dmas = <&edma 16 0 |
581 | &edma 17 0 | |
582 | &edma 18 0 | |
583 | &edma 19 0>; | |
f5e2f807 | 584 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
585 | status = "disabled"; |
586 | }; | |
587 | ||
588 | spi1: spi@481a0000 { | |
589 | compatible = "ti,omap4-mcspi"; | |
590 | #address-cells = <1>; | |
591 | #size-cells = <0>; | |
592 | reg = <0x481a0000 0x400>; | |
7b3754c6 | 593 | interrupts = <125>; |
9fd3c748 PA |
594 | ti,spi-num-cs = <2>; |
595 | ti,hwmods = "spi1"; | |
b5e50906 PU |
596 | dmas = <&edma 42 0 |
597 | &edma 43 0 | |
598 | &edma 44 0 | |
599 | &edma 45 0>; | |
f5e2f807 | 600 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
9fd3c748 PA |
601 | status = "disabled"; |
602 | }; | |
35b47fbb | 603 | |
97238b35 SAS |
604 | usb: usb@47400000 { |
605 | compatible = "ti,am33xx-usb"; | |
606 | reg = <0x47400000 0x1000>; | |
607 | ranges; | |
608 | #address-cells = <1>; | |
609 | #size-cells = <1>; | |
35b47fbb | 610 | ti,hwmods = "usb_otg_hs"; |
97238b35 SAS |
611 | status = "disabled"; |
612 | ||
8abcdd68 | 613 | usb_ctrl_mod: control@44e10620 { |
97238b35 SAS |
614 | compatible = "ti,am335x-usb-ctrl-module"; |
615 | reg = <0x44e10620 0x10 | |
616 | 0x44e10648 0x4>; | |
617 | reg-names = "phy_ctrl", "wakeup"; | |
618 | status = "disabled"; | |
619 | }; | |
620 | ||
c031a7d4 | 621 | usb0_phy: usb-phy@47401300 { |
97238b35 SAS |
622 | compatible = "ti,am335x-usb-phy"; |
623 | reg = <0x47401300 0x100>; | |
624 | reg-names = "phy"; | |
625 | status = "disabled"; | |
e7243b76 | 626 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
627 | }; |
628 | ||
629 | usb0: usb@47401000 { | |
630 | compatible = "ti,musb-am33xx"; | |
97238b35 | 631 | status = "disabled"; |
c031a7d4 SAS |
632 | reg = <0x47401400 0x400 |
633 | 0x47401000 0x200>; | |
634 | reg-names = "mc", "control"; | |
635 | ||
636 | interrupts = <18>; | |
637 | interrupt-names = "mc"; | |
638 | dr_mode = "otg"; | |
639 | mentor,multipoint = <1>; | |
640 | mentor,num-eps = <16>; | |
641 | mentor,ram-bits = <12>; | |
642 | mentor,power = <500>; | |
643 | phys = <&usb0_phy>; | |
9b3452d1 SAS |
644 | |
645 | dmas = <&cppi41dma 0 0 &cppi41dma 1 0 | |
646 | &cppi41dma 2 0 &cppi41dma 3 0 | |
647 | &cppi41dma 4 0 &cppi41dma 5 0 | |
648 | &cppi41dma 6 0 &cppi41dma 7 0 | |
649 | &cppi41dma 8 0 &cppi41dma 9 0 | |
650 | &cppi41dma 10 0 &cppi41dma 11 0 | |
651 | &cppi41dma 12 0 &cppi41dma 13 0 | |
652 | &cppi41dma 14 0 &cppi41dma 0 1 | |
653 | &cppi41dma 1 1 &cppi41dma 2 1 | |
654 | &cppi41dma 3 1 &cppi41dma 4 1 | |
655 | &cppi41dma 5 1 &cppi41dma 6 1 | |
656 | &cppi41dma 7 1 &cppi41dma 8 1 | |
657 | &cppi41dma 9 1 &cppi41dma 10 1 | |
658 | &cppi41dma 11 1 &cppi41dma 12 1 | |
659 | &cppi41dma 13 1 &cppi41dma 14 1>; | |
660 | dma-names = | |
661 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
662 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
663 | "rx14", "rx15", | |
664 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
665 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
666 | "tx14", "tx15"; | |
97238b35 SAS |
667 | }; |
668 | ||
c031a7d4 | 669 | usb1_phy: usb-phy@47401b00 { |
97238b35 SAS |
670 | compatible = "ti,am335x-usb-phy"; |
671 | reg = <0x47401b00 0x100>; | |
672 | reg-names = "phy"; | |
673 | status = "disabled"; | |
e7243b76 | 674 | ti,ctrl_mod = <&usb_ctrl_mod>; |
97238b35 SAS |
675 | }; |
676 | ||
677 | usb1: usb@47401800 { | |
678 | compatible = "ti,musb-am33xx"; | |
97238b35 | 679 | status = "disabled"; |
c031a7d4 SAS |
680 | reg = <0x47401c00 0x400 |
681 | 0x47401800 0x200>; | |
682 | reg-names = "mc", "control"; | |
683 | interrupts = <19>; | |
684 | interrupt-names = "mc"; | |
685 | dr_mode = "otg"; | |
686 | mentor,multipoint = <1>; | |
687 | mentor,num-eps = <16>; | |
688 | mentor,ram-bits = <12>; | |
689 | mentor,power = <500>; | |
690 | phys = <&usb1_phy>; | |
9b3452d1 SAS |
691 | |
692 | dmas = <&cppi41dma 15 0 &cppi41dma 16 0 | |
693 | &cppi41dma 17 0 &cppi41dma 18 0 | |
694 | &cppi41dma 19 0 &cppi41dma 20 0 | |
695 | &cppi41dma 21 0 &cppi41dma 22 0 | |
696 | &cppi41dma 23 0 &cppi41dma 24 0 | |
697 | &cppi41dma 25 0 &cppi41dma 26 0 | |
698 | &cppi41dma 27 0 &cppi41dma 28 0 | |
699 | &cppi41dma 29 0 &cppi41dma 15 1 | |
700 | &cppi41dma 16 1 &cppi41dma 17 1 | |
701 | &cppi41dma 18 1 &cppi41dma 19 1 | |
702 | &cppi41dma 20 1 &cppi41dma 21 1 | |
703 | &cppi41dma 22 1 &cppi41dma 23 1 | |
704 | &cppi41dma 24 1 &cppi41dma 25 1 | |
705 | &cppi41dma 26 1 &cppi41dma 27 1 | |
706 | &cppi41dma 28 1 &cppi41dma 29 1>; | |
707 | dma-names = | |
708 | "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7", | |
709 | "rx8", "rx9", "rx10", "rx11", "rx12", "rx13", | |
710 | "rx14", "rx15", | |
711 | "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7", | |
712 | "tx8", "tx9", "tx10", "tx11", "tx12", "tx13", | |
713 | "tx14", "tx15"; | |
97238b35 | 714 | }; |
9b3452d1 | 715 | |
8abcdd68 | 716 | cppi41dma: dma-controller@47402000 { |
9b3452d1 SAS |
717 | compatible = "ti,am3359-cppi41"; |
718 | reg = <0x47400000 0x1000 | |
719 | 0x47402000 0x1000 | |
720 | 0x47403000 0x1000 | |
721 | 0x47404000 0x4000>; | |
3b6394b4 | 722 | reg-names = "glue", "controller", "scheduler", "queuemgr"; |
9b3452d1 SAS |
723 | interrupts = <17>; |
724 | interrupt-names = "glue"; | |
725 | #dma-cells = <2>; | |
726 | #dma-channels = <30>; | |
727 | #dma-requests = <256>; | |
728 | status = "disabled"; | |
729 | }; | |
35b47fbb | 730 | }; |
6be35c70 | 731 | |
0a7486c9 PA |
732 | epwmss0: epwmss@48300000 { |
733 | compatible = "ti,am33xx-pwmss"; | |
734 | reg = <0x48300000 0x10>; | |
735 | ti,hwmods = "epwmss0"; | |
736 | #address-cells = <1>; | |
737 | #size-cells = <1>; | |
738 | status = "disabled"; | |
739 | ranges = <0x48300100 0x48300100 0x80 /* ECAP */ | |
740 | 0x48300180 0x48300180 0x80 /* EQEP */ | |
741 | 0x48300200 0x48300200 0x80>; /* EHRPWM */ | |
742 | ||
743 | ecap0: ecap@48300100 { | |
229110c1 FCJ |
744 | compatible = "ti,am3352-ecap", |
745 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
746 | #pwm-cells = <3>; |
747 | reg = <0x48300100 0x80>; | |
229110c1 FCJ |
748 | clocks = <&l4ls_gclk>; |
749 | clock-names = "fck"; | |
e8c85a3e MP |
750 | interrupts = <31>; |
751 | interrupt-names = "ecap0"; | |
0a7486c9 PA |
752 | status = "disabled"; |
753 | }; | |
754 | ||
dce2a652 | 755 | ehrpwm0: pwm@48300200 { |
229110c1 FCJ |
756 | compatible = "ti,am3352-ehrpwm", |
757 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
758 | #pwm-cells = <3>; |
759 | reg = <0x48300200 0x80>; | |
229110c1 FCJ |
760 | clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>; |
761 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
762 | status = "disabled"; |
763 | }; | |
764 | }; | |
765 | ||
766 | epwmss1: epwmss@48302000 { | |
767 | compatible = "ti,am33xx-pwmss"; | |
768 | reg = <0x48302000 0x10>; | |
769 | ti,hwmods = "epwmss1"; | |
770 | #address-cells = <1>; | |
771 | #size-cells = <1>; | |
772 | status = "disabled"; | |
773 | ranges = <0x48302100 0x48302100 0x80 /* ECAP */ | |
774 | 0x48302180 0x48302180 0x80 /* EQEP */ | |
775 | 0x48302200 0x48302200 0x80>; /* EHRPWM */ | |
776 | ||
777 | ecap1: ecap@48302100 { | |
229110c1 FCJ |
778 | compatible = "ti,am3352-ecap", |
779 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
780 | #pwm-cells = <3>; |
781 | reg = <0x48302100 0x80>; | |
229110c1 FCJ |
782 | clocks = <&l4ls_gclk>; |
783 | clock-names = "fck"; | |
e8c85a3e MP |
784 | interrupts = <47>; |
785 | interrupt-names = "ecap1"; | |
0a7486c9 PA |
786 | status = "disabled"; |
787 | }; | |
788 | ||
dce2a652 | 789 | ehrpwm1: pwm@48302200 { |
229110c1 FCJ |
790 | compatible = "ti,am3352-ehrpwm", |
791 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
792 | #pwm-cells = <3>; |
793 | reg = <0x48302200 0x80>; | |
229110c1 FCJ |
794 | clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>; |
795 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
796 | status = "disabled"; |
797 | }; | |
798 | }; | |
799 | ||
800 | epwmss2: epwmss@48304000 { | |
801 | compatible = "ti,am33xx-pwmss"; | |
802 | reg = <0x48304000 0x10>; | |
803 | ti,hwmods = "epwmss2"; | |
804 | #address-cells = <1>; | |
805 | #size-cells = <1>; | |
806 | status = "disabled"; | |
807 | ranges = <0x48304100 0x48304100 0x80 /* ECAP */ | |
808 | 0x48304180 0x48304180 0x80 /* EQEP */ | |
809 | 0x48304200 0x48304200 0x80>; /* EHRPWM */ | |
810 | ||
811 | ecap2: ecap@48304100 { | |
229110c1 FCJ |
812 | compatible = "ti,am3352-ecap", |
813 | "ti,am33xx-ecap"; | |
0a7486c9 PA |
814 | #pwm-cells = <3>; |
815 | reg = <0x48304100 0x80>; | |
229110c1 FCJ |
816 | clocks = <&l4ls_gclk>; |
817 | clock-names = "fck"; | |
e8c85a3e MP |
818 | interrupts = <61>; |
819 | interrupt-names = "ecap2"; | |
0a7486c9 PA |
820 | status = "disabled"; |
821 | }; | |
822 | ||
dce2a652 | 823 | ehrpwm2: pwm@48304200 { |
229110c1 FCJ |
824 | compatible = "ti,am3352-ehrpwm", |
825 | "ti,am33xx-ehrpwm"; | |
0a7486c9 PA |
826 | #pwm-cells = <3>; |
827 | reg = <0x48304200 0x80>; | |
229110c1 FCJ |
828 | clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>; |
829 | clock-names = "tbclk", "fck"; | |
0a7486c9 PA |
830 | status = "disabled"; |
831 | }; | |
832 | }; | |
833 | ||
1a39a65c | 834 | mac: ethernet@4a100000 { |
21696f71 | 835 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
1a39a65c | 836 | ti,hwmods = "cpgmac0"; |
0987a6ef GC |
837 | clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; |
838 | clock-names = "fck", "cpts"; | |
1a39a65c M |
839 | cpdma_channels = <8>; |
840 | ale_entries = <1024>; | |
841 | bd_ram_size = <0x2000>; | |
842 | no_bd_ram = <0>; | |
1a39a65c M |
843 | mac_control = <0x20>; |
844 | slaves = <2>; | |
e86ac13b | 845 | active_slave = <0>; |
1a39a65c M |
846 | cpts_clock_mult = <0x80000000>; |
847 | cpts_clock_shift = <29>; | |
848 | reg = <0x4a100000 0x800 | |
849 | 0x4a101200 0x100>; | |
850 | #address-cells = <1>; | |
851 | #size-cells = <1>; | |
852 | interrupt-parent = <&intc>; | |
853 | /* | |
854 | * c0_rx_thresh_pend | |
855 | * c0_rx_pend | |
856 | * c0_tx_pend | |
857 | * c0_misc_pend | |
858 | */ | |
859 | interrupts = <40 41 42 43>; | |
860 | ranges; | |
e3bc5358 | 861 | syscon = <&scm_conf>; |
16c75a13 | 862 | status = "disabled"; |
1a39a65c M |
863 | |
864 | davinci_mdio: mdio@4a101000 { | |
9efd1a6f | 865 | compatible = "ti,cpsw-mdio","ti,davinci_mdio"; |
1a39a65c M |
866 | #address-cells = <1>; |
867 | #size-cells = <0>; | |
868 | ti,hwmods = "davinci_mdio"; | |
869 | bus_freq = <1000000>; | |
870 | reg = <0x4a101000 0x100>; | |
16c75a13 | 871 | status = "disabled"; |
1a39a65c M |
872 | }; |
873 | ||
874 | cpsw_emac0: slave@4a100200 { | |
875 | /* Filled in by U-Boot */ | |
876 | mac-address = [ 00 00 00 00 00 00 ]; | |
877 | }; | |
878 | ||
879 | cpsw_emac1: slave@4a100300 { | |
880 | /* Filled in by U-Boot */ | |
881 | mac-address = [ 00 00 00 00 00 00 ]; | |
882 | }; | |
39ffbd91 M |
883 | |
884 | phy_sel: cpsw-phy-sel@44e10650 { | |
885 | compatible = "ti,am3352-cpsw-phy-sel"; | |
886 | reg= <0x44e10650 0x4>; | |
887 | reg-names = "gmii-sel"; | |
888 | }; | |
1a39a65c | 889 | }; |
f6575c90 VB |
890 | |
891 | ocmcram: ocmcram@40300000 { | |
8b9a2810 RN |
892 | compatible = "mmio-sram"; |
893 | reg = <0x40300000 0x10000>; /* 64k */ | |
f6575c90 VB |
894 | }; |
895 | ||
15e8246b PA |
896 | elm: elm@48080000 { |
897 | compatible = "ti,am3352-elm"; | |
898 | reg = <0x48080000 0x2000>; | |
899 | interrupts = <4>; | |
900 | ti,hwmods = "elm"; | |
d6cfc1e2 BP |
901 | status = "disabled"; |
902 | }; | |
903 | ||
904 | lcdc: lcdc@4830e000 { | |
905 | compatible = "ti,am33xx-tilcdc"; | |
906 | reg = <0x4830e000 0x1000>; | |
907 | interrupt-parent = <&intc>; | |
908 | interrupts = <36>; | |
909 | ti,hwmods = "lcdc"; | |
15e8246b PA |
910 | status = "disabled"; |
911 | }; | |
912 | ||
a82279dd PR |
913 | tscadc: tscadc@44e0d000 { |
914 | compatible = "ti,am3359-tscadc"; | |
915 | reg = <0x44e0d000 0x1000>; | |
916 | interrupt-parent = <&intc>; | |
917 | interrupts = <16>; | |
918 | ti,hwmods = "adc_tsc"; | |
919 | status = "disabled"; | |
920 | ||
921 | tsc { | |
922 | compatible = "ti,am3359-tsc"; | |
923 | }; | |
924 | am335x_adc: adc { | |
925 | #io-channel-cells = <1>; | |
926 | compatible = "ti,am3359-adc"; | |
927 | }; | |
a82279dd PR |
928 | }; |
929 | ||
e45879ec PA |
930 | gpmc: gpmc@50000000 { |
931 | compatible = "ti,am3352-gpmc"; | |
932 | ti,hwmods = "gpmc"; | |
f12ecbe2 | 933 | ti,no-idle-on-init; |
e45879ec PA |
934 | reg = <0x50000000 0x2000>; |
935 | interrupts = <100>; | |
a2abf904 | 936 | dmas = <&edma 52 0>; |
201c7e33 | 937 | dma-names = "rxtx"; |
00dddcaa LP |
938 | gpmc,num-cs = <7>; |
939 | gpmc,num-waitpins = <2>; | |
e45879ec PA |
940 | #address-cells = <2>; |
941 | #size-cells = <1>; | |
03752148 RQ |
942 | interrupt-controller; |
943 | #interrupt-cells = <2>; | |
4eb4dd57 RQ |
944 | gpio-controller; |
945 | #gpio-cells = <2>; | |
e45879ec PA |
946 | status = "disabled"; |
947 | }; | |
f8302e1e MG |
948 | |
949 | sham: sham@53100000 { | |
950 | compatible = "ti,omap4-sham"; | |
951 | ti,hwmods = "sham"; | |
952 | reg = <0x53100000 0x200>; | |
953 | interrupts = <109>; | |
b5e50906 | 954 | dmas = <&edma 36 0>; |
f8302e1e MG |
955 | dma-names = "rx"; |
956 | }; | |
99919e5e MG |
957 | |
958 | aes: aes@53500000 { | |
959 | compatible = "ti,omap4-aes"; | |
960 | ti,hwmods = "aes"; | |
961 | reg = <0x53500000 0xa0>; | |
7af8884a | 962 | interrupts = <103>; |
b5e50906 PU |
963 | dmas = <&edma 6 0>, |
964 | <&edma 5 0>; | |
99919e5e MG |
965 | dma-names = "tx", "rx"; |
966 | }; | |
3f72f875 PA |
967 | |
968 | mcasp0: mcasp@48038000 { | |
969 | compatible = "ti,am33xx-mcasp-audio"; | |
970 | ti,hwmods = "mcasp0"; | |
0bee55ab JS |
971 | reg = <0x48038000 0x2000>, |
972 | <0x46000000 0x400000>; | |
973 | reg-names = "mpu", "dat"; | |
3f72f875 | 974 | interrupts = <80>, <81>; |
ae107d06 | 975 | interrupt-names = "tx", "rx"; |
3f72f875 | 976 | status = "disabled"; |
b5e50906 PU |
977 | dmas = <&edma 8 2>, |
978 | <&edma 9 2>; | |
3f72f875 PA |
979 | dma-names = "tx", "rx"; |
980 | }; | |
981 | ||
982 | mcasp1: mcasp@4803C000 { | |
983 | compatible = "ti,am33xx-mcasp-audio"; | |
984 | ti,hwmods = "mcasp1"; | |
0bee55ab JS |
985 | reg = <0x4803C000 0x2000>, |
986 | <0x46400000 0x400000>; | |
987 | reg-names = "mpu", "dat"; | |
3f72f875 | 988 | interrupts = <82>, <83>; |
ae107d06 | 989 | interrupt-names = "tx", "rx"; |
3f72f875 | 990 | status = "disabled"; |
b5e50906 PU |
991 | dmas = <&edma 10 2>, |
992 | <&edma 11 2>; | |
3f72f875 PA |
993 | dma-names = "tx", "rx"; |
994 | }; | |
ed845d6b LV |
995 | |
996 | rng: rng@48310000 { | |
997 | compatible = "ti,omap4-rng"; | |
998 | ti,hwmods = "rng"; | |
999 | reg = <0x48310000 0x2000>; | |
1000 | interrupts = <111>; | |
1001 | }; | |
5fc0b42a AC |
1002 | }; |
1003 | }; | |
ea291c98 TK |
1004 | |
1005 | /include/ "am33xx-clocks.dtsi" |