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arm: boot: dts: omap2/3/am33xx: drop ti,intc-size
[deliverable/linux.git] / arch / arm / boot / dts / am33xx.dtsi
CommitLineData
5fc0b42a
AC		 1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
e94233c2 11#include <dt-bindings/gpio/gpio.h>
6a8a6b65 12#include <dt-bindings/pinctrl/am33xx.h>
e94233c2 13
eb33ef66 14#include "skeleton.dtsi"
5fc0b42a
AC		 15
16/ {
17 compatible = "ti,am33xx";
4c94ac29 18 interrupt-parent = <&intc>;
5fc0b42a
AC		 19
20 aliases {
6a968678
NM		 21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
dde3b0d6
VH		 24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
7a57ee87
AC		 30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
97238b35
SAS		 32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
8170056d
DM		 36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
5fc0b42a
AC		 38 };
39
40 cpus {
2e0d513f
LP		 41 #address-cells = <1>;
42 #size-cells = <0>;
5fc0b42a
AC		 43 cpu@0 {
44 compatible = "arm,cortex-a8";
2e0d513f
LP		 45 device_type = "cpu";
46 reg = <0>;
efeedcf2
AC		 47
48 /*
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
52 */
53 operating-points = <
54 /* kHz uV */
55 720000 1285000
56 600000 1225000
57 500000 1125000
58 275000 1125000
59 >;
60 voltage-tolerance = <2>; /* 2 percentage */
8d766fa2
NM		 61
62 clocks = <&dpll_mpu_ck>;
63 clock-names = "cpu";
64
efeedcf2 65 clock-latency = <300000>; /* From omap-cpufreq driver */
5fc0b42a
AC		 66 };
67 };
68
6797cdbe
AB		 69 pmu {
70 compatible = "arm,cortex-a8-pmu";
71 interrupts = <3>;
72 };
73
5fc0b42a 74 /*
5c5be9db 75 * The soc node represents the soc top level view. It is used for IPs
5fc0b42a
AC		 76 * that are not memory mapped in the MPU view or for the MPU itself.
77 */
78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
b552dfc4
AC		 86 am33xx_pinmux: pinmux@44e10800 {
87 compatible = "pinctrl-single";
88 reg = <0x44e10800 0x0238>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 pinctrl-single,register-width = <32>;
92 pinctrl-single,function-mask = <0x7f>;
93 };
94
5fc0b42a
AC		 95 /*
96 * XXX: Use a flat representation of the AM33XX interconnect.
b7ab524b
GU		 97 * The real AM33XX interconnect network is quite complex. Since
98 * it will not bring real advantage to represent that in DT
5fc0b42a
AC		 99 * for the moment, just use a fake OCP bus entry to represent
100 * the whole bus hierarchy.
101 */
102 ocp {
103 compatible = "simple-bus";
104 #address-cells = <1>;
105 #size-cells = <1>;
106 ranges;
107 ti,hwmods = "l3_main";
108
ea291c98
TK		 109 prcm: prcm@44e00000 {
110 compatible = "ti,am3-prcm";
111 reg = <0x44e00000 0x4000>;
112
113 prcm_clocks: clocks {
114 #address-cells = <1>;
115 #size-cells = <0>;
116 };
117
118 prcm_clockdomains: clockdomains {
119 };
120 };
121
122 scrm: scrm@44e10000 {
123 compatible = "ti,am3-scrm";
124 reg = <0x44e10000 0x2000>;
125
126 scrm_clocks: clocks {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 };
130
131 scrm_clockdomains: clockdomains {
132 };
133 };
134
5fc0b42a 135 intc: interrupt-controller@48200000 {
cab82b76 136 compatible = "ti,am33xx-intc";
5fc0b42a
AC		 137 interrupt-controller;
138 #interrupt-cells = <1>;
5fc0b42a
AC		 139 reg = <0x48200000 0x1000>;
140 };
141
505975d3
MP		 142 edma: edma@49000000 {
143 compatible = "ti,edma3";
144 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
145 reg = <0x49000000 0x10000>,
cf7eb979 146 <0x44e10f90 0x40>;
505975d3
MP		 147 interrupts = <12 13 14>;
148 #dma-cells = <1>;
505975d3
MP		 149 };
150
b918e2c0 151 gpio0: gpio@44e07000 {
5fc0b42a
AC		 152 compatible = "ti,omap4-gpio";
153 ti,hwmods = "gpio1";
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
5eac0eb7 157 #interrupt-cells = <2>;
4462b31c 158 reg = <0x44e07000 0x1000>;
4462b31c 159 interrupts = <96>;
5fc0b42a
AC		 160 };
161
b918e2c0 162 gpio1: gpio@4804c000 {
5fc0b42a
AC		 163 compatible = "ti,omap4-gpio";
164 ti,hwmods = "gpio2";
165 gpio-controller;
166 #gpio-cells = <2>;
167 interrupt-controller;
5eac0eb7 168 #interrupt-cells = <2>;
4462b31c 169 reg = <0x4804c000 0x1000>;
4462b31c 170 interrupts = <98>;
5fc0b42a
AC		 171 };
172
b918e2c0 173 gpio2: gpio@481ac000 {
5fc0b42a
AC		 174 compatible = "ti,omap4-gpio";
175 ti,hwmods = "gpio3";
176 gpio-controller;
177 #gpio-cells = <2>;
178 interrupt-controller;
5eac0eb7 179 #interrupt-cells = <2>;
4462b31c 180 reg = <0x481ac000 0x1000>;
4462b31c 181 interrupts = <32>;
5fc0b42a
AC		 182 };
183
b918e2c0 184 gpio3: gpio@481ae000 {
5fc0b42a
AC		 185 compatible = "ti,omap4-gpio";
186 ti,hwmods = "gpio4";
187 gpio-controller;
188 #gpio-cells = <2>;
189 interrupt-controller;
5eac0eb7 190 #interrupt-cells = <2>;
4462b31c 191 reg = <0x481ae000 0x1000>;
4462b31c 192 interrupts = <62>;
5fc0b42a
AC		 193 };
194
dde3b0d6 195 uart0: serial@44e09000 {
5fc0b42a
AC		 196 compatible = "ti,omap3-uart";
197 ti,hwmods = "uart1";
198 clock-frequency = <48000000>;
4462b31c 199 reg = <0x44e09000 0x2000>;
4462b31c 200 interrupts = <72>;
53d91034 201 status = "disabled";
5fc0b42a
AC		 202 };
203
dde3b0d6 204 uart1: serial@48022000 {
5fc0b42a
AC		 205 compatible = "ti,omap3-uart";
206 ti,hwmods = "uart2";
207 clock-frequency = <48000000>;
4462b31c 208 reg = <0x48022000 0x2000>;
4462b31c 209 interrupts = <73>;
53d91034 210 status = "disabled";
5fc0b42a
AC		 211 };
212
dde3b0d6 213 uart2: serial@48024000 {
5fc0b42a
AC		 214 compatible = "ti,omap3-uart";
215 ti,hwmods = "uart3";
216 clock-frequency = <48000000>;
4462b31c 217 reg = <0x48024000 0x2000>;
4462b31c 218 interrupts = <74>;
53d91034 219 status = "disabled";
5fc0b42a
AC		 220 };
221
dde3b0d6 222 uart3: serial@481a6000 {
5fc0b42a
AC		 223 compatible = "ti,omap3-uart";
224 ti,hwmods = "uart4";
225 clock-frequency = <48000000>;
4462b31c 226 reg = <0x481a6000 0x2000>;
4462b31c 227 interrupts = <44>;
53d91034 228 status = "disabled";
5fc0b42a
AC		 229 };
230
dde3b0d6 231 uart4: serial@481a8000 {
5fc0b42a
AC		 232 compatible = "ti,omap3-uart";
233 ti,hwmods = "uart5";
234 clock-frequency = <48000000>;
4462b31c 235 reg = <0x481a8000 0x2000>;
4462b31c 236 interrupts = <45>;
53d91034 237 status = "disabled";
5fc0b42a
AC		 238 };
239
dde3b0d6 240 uart5: serial@481aa000 {
5fc0b42a
AC		 241 compatible = "ti,omap3-uart";
242 ti,hwmods = "uart6";
243 clock-frequency = <48000000>;
4462b31c 244 reg = <0x481aa000 0x2000>;
4462b31c 245 interrupts = <46>;
53d91034 246 status = "disabled";
5fc0b42a
AC		 247 };
248
b918e2c0 249 i2c0: i2c@44e0b000 {
5fc0b42a
AC		 250 compatible = "ti,omap4-i2c";
251 #address-cells = <1>;
252 #size-cells = <0>;
253 ti,hwmods = "i2c1";
4462b31c 254 reg = <0x44e0b000 0x1000>;
4462b31c 255 interrupts = <70>;
53d91034 256 status = "disabled";
5fc0b42a
AC		 257 };
258
b918e2c0 259 i2c1: i2c@4802a000 {
5fc0b42a
AC		 260 compatible = "ti,omap4-i2c";
261 #address-cells = <1>;
262 #size-cells = <0>;
263 ti,hwmods = "i2c2";
4462b31c 264 reg = <0x4802a000 0x1000>;
4462b31c 265 interrupts = <71>;
53d91034 266 status = "disabled";
5fc0b42a
AC		 267 };
268
b918e2c0 269 i2c2: i2c@4819c000 {
5fc0b42a
AC		 270 compatible = "ti,omap4-i2c";
271 #address-cells = <1>;
272 #size-cells = <0>;
273 ti,hwmods = "i2c3";
4462b31c 274 reg = <0x4819c000 0x1000>;
4462b31c 275 interrupts = <30>;
53d91034 276 status = "disabled";
5fc0b42a 277 };
5f789ebc 278
55b4452b
MP		 279 mmc1: mmc@48060000 {
280 compatible = "ti,omap4-hsmmc";
281 ti,hwmods = "mmc1";
282 ti,dual-volt;
283 ti,needs-special-reset;
284 ti,needs-special-hs-handling;
285 dmas = <&edma 24
286 &edma 25>;
287 dma-names = "tx", "rx";
288 interrupts = <64>;
289 interrupt-parent = <&intc>;
290 reg = <0x48060000 0x1000>;
291 status = "disabled";
292 };
293
294 mmc2: mmc@481d8000 {
295 compatible = "ti,omap4-hsmmc";
296 ti,hwmods = "mmc2";
297 ti,needs-special-reset;
298 dmas = <&edma 2
299 &edma 3>;
300 dma-names = "tx", "rx";
301 interrupts = <28>;
302 interrupt-parent = <&intc>;
303 reg = <0x481d8000 0x1000>;
304 status = "disabled";
305 };
306
307 mmc3: mmc@47810000 {
308 compatible = "ti,omap4-hsmmc";
309 ti,hwmods = "mmc3";
310 ti,needs-special-reset;
311 interrupts = <29>;
312 interrupt-parent = <&intc>;
313 reg = <0x47810000 0x1000>;
314 status = "disabled";
315 };
316
d4cbe80d
SA		 317 hwspinlock: spinlock@480ca000 {
318 compatible = "ti,omap4-hwspinlock";
319 reg = <0x480ca000 0x1000>;
320 ti,hwmods = "spinlock";
34054213 321 #hwlock-cells = <1>;
d4cbe80d
SA		 322 };
323
5f789ebc
AM		 324 wdt2: wdt@44e35000 {
325 compatible = "ti,omap3-wdt";
326 ti,hwmods = "wd_timer2";
4462b31c 327 reg = <0x44e35000 0x1000>;
4462b31c 328 interrupts = <91>;
5f789ebc 329 };
059b185d
AC		 330
331 dcan0: d_can@481cc000 {
332 compatible = "bosch,d_can";
333 ti,hwmods = "d_can0";
f178c015
AC		 334 reg = <0x481cc000 0x2000
335 0x44e10644 0x4>;
059b185d 336 interrupts = <52>;
059b185d
AC		 337 status = "disabled";
338 };
339
340 dcan1: d_can@481d0000 {
341 compatible = "bosch,d_can";
342 ti,hwmods = "d_can1";
f178c015
AC		 343 reg = <0x481d0000 0x2000
344 0x44e10644 0x4>;
059b185d 345 interrupts = <55>;
059b185d
AC		 346 status = "disabled";
347 };
fab8ad0b 348
40242301
SA		 349 mailbox: mailbox@480C8000 {
350 compatible = "ti,omap4-mailbox";
351 reg = <0x480C8000 0x200>;
352 interrupts = <77>;
353 ti,hwmods = "mailbox";
354 ti,mbox-num-users = <4>;
355 ti,mbox-num-fifos = <8>;
356 };
357
fab8ad0b 358 timer1: timer@44e31000 {
002e1ec5 359 compatible = "ti,am335x-timer-1ms";
fab8ad0b
JH		 360 reg = <0x44e31000 0x400>;
361 interrupts = <67>;
362 ti,hwmods = "timer1";
363 ti,timer-alwon;
364 };
365
366 timer2: timer@48040000 {
002e1ec5 367 compatible = "ti,am335x-timer";
fab8ad0b
JH		 368 reg = <0x48040000 0x400>;
369 interrupts = <68>;
370 ti,hwmods = "timer2";
371 };
372
373 timer3: timer@48042000 {
002e1ec5 374 compatible = "ti,am335x-timer";
fab8ad0b
JH		 375 reg = <0x48042000 0x400>;
376 interrupts = <69>;
377 ti,hwmods = "timer3";
378 };
379
380 timer4: timer@48044000 {
002e1ec5 381 compatible = "ti,am335x-timer";
fab8ad0b
JH		 382 reg = <0x48044000 0x400>;
383 interrupts = <92>;
384 ti,hwmods = "timer4";
385 ti,timer-pwm;
386 };
387
388 timer5: timer@48046000 {
002e1ec5 389 compatible = "ti,am335x-timer";
fab8ad0b
JH		 390 reg = <0x48046000 0x400>;
391 interrupts = <93>;
392 ti,hwmods = "timer5";
393 ti,timer-pwm;
394 };
395
396 timer6: timer@48048000 {
002e1ec5 397 compatible = "ti,am335x-timer";
fab8ad0b
JH		 398 reg = <0x48048000 0x400>;
399 interrupts = <94>;
400 ti,hwmods = "timer6";
401 ti,timer-pwm;
402 };
403
404 timer7: timer@4804a000 {
002e1ec5 405 compatible = "ti,am335x-timer";
fab8ad0b
JH		 406 reg = <0x4804a000 0x400>;
407 interrupts = <95>;
408 ti,hwmods = "timer7";
409 ti,timer-pwm;
410 };
0d935c16 411
ccd8b9e0 412 rtc: rtc@44e3e000 {
0d935c16
AM		 413 compatible = "ti,da830-rtc";
414 reg = <0x44e3e000 0x1000>;
415 interrupts = <75
416 76>;
417 ti,hwmods = "rtc";
418 };
9fd3c748
PA		 419
420 spi0: spi@48030000 {
421 compatible = "ti,omap4-mcspi";
422 #address-cells = <1>;
423 #size-cells = <0>;
424 reg = <0x48030000 0x400>;
7b3754c6 425 interrupts = <65>;
9fd3c748
PA		 426 ti,spi-num-cs = <2>;
427 ti,hwmods = "spi0";
f5e2f807
MP		 428 dmas = <&edma 16
429 &edma 17
430 &edma 18
431 &edma 19>;
432 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 433 status = "disabled";
434 };
435
436 spi1: spi@481a0000 {
437 compatible = "ti,omap4-mcspi";
438 #address-cells = <1>;
439 #size-cells = <0>;
440 reg = <0x481a0000 0x400>;
7b3754c6 441 interrupts = <125>;
9fd3c748
PA		 442 ti,spi-num-cs = <2>;
443 ti,hwmods = "spi1";
f5e2f807
MP		 444 dmas = <&edma 42
445 &edma 43
446 &edma 44
447 &edma 45>;
448 dma-names = "tx0", "rx0", "tx1", "rx1";
9fd3c748
PA		 449 status = "disabled";
450 };
35b47fbb 451
97238b35
SAS		 452 usb: usb@47400000 {
453 compatible = "ti,am33xx-usb";
454 reg = <0x47400000 0x1000>;
455 ranges;
456 #address-cells = <1>;
457 #size-cells = <1>;
35b47fbb 458 ti,hwmods = "usb_otg_hs";
97238b35
SAS		 459 status = "disabled";
460
8abcdd68 461 usb_ctrl_mod: control@44e10620 {
97238b35
SAS		 462 compatible = "ti,am335x-usb-ctrl-module";
463 reg = <0x44e10620 0x10
464 0x44e10648 0x4>;
465 reg-names = "phy_ctrl", "wakeup";
466 status = "disabled";
467 };
468
c031a7d4 469 usb0_phy: usb-phy@47401300 {
97238b35
SAS		 470 compatible = "ti,am335x-usb-phy";
471 reg = <0x47401300 0x100>;
472 reg-names = "phy";
473 status = "disabled";
e7243b76 474 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 475 };
476
477 usb0: usb@47401000 {
478 compatible = "ti,musb-am33xx";
97238b35 479 status = "disabled";
c031a7d4
SAS		 480 reg = <0x47401400 0x400
481 0x47401000 0x200>;
482 reg-names = "mc", "control";
483
484 interrupts = <18>;
485 interrupt-names = "mc";
486 dr_mode = "otg";
487 mentor,multipoint = <1>;
488 mentor,num-eps = <16>;
489 mentor,ram-bits = <12>;
490 mentor,power = <500>;
491 phys = <&usb0_phy>;
9b3452d1
SAS		 492
493 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
494 &cppi41dma 2 0 &cppi41dma 3 0
495 &cppi41dma 4 0 &cppi41dma 5 0
496 &cppi41dma 6 0 &cppi41dma 7 0
497 &cppi41dma 8 0 &cppi41dma 9 0
498 &cppi41dma 10 0 &cppi41dma 11 0
499 &cppi41dma 12 0 &cppi41dma 13 0
500 &cppi41dma 14 0 &cppi41dma 0 1
501 &cppi41dma 1 1 &cppi41dma 2 1
502 &cppi41dma 3 1 &cppi41dma 4 1
503 &cppi41dma 5 1 &cppi41dma 6 1
504 &cppi41dma 7 1 &cppi41dma 8 1
505 &cppi41dma 9 1 &cppi41dma 10 1
506 &cppi41dma 11 1 &cppi41dma 12 1
507 &cppi41dma 13 1 &cppi41dma 14 1>;
508 dma-names =
509 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
510 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
511 "rx14", "rx15",
512 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
513 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
514 "tx14", "tx15";
97238b35
SAS		 515 };
516
c031a7d4 517 usb1_phy: usb-phy@47401b00 {
97238b35
SAS		 518 compatible = "ti,am335x-usb-phy";
519 reg = <0x47401b00 0x100>;
520 reg-names = "phy";
521 status = "disabled";
e7243b76 522 ti,ctrl_mod = <&usb_ctrl_mod>;
97238b35
SAS		 523 };
524
525 usb1: usb@47401800 {
526 compatible = "ti,musb-am33xx";
97238b35 527 status = "disabled";
c031a7d4
SAS		 528 reg = <0x47401c00 0x400
529 0x47401800 0x200>;
530 reg-names = "mc", "control";
531 interrupts = <19>;
532 interrupt-names = "mc";
533 dr_mode = "otg";
534 mentor,multipoint = <1>;
535 mentor,num-eps = <16>;
536 mentor,ram-bits = <12>;
537 mentor,power = <500>;
538 phys = <&usb1_phy>;
9b3452d1
SAS		 539
540 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
541 &cppi41dma 17 0 &cppi41dma 18 0
542 &cppi41dma 19 0 &cppi41dma 20 0
543 &cppi41dma 21 0 &cppi41dma 22 0
544 &cppi41dma 23 0 &cppi41dma 24 0
545 &cppi41dma 25 0 &cppi41dma 26 0
546 &cppi41dma 27 0 &cppi41dma 28 0
547 &cppi41dma 29 0 &cppi41dma 15 1
548 &cppi41dma 16 1 &cppi41dma 17 1
549 &cppi41dma 18 1 &cppi41dma 19 1
550 &cppi41dma 20 1 &cppi41dma 21 1
551 &cppi41dma 22 1 &cppi41dma 23 1
552 &cppi41dma 24 1 &cppi41dma 25 1
553 &cppi41dma 26 1 &cppi41dma 27 1
554 &cppi41dma 28 1 &cppi41dma 29 1>;
555 dma-names =
556 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
557 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
558 "rx14", "rx15",
559 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
560 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
561 "tx14", "tx15";
97238b35 562 };
9b3452d1 563
8abcdd68 564 cppi41dma: dma-controller@47402000 {
9b3452d1
SAS		 565 compatible = "ti,am3359-cppi41";
566 reg = <0x47400000 0x1000
567 0x47402000 0x1000
568 0x47403000 0x1000
569 0x47404000 0x4000>;
3b6394b4 570 reg-names = "glue", "controller", "scheduler", "queuemgr";
9b3452d1
SAS		 571 interrupts = <17>;
572 interrupt-names = "glue";
573 #dma-cells = <2>;
574 #dma-channels = <30>;
575 #dma-requests = <256>;
576 status = "disabled";
577 };
35b47fbb 578 };
6be35c70 579
0a7486c9
PA		 580 epwmss0: epwmss@48300000 {
581 compatible = "ti,am33xx-pwmss";
582 reg = <0x48300000 0x10>;
583 ti,hwmods = "epwmss0";
584 #address-cells = <1>;
585 #size-cells = <1>;
586 status = "disabled";
587 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
588 0x48300180 0x48300180 0x80 /* EQEP */
589 0x48300200 0x48300200 0x80>; /* EHRPWM */
590
591 ecap0: ecap@48300100 {
592 compatible = "ti,am33xx-ecap";
593 #pwm-cells = <3>;
594 reg = <0x48300100 0x80>;
e8c85a3e
MP		 595 interrupts = <31>;
596 interrupt-names = "ecap0";
0a7486c9
PA		 597 ti,hwmods = "ecap0";
598 status = "disabled";
599 };
600
601 ehrpwm0: ehrpwm@48300200 {
602 compatible = "ti,am33xx-ehrpwm";
603 #pwm-cells = <3>;
604 reg = <0x48300200 0x80>;
605 ti,hwmods = "ehrpwm0";
606 status = "disabled";
607 };
608 };
609
610 epwmss1: epwmss@48302000 {
611 compatible = "ti,am33xx-pwmss";
612 reg = <0x48302000 0x10>;
613 ti,hwmods = "epwmss1";
614 #address-cells = <1>;
615 #size-cells = <1>;
616 status = "disabled";
617 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
618 0x48302180 0x48302180 0x80 /* EQEP */
619 0x48302200 0x48302200 0x80>; /* EHRPWM */
620
621 ecap1: ecap@48302100 {
622 compatible = "ti,am33xx-ecap";
623 #pwm-cells = <3>;
624 reg = <0x48302100 0x80>;
e8c85a3e
MP		 625 interrupts = <47>;
626 interrupt-names = "ecap1";
0a7486c9
PA		 627 ti,hwmods = "ecap1";
628 status = "disabled";
629 };
630
631 ehrpwm1: ehrpwm@48302200 {
632 compatible = "ti,am33xx-ehrpwm";
633 #pwm-cells = <3>;
634 reg = <0x48302200 0x80>;
635 ti,hwmods = "ehrpwm1";
636 status = "disabled";
637 };
638 };
639
640 epwmss2: epwmss@48304000 {
641 compatible = "ti,am33xx-pwmss";
642 reg = <0x48304000 0x10>;
643 ti,hwmods = "epwmss2";
644 #address-cells = <1>;
645 #size-cells = <1>;
646 status = "disabled";
647 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
648 0x48304180 0x48304180 0x80 /* EQEP */
649 0x48304200 0x48304200 0x80>; /* EHRPWM */
650
651 ecap2: ecap@48304100 {
652 compatible = "ti,am33xx-ecap";
653 #pwm-cells = <3>;
654 reg = <0x48304100 0x80>;
e8c85a3e
MP		 655 interrupts = <61>;
656 interrupt-names = "ecap2";
0a7486c9
PA		 657 ti,hwmods = "ecap2";
658 status = "disabled";
659 };
660
661 ehrpwm2: ehrpwm@48304200 {
662 compatible = "ti,am33xx-ehrpwm";
663 #pwm-cells = <3>;
664 reg = <0x48304200 0x80>;
665 ti,hwmods = "ehrpwm2";
666 status = "disabled";
667 };
668 };
669
1a39a65c
M		 670 mac: ethernet@4a100000 {
671 compatible = "ti,cpsw";
672 ti,hwmods = "cpgmac0";
0987a6ef
GC		 673 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
674 clock-names = "fck", "cpts";
1a39a65c
M		 675 cpdma_channels = <8>;
676 ale_entries = <1024>;
677 bd_ram_size = <0x2000>;
678 no_bd_ram = <0>;
679 rx_descs = <64>;
680 mac_control = <0x20>;
681 slaves = <2>;
e86ac13b 682 active_slave = <0>;
1a39a65c
M		 683 cpts_clock_mult = <0x80000000>;
684 cpts_clock_shift = <29>;
685 reg = <0x4a100000 0x800
686 0x4a101200 0x100>;
687 #address-cells = <1>;
688 #size-cells = <1>;
689 interrupt-parent = <&intc>;
690 /*
691 * c0_rx_thresh_pend
692 * c0_rx_pend
693 * c0_tx_pend
694 * c0_misc_pend
695 */
696 interrupts = <40 41 42 43>;
697 ranges;
16c75a13 698 status = "disabled";
1a39a65c
M		 699
700 davinci_mdio: mdio@4a101000 {
701 compatible = "ti,davinci_mdio";
702 #address-cells = <1>;
703 #size-cells = <0>;
704 ti,hwmods = "davinci_mdio";
705 bus_freq = <1000000>;
706 reg = <0x4a101000 0x100>;
16c75a13 707 status = "disabled";
1a39a65c
M		 708 };
709
710 cpsw_emac0: slave@4a100200 {
711 /* Filled in by U-Boot */
712 mac-address = [ 00 00 00 00 00 00 ];
713 };
714
715 cpsw_emac1: slave@4a100300 {
716 /* Filled in by U-Boot */
717 mac-address = [ 00 00 00 00 00 00 ];
718 };
39ffbd91
M		 719
720 phy_sel: cpsw-phy-sel@44e10650 {
721 compatible = "ti,am3352-cpsw-phy-sel";
722 reg= <0x44e10650 0x4>;
723 reg-names = "gmii-sel";
724 };
1a39a65c 725 };
f6575c90
VB		 726
727 ocmcram: ocmcram@40300000 {
728 compatible = "ti,am3352-ocmcram";
729 reg = <0x40300000 0x10000>;
730 ti,hwmods = "ocmcram";
f6575c90
VB		 731 };
732
733 wkup_m3: wkup_m3@44d00000 {
734 compatible = "ti,am3353-wkup-m3";
735 reg = <0x44d00000 0x4000 /* M3 UMEM */
736 0x44d80000 0x2000>; /* M3 DMEM */
737 ti,hwmods = "wkup_m3";
f12ecbe2 738 ti,no-reset-on-init;
f6575c90 739 };
e45879ec 740
15e8246b
PA		 741 elm: elm@48080000 {
742 compatible = "ti,am3352-elm";
743 reg = <0x48080000 0x2000>;
744 interrupts = <4>;
745 ti,hwmods = "elm";
d6cfc1e2
BP		 746 status = "disabled";
747 };
748
749 lcdc: lcdc@4830e000 {
750 compatible = "ti,am33xx-tilcdc";
751 reg = <0x4830e000 0x1000>;
752 interrupt-parent = <&intc>;
753 interrupts = <36>;
754 ti,hwmods = "lcdc";
15e8246b
PA		 755 status = "disabled";
756 };
757
a82279dd
PR		 758 tscadc: tscadc@44e0d000 {
759 compatible = "ti,am3359-tscadc";
760 reg = <0x44e0d000 0x1000>;
761 interrupt-parent = <&intc>;
762 interrupts = <16>;
763 ti,hwmods = "adc_tsc";
764 status = "disabled";
765
766 tsc {
767 compatible = "ti,am3359-tsc";
768 };
769 am335x_adc: adc {
770 #io-channel-cells = <1>;
771 compatible = "ti,am3359-adc";
772 };
a82279dd
PR		 773 };
774
e45879ec
PA		 775 gpmc: gpmc@50000000 {
776 compatible = "ti,am3352-gpmc";
777 ti,hwmods = "gpmc";
f12ecbe2 778 ti,no-idle-on-init;
e45879ec
PA		 779 reg = <0x50000000 0x2000>;
780 interrupts = <100>;
00dddcaa
LP		 781 gpmc,num-cs = <7>;
782 gpmc,num-waitpins = <2>;
e45879ec
PA		 783 #address-cells = <2>;
784 #size-cells = <1>;
785 status = "disabled";
786 };
f8302e1e
MG		 787
788 sham: sham@53100000 {
789 compatible = "ti,omap4-sham";
790 ti,hwmods = "sham";
791 reg = <0x53100000 0x200>;
792 interrupts = <109>;
793 dmas = <&edma 36>;
794 dma-names = "rx";
795 };
99919e5e
MG		 796
797 aes: aes@53500000 {
798 compatible = "ti,omap4-aes";
799 ti,hwmods = "aes";
800 reg = <0x53500000 0xa0>;
7af8884a 801 interrupts = <103>;
99919e5e
MG		 802 dmas = <&edma 6>,
803 <&edma 5>;
804 dma-names = "tx", "rx";
805 };
3f72f875
PA		 806
807 mcasp0: mcasp@48038000 {
808 compatible = "ti,am33xx-mcasp-audio";
809 ti,hwmods = "mcasp0";
0bee55ab
JS		 810 reg = <0x48038000 0x2000>,
811 <0x46000000 0x400000>;
812 reg-names = "mpu", "dat";
3f72f875 813 interrupts = <80>, <81>;
ae107d06 814 interrupt-names = "tx", "rx";
3f72f875
PA		 815 status = "disabled";
816 dmas = <&edma 8>,
817 <&edma 9>;
818 dma-names = "tx", "rx";
819 };
820
821 mcasp1: mcasp@4803C000 {
822 compatible = "ti,am33xx-mcasp-audio";
823 ti,hwmods = "mcasp1";
0bee55ab
JS		 824 reg = <0x4803C000 0x2000>,
825 <0x46400000 0x400000>;
826 reg-names = "mpu", "dat";
3f72f875 827 interrupts = <82>, <83>;
ae107d06 828 interrupt-names = "tx", "rx";
3f72f875
PA		 829 status = "disabled";
830 dmas = <&edma 10>,
831 <&edma 11>;
832 dma-names = "tx", "rx";
833 };
ed845d6b
LV		 834
835 rng: rng@48310000 {
836 compatible = "ti,omap4-rng";
837 ti,hwmods = "rng";
838 reg = <0x48310000 0x2000>;
839 interrupts = <111>;
840 };
5fc0b42a
AC		 841 };
842};
ea291c98
TK		 843
844/include/ "am33xx-clocks.dtsi"
Linux kernel - Deliverables
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