Commit | Line | Data |
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6cfd8117 AM |
1 | /* |
2 | * Device Tree Source for AM4372 SoC | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public License | |
7 | * version 2. This program is licensed "as is" without any warranty of any | |
8 | * kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
12 | ||
13 | #include "skeleton.dtsi" | |
14 | ||
15 | / { | |
16 | compatible = "ti,am4372", "ti,am43"; | |
17 | interrupt-parent = <&gic>; | |
18 | ||
19 | ||
20 | aliases { | |
21 | serial0 = &uart0; | |
22 | }; | |
23 | ||
24 | cpus { | |
25 | cpu@0 { | |
26 | compatible = "arm,cortex-a9"; | |
27 | }; | |
28 | }; | |
29 | ||
30 | gic: interrupt-controller@48241000 { | |
31 | compatible = "arm,cortex-a9-gic"; | |
32 | interrupt-controller; | |
33 | #interrupt-cells = <3>; | |
34 | reg = <0x48241000 0x1000>, | |
35 | <0x48240100 0x0100>; | |
36 | }; | |
37 | ||
38 | ocp { | |
39 | compatible = "simple-bus"; | |
40 | #address-cells = <1>; | |
41 | #size-cells = <1>; | |
42 | ranges; | |
43 | ||
44 | uart0: serial@44e09000 { | |
45 | compatible = "ti,am4372-uart","ti,omap2-uart"; | |
46 | reg = <0x44e09000 0x2000>; | |
47 | interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; | |
48 | }; | |
49 | ||
50 | timer1: timer@44e31000 { | |
51 | compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; | |
52 | reg = <0x44e31000 0x400>; | |
53 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; | |
54 | ti,timer-alwon; | |
55 | }; | |
56 | ||
57 | timer2: timer@48040000 { | |
58 | compatible = "ti,am4372-timer","ti,am335x-timer"; | |
59 | reg = <0x48040000 0x400>; | |
60 | interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; | |
61 | }; | |
62 | ||
63 | counter32k: counter@44e86000 { | |
64 | compatible = "ti,am4372-counter32k","ti,omap-counter32k"; | |
65 | reg = <0x44e86000 0x40>; | |
66 | }; | |
67 | }; | |
68 | }; |