Merge remote-tracking branch 'iwlwifi-fixes/master' into HEAD
[deliverable/linux.git] / arch / arm / boot / dts / armada-370-xp.dtsi
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1/*
2 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Lior Amsalem <alior@marvell.com>
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * Ben Dooks <ben.dooks@codethink.co.uk>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 *
15 * This file contains the definitions that are common to the Armada
16 * 370 and Armada XP SoC.
17 */
18
19/include/ "skeleton.dtsi"
20
21/ {
22 model = "Marvell Armada 370 and XP SoC";
92ece1cd 23 compatible = "marvell,armada-370-xp";
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24
25 cpus {
26 cpu@0 {
27 compatible = "marvell,sheeva-v7";
28 };
29 };
30
31 mpic: interrupt-controller@d0020000 {
32 compatible = "marvell,mpic";
33 #interrupt-cells = <1>;
34 #address-cells = <1>;
35 #size-cells = <1>;
36 interrupt-controller;
37 };
38
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39 coherency-fabric@d0020200 {
40 compatible = "marvell,coherency-fabric";
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41 reg = <0xd0020200 0xb0>,
42 <0xd0021810 0x1c>;
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43 };
44
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45 soc {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "simple-bus";
49 interrupt-parent = <&mpic>;
50 ranges;
51
52 serial@d0012000 {
b24212fb 53 compatible = "snps,dw-apb-uart";
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54 reg = <0xd0012000 0x100>;
55 reg-shift = <2>;
56 interrupts = <41>;
b24212fb 57 reg-io-width = <4>;
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58 status = "disabled";
59 };
60 serial@d0012100 {
b24212fb 61 compatible = "snps,dw-apb-uart";
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62 reg = <0xd0012100 0x100>;
63 reg-shift = <2>;
64 interrupts = <42>;
b24212fb 65 reg-io-width = <4>;
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66 status = "disabled";
67 };
68
69 timer@d0020300 {
70 compatible = "marvell,armada-370-xp-timer";
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71 reg = <0xd0020300 0x30>,
72 <0xd0021040 0x30>;
73 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
307c2bf4 74 clocks = <&coreclk 2>;
9ae6f740 75 };
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76
77 addr-decoding@d0020000 {
78 compatible = "marvell,armada-addr-decoding-controller";
79 reg = <0xd0020000 0x258>;
80 };
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81
82 sata@d00a0000 {
83 compatible = "marvell,orion-sata";
84 reg = <0xd00a0000 0x2400>;
85 interrupts = <55>;
86 clocks = <&gateclk 15>, <&gateclk 30>;
87 clock-names = "0", "1";
88 status = "disabled";
89 };
90
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91 mdio {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 compatible = "marvell,orion-mdio";
95 reg = <0xd0072004 0x4>;
96 };
97
98 ethernet@d0070000 {
99 compatible = "marvell,armada-370-neta";
100 reg = <0xd0070000 0x2500>;
101 interrupts = <8>;
4aa935a2 102 clocks = <&gateclk 4>;
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103 status = "disabled";
104 };
105
106 ethernet@d0074000 {
107 compatible = "marvell,armada-370-neta";
108 reg = <0xd0074000 0x2500>;
109 interrupts = <10>;
4aa935a2 110 clocks = <&gateclk 3>;
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111 status = "disabled";
112 };
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113
114 i2c0: i2c@d0011000 {
115 compatible = "marvell,mv64xxx-i2c";
116 reg = <0xd0011000 0x20>;
117 #address-cells = <1>;
118 #size-cells = <0>;
119 interrupts = <31>;
120 timeout-ms = <1000>;
121 clocks = <&coreclk 0>;
122 status = "disabled";
123 };
124
125 i2c1: i2c@d0011100 {
126 compatible = "marvell,mv64xxx-i2c";
127 reg = <0xd0011100 0x20>;
128 #address-cells = <1>;
129 #size-cells = <0>;
130 interrupts = <32>;
131 timeout-ms = <1000>;
132 clocks = <&coreclk 0>;
133 status = "disabled";
134 };
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135
136 rtc@10300 {
137 compatible = "marvell,orion-rtc";
138 reg = <0xd0010300 0x20>;
139 interrupts = <50>;
140 };
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141
142 mvsdio@d00d4000 {
143 compatible = "marvell,orion-sdio";
144 reg = <0xd00d4000 0x200>;
145 interrupts = <54>;
146 clocks = <&gateclk 17>;
147 status = "disabled";
148 };
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149
150 usb@d0050000 {
151 compatible = "marvell,orion-ehci";
152 reg = <0xd0050000 0x500>;
153 interrupts = <45>;
154 status = "disabled";
155 };
156
157 usb@d0051000 {
158 compatible = "marvell,orion-ehci";
159 reg = <0xd0051000 0x500>;
160 interrupts = <46>;
161 status = "disabled";
162 };
163
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164 spi0: spi@d0010600 {
165 compatible = "marvell,orion-spi";
166 reg = <0xd0010600 0x28>;
167 #address-cells = <1>;
168 #size-cells = <0>;
169 cell-index = <0>;
170 interrupts = <30>;
171 clocks = <&coreclk 0>;
172 status = "disabled";
173 };
174
175 spi1: spi@d0010680 {
176 compatible = "marvell,orion-spi";
177 reg = <0xd0010680 0x28>;
178 #address-cells = <1>;
179 #size-cells = <0>;
180 cell-index = <1>;
181 interrupts = <92>;
182 clocks = <&coreclk 0>;
183 status = "disabled";
184 };
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185 };
186};
187
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