[deliverable/linux.git] / arch / arm / boot / dts / armada-388-gp.dts

/*
 * Device Tree file for Marvell Armada 385 development board
 * (RD-88F6820-GP)
 *
 * Copyright (C) 2014 Marvell
 *
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is licensed under the terms of the GNU General Public
 *     License version 2.  This program is licensed "as is" without
 *     any warranty of any kind, whether express or implied.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "armada-388.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Marvell Armada 385 GP";
	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x80000000>; /* 2 GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;

		internal-regs {
			spi@10600 {
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_pins>;
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "st,m25p128", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <50000000>;
					m25p,fast-read;
				};
			};

			i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";
				clock-frequency = <100000>;

				expander0: pca9555@20 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					pinctrl-0 = <&pca0_pins>;
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x20>;
				};

				expander1: pca9555@21 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x21>;
				};

				eeprom@57 {
					compatible = "atmel,24c64";
					reg = <0x57>;
				};
			};

			serial@12000 {
				/*
				 * Exported on the micro USB connector CON16
				 * through an FTDI
				 */

				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};

			/* GE1 CON15 */
			ethernet@30000 {
				pinctrl-names = "default";
				pinctrl-0 = <&ge1_rgmii_pins>;
				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			/* CON4 */
			usb@58000 {
				vcc-supply = <&reg_usb2_0_vbus>;
				status = "okay";
			};

			/* GE0 CON1 */
			ethernet@70000 {
				pinctrl-names = "default";
				/*
				 * The Reference Clock 0 is used to provide a
				 * clock to the PHY
				 */
				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};


			mdio@72004 {
				pinctrl-names = "default";
				pinctrl-0 = <&mdio_pins>;

				phy0: ethernet-phy@1 {
					reg = <1>;
				};

				phy1: ethernet-phy@0 {
					reg = <0>;
				};
			};

			sata@a8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata0: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata0>;
				};

				sata1: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata1>;
				};
			};

			sata@e0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata2: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata2>;
				};

				sata3: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata3>;
				};
			};

			sdhci@d8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sdhci_pins>;
				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
				no-1-8-v;
				wp-inverted;
				bus-width = <8>;
				status = "okay";
			};

			/* CON5 */
			usb3@f0000 {
				vcc-supply = <&reg_usb2_1_vbus>;
				status = "okay";
			};

			/* CON7 */
			usb3@f8000 {
				vcc-supply = <&reg_usb3_vbus>;
				status = "okay";
			};
		};

		pcie-controller {
			status = "okay";
			/*
			 * One PCIe units is accessible through
			 * standard PCIe slot on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/*
			 * The two other PCIe units are accessible
			 * through mini PCIe slot on the board.
			 */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
			pcie@3,0 {
				/* Port 2, Lane 0 */
				status = "okay";
			};
		};

		gpio-fan {
			compatible = "gpio-fan";
			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
			gpio-fan,speed-map = <	 0 0
					      3000 1>;
		};
	};

	reg_usb3_vbus: usb3-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb3-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_0_vbus: v5-vbus0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_sata0: pwr-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata0: v5-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_12v_sata0: v12-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_sata1: pwr-sata1 {
		regulator-name = "pwr_en_sata1";
		compatible = "regulator-fixed";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata1: v5-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_12v_sata1: v12-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata1";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_sata2: pwr-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata2";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata2: v5-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_12v_sata2: v12-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata2";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_sata3: pwr-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata3";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata3: v5-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata3";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};

	reg_12v_sata3: v12-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata3";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};
};

&pinctrl {
	pca0_pins: pca0_pins {
		marvell,pins = "mpp18";
		marvell,function = "gpio";
	};
};
Commit	Line	Data
928413bd GC	1	/*
	2	* Device Tree file for Marvell Armada 385 development board
	3	* (RD-88F6820-GP)
	4	*
	5	* Copyright (C) 2014 Marvell
	6	*
	7	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	8	*
	9	* This file is dual-licensed: you can use it either under the terms
	10	* of the GPL or the X11 license, at your option. Note that this dual
	11	* licensing only applies to this file, and not this project as a
	12	* whole.
	13	*
	14	* a) This file is licensed under the terms of the GNU General Public
	15	* License version 2. This program is licensed "as is" without
	16	* any warranty of any kind, whether express or implied.
	17	*
	18	* Or, alternatively,
	19	*
	20	* b) Permission is hereby granted, free of charge, to any person
	21	* obtaining a copy of this software and associated documentation
	22	* files (the "Software"), to deal in the Software without
	23	* restriction, including without limitation the rights to use,
	24	* copy, modify, merge, publish, distribute, sublicense, and/or
	25	* sell copies of the Software, and to permit persons to whom the
	26	* Software is furnished to do so, subject to the following
	27	* conditions:
	28	*
	29	* The above copyright notice and this permission notice shall be
	30	* included in all copies or substantial portions of the Software.
	31	*
	32	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	33	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	34	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	35	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	36	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	37	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	38	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	39	* OTHER DEALINGS IN THE SOFTWARE.
	40	*/
	41
	42	/dts-v1/;
	43	#include "armada-388.dtsi"
	44	#include <dt-bindings/gpio/gpio.h>
	45
	46	/ {
	47	model = "Marvell Armada 385 GP";
	48	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
	49
	50	chosen {
9552203c	51	stdout-path = "serial0:115200n8";
928413bd GC	52	};
	53
	54	memory {
	55	device_type = "memory";
	56	reg = <0x00000000 0x80000000>; /* 2 GB */
	57	};
	58
	59	soc {
	60	ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
d716f2e8 BB	61	MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
	62	MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
	63	MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>;
928413bd GC	64
	65	internal-regs {
	66	spi@10600 {
	67	pinctrl-names = "default";
	68	pinctrl-0 = <&spi0_pins>;
	69	status = "okay";
	70
	71	spi-flash@0 {
	72	#address-cells = <1>;
	73	#size-cells = <1>;
e9f3ed4a	74	compatible = "st,m25p128", "jedec,spi-nor";
928413bd GC	75	reg = <0>; /* Chip select 0 */
	76	spi-max-frequency = <50000000>;
	77	m25p,fast-read;
	78	};
	79	};
	80
	81	i2c@11000 {
	82	pinctrl-names = "default";
	83	pinctrl-0 = <&i2c0_pins>;
	84	status = "okay";
	85	clock-frequency = <100000>;
928413bd GC	86
	87	expander0: pca9555@20 {
	88	compatible = "nxp,pca9555";
	89	pinctrl-names = "default";
	90	pinctrl-0 = <&pca0_pins>;
	91	interrupt-parent = <&gpio0>;
	92	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	93	gpio-controller;
	94	#gpio-cells = <2>;
	95	interrupt-controller;
	96	#interrupt-cells = <2>;
	97	reg = <0x20>;
	98	};
	99
	100	expander1: pca9555@21 {
	101	compatible = "nxp,pca9555";
	102	pinctrl-names = "default";
	103	interrupt-parent = <&gpio0>;
	104	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	105	gpio-controller;
	106	#gpio-cells = <2>;
	107	interrupt-controller;
	108	#interrupt-cells = <2>;
	109	reg = <0x21>;
	110	};
	111
7e5308be TP	112	eeprom@57 {
	113	compatible = "atmel,24c64";
	114	reg = <0x57>;
	115	};
928413bd GC	116	};
	117
	118	serial@12000 {
	119	/*
	120	* Exported on the micro USB connector CON16
	121	* through an FTDI
	122	*/
	123
	124	pinctrl-names = "default";
	125	pinctrl-0 = <&uart0_pins>;
	126	status = "okay";
	127	};
	128
	129	/* GE1 CON15 */
	130	ethernet@30000 {
	131	pinctrl-names = "default";
	132	pinctrl-0 = <&ge1_rgmii_pins>;
	133	status = "okay";
	134	phy = <&phy1>;
	135	phy-mode = "rgmii-id";
	136	};
	137
	138	/* CON4 */
a165c3b6	139	usb@58000 {
928413bd GC	140	vcc-supply = <&reg_usb2_0_vbus>;
	141	status = "okay";
	142	};
	143
	144	/* GE0 CON1 */
	145	ethernet@70000 {
	146	pinctrl-names = "default";
	147	/*
	148	* The Reference Clock 0 is used to provide a
	149	* clock to the PHY
	150	*/
	151	pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
	152	status = "okay";
	153	phy = <&phy0>;
	154	phy-mode = "rgmii-id";
	155	};
	156
	157
	158	mdio@72004 {
	159	pinctrl-names = "default";
	160	pinctrl-0 = <&mdio_pins>;
	161
	162	phy0: ethernet-phy@1 {
	163	reg = <1>;
	164	};
	165
	166	phy1: ethernet-phy@0 {
	167	reg = <0>;
	168	};
	169	};
	170
	171	sata@a8000 {
	172	pinctrl-names = "default";
	173	pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
	174	status = "okay";
	175	#address-cells = <1>;
	176	#size-cells = <0>;
0df5a6cc GC	177
	178	sata0: sata-port@0 {
	179	reg = <0>;
	180	target-supply = <&reg_5v_sata0>;
	181	};
	182
	183	sata1: sata-port@1 {
	184	reg = <1>;
	185	target-supply = <&reg_5v_sata1>;
	186	};
928413bd GC	187	};
	188
	189	sata@e0000 {
	190	pinctrl-names = "default";
	191	pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
	192	status = "okay";
	193	#address-cells = <1>;
	194	#size-cells = <0>;
0df5a6cc GC	195
	196	sata2: sata-port@0 {
	197	reg = <0>;
	198	target-supply = <&reg_5v_sata2>;
	199	};
	200
	201	sata3: sata-port@1 {
	202	reg = <1>;
	203	target-supply = <&reg_5v_sata3>;
	204	};
928413bd GC	205	};
	206
	207	sdhci@d8000 {
	208	pinctrl-names = "default";
	209	pinctrl-0 = <&sdhci_pins>;
	210	cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
	211	no-1-8-v;
	212	wp-inverted;
	213	bus-width = <8>;
	214	status = "okay";
	215	};
	216
	217	/* CON5 */
	218	usb3@f0000 {
	219	vcc-supply = <&reg_usb2_1_vbus>;
	220	status = "okay";
	221	};
	222
	223	/* CON7 */
	224	usb3@f8000 {
	225	vcc-supply = <&reg_usb3_vbus>;
	226	status = "okay";
	227	};
	228	};
	229
	230	pcie-controller {
	231	status = "okay";
	232	/*
	233	* One PCIe units is accessible through
	234	* standard PCIe slot on the board.
	235	*/
	236	pcie@1,0 {
	237	/* Port 0, Lane 0 */
	238	status = "okay";
	239	};
	240
	241	/*
	242	* The two other PCIe units are accessible
	243	* through mini PCIe slot on the board.
	244	*/
	245	pcie@2,0 {
	246	/* Port 1, Lane 0 */
	247	status = "okay";
	248	};
	249	pcie@3,0 {
	250	/* Port 2, Lane 0 */
	251	status = "okay";
	252	};
	253	};
	254
	255	gpio-fan {
	256	compatible = "gpio-fan";
	257	gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
	258	gpio-fan,speed-map = < 0 0
	259	3000 1>;
	260	};
	261	};
	262
	263	reg_usb3_vbus: usb3-vbus {
	264	compatible = "regulator-fixed";
	265	regulator-name = "usb3-vbus";
	266	regulator-min-microvolt = <5000000>;
	267	regulator-max-microvolt = <5000000>;
	268	enable-active-high;
269	regulator-always-on;
270	gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
271	};
272
273	reg_usb2_0_vbus: v5-vbus0 {
274	compatible = "regulator-fixed";
275	regulator-name = "v5.0-vbus0";
276	regulator-min-microvolt = <5000000>;
277	regulator-max-microvolt = <5000000>;
278	enable-active-high;
279	regulator-always-on;
280	gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
281	};
282
283	reg_usb2_1_vbus: v5-vbus1 {
284	compatible = "regulator-fixed";
285	regulator-name = "v5.0-vbus1";
286	regulator-min-microvolt = <5000000>;
287	regulator-max-microvolt = <5000000>;
288	enable-active-high;
289	regulator-always-on;
290	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
291	};
292
293	reg_usb2_1_vbus: v5-vbus1 {
294	compatible = "regulator-fixed";
295	regulator-name = "v5.0-vbus1";
296	regulator-min-microvolt = <5000000>;
297	regulator-max-microvolt = <5000000>;
298	enable-active-high;
299	regulator-always-on;
300	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
301	};
0df5a6cc GC	302
	303	reg_sata0: pwr-sata0 {
	304	compatible = "regulator-fixed";
	305	regulator-name = "pwr_en_sata0";
b5999dcb TP	306	regulator-min-microvolt = <12000000>;
b5999dcb TP	307	regulator-max-microvolt = <12000000>;
0df5a6cc GC	308	enable-active-high;
0df5a6cc GC	309	regulator-always-on;
b5999dcb	310	gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
0df5a6cc GC	311	};
	312
	313	reg_5v_sata0: v5-sata0 {
	314	compatible = "regulator-fixed";
	315	regulator-name = "v5.0-sata0";
	316	regulator-min-microvolt = <5000000>;
	317	regulator-max-microvolt = <5000000>;
	318	regulator-always-on;
	319	vin-supply = <&reg_sata0>;
	320	};
	321
	322	reg_12v_sata0: v12-sata0 {
	323	compatible = "regulator-fixed";
	324	regulator-name = "v12.0-sata0";
	325	regulator-min-microvolt = <12000000>;
	326	regulator-max-microvolt = <12000000>;
	327	regulator-always-on;
	328	vin-supply = <&reg_sata0>;
	329	};
	330
	331	reg_sata1: pwr-sata1 {
	332	regulator-name = "pwr_en_sata1";
	333	compatible = "regulator-fixed";
	334	regulator-min-microvolt = <12000000>;
	335	regulator-max-microvolt = <12000000>;
	336	enable-active-high;
	337	regulator-always-on;
	338	gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	339	};
	340
	341	reg_5v_sata1: v5-sata1 {
	342	compatible = "regulator-fixed";
	343	regulator-name = "v5.0-sata1";
	344	regulator-min-microvolt = <5000000>;
	345	regulator-max-microvolt = <5000000>;
	346	regulator-always-on;
	347	vin-supply = <&reg_sata1>;
	348	};
	349
	350	reg_12v_sata1: v12-sata1 {
	351	compatible = "regulator-fixed";
	352	regulator-name = "v12.0-sata1";
	353	regulator-min-microvolt = <12000000>;
	354	regulator-max-microvolt = <12000000>;
	355	regulator-always-on;
	356	vin-supply = <&reg_sata1>;
	357	};
	358
	359	reg_sata2: pwr-sata2 {
	360	compatible = "regulator-fixed";
	361	regulator-name = "pwr_en_sata2";
	362	enable-active-high;
	363	regulator-always-on;
	364	gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	365	};
	366
	367	reg_5v_sata2: v5-sata2 {
	368	compatible = "regulator-fixed";
	369	regulator-name = "v5.0-sata2";
	370	regulator-min-microvolt = <5000000>;
	371	regulator-max-microvolt = <5000000>;
	372	regulator-always-on;
	373	vin-supply = <&reg_sata2>;
	374	};
375
376	reg_12v_sata2: v12-sata2 {
377	compatible = "regulator-fixed";
378	regulator-name = "v12.0-sata2";
379	regulator-min-microvolt = <12000000>;
380	regulator-max-microvolt = <12000000>;
381	regulator-always-on;
382	vin-supply = <&reg_sata2>;
383	};
384
385	reg_sata3: pwr-sata3 {
386	compatible = "regulator-fixed";
387	regulator-name = "pwr_en_sata3";
388	enable-active-high;
389	regulator-always-on;
390	gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
391	};
392
393	reg_5v_sata3: v5-sata3 {
394	compatible = "regulator-fixed";
395	regulator-name = "v5.0-sata3";
396	regulator-min-microvolt = <5000000>;
397	regulator-max-microvolt = <5000000>;
398	regulator-always-on;
399	vin-supply = <&reg_sata3>;
400	};
401
402	reg_12v_sata3: v12-sata3 {
403	compatible = "regulator-fixed";
404	regulator-name = "v12.0-sata3";
405	regulator-min-microvolt = <12000000>;
406	regulator-max-microvolt = <12000000>;
407	regulator-always-on;
408	vin-supply = <&reg_sata3>;
409	};
928413bd GC	410	};
	411
	412	&pinctrl {
	413	pca0_pins: pca0_pins {
	414	marvell,pins = "mpp18";
	415	marvell,function = "gpio";
	416	};
	417	};