[deliverable/linux.git] / arch / arm / boot / dts / armada-388-gp.dts

/*
 * Device Tree file for Marvell Armada 385 development board
 * (RD-88F6820-GP)
 *
 * Copyright (C) 2014 Marvell
 *
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is licensed under the terms of the GNU General Public
 *     License version 2.  This program is licensed "as is" without
 *     any warranty of any kind, whether express or implied.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/dts-v1/;
#include "armada-388.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Marvell Armada 385 GP";
	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x80000000>; /* 2 GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

		internal-regs {
			spi@10600 {
				pinctrl-names = "default";
				pinctrl-0 = <&spi0_pins>;
				status = "okay";

				spi-flash@0 {
					#address-cells = <1>;
					#size-cells = <1>;
					compatible = "st,m25p128", "jedec,spi-nor";
					reg = <0>; /* Chip select 0 */
					spi-max-frequency = <50000000>;
					m25p,fast-read;
				};
			};

			i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";
				clock-frequency = <100000>;
				/*
				 * The EEPROM located at adresse 54 is needed
				 * for the boot - DO NOT ERASE IT -
				 */

				expander0: pca9555@20 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					pinctrl-0 = <&pca0_pins>;
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x20>;
				};

				expander1: pca9555@21 {
					compatible = "nxp,pca9555";
					pinctrl-names = "default";
					interrupt-parent = <&gpio0>;
					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
					reg = <0x21>;
				};

			};

			serial@12000 {
				/*
				 * Exported on the micro USB connector CON16
				 * through an FTDI
				 */

				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};

			/* GE1 CON15 */
			ethernet@30000 {
				pinctrl-names = "default";
				pinctrl-0 = <&ge1_rgmii_pins>;
				status = "okay";
				phy = <&phy1>;
				phy-mode = "rgmii-id";
			};

			/* CON4 */
			usb@58000 {
				vcc-supply = <&reg_usb2_0_vbus>;
				status = "okay";
			};

			/* GE0 CON1 */
			ethernet@70000 {
				pinctrl-names = "default";
				/*
				 * The Reference Clock 0 is used to provide a
				 * clock to the PHY
				 */
				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
				status = "okay";
				phy = <&phy0>;
				phy-mode = "rgmii-id";
			};


			mdio@72004 {
				pinctrl-names = "default";
				pinctrl-0 = <&mdio_pins>;

				phy0: ethernet-phy@1 {
					reg = <1>;
				};

				phy1: ethernet-phy@0 {
					reg = <0>;
				};
			};

			sata@a8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata0: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata0>;
				};

				sata1: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata1>;
				};
			};

			sata@e0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
				status = "okay";
				#address-cells = <1>;
				#size-cells = <0>;

				sata2: sata-port@0 {
					reg = <0>;
					target-supply = <&reg_5v_sata2>;
				};

				sata3: sata-port@1 {
					reg = <1>;
					target-supply = <&reg_5v_sata3>;
				};
			};

			sdhci@d8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&sdhci_pins>;
				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
				no-1-8-v;
				wp-inverted;
				bus-width = <8>;
				status = "okay";
			};

			/* CON5 */
			usb3@f0000 {
				vcc-supply = <&reg_usb2_1_vbus>;
				status = "okay";
			};

			/* CON7 */
			usb3@f8000 {
				vcc-supply = <&reg_usb3_vbus>;
				status = "okay";
			};
		};

		pcie-controller {
			status = "okay";
			/*
			 * One PCIe units is accessible through
			 * standard PCIe slot on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/*
			 * The two other PCIe units are accessible
			 * through mini PCIe slot on the board.
			 */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
			pcie@3,0 {
				/* Port 2, Lane 0 */
				status = "okay";
			};
		};

		gpio-fan {
			compatible = "gpio-fan";
			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
			gpio-fan,speed-map = <	 0 0
					      3000 1>;
		};
	};

	reg_usb3_vbus: usb3-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb3-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_0_vbus: v5-vbus0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_usb2_1_vbus: v5-vbus1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-vbus1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
	};

	reg_sata0: pwr-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata0: v5-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_12v_sata0: v12-sata0 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata0>;
	};

	reg_sata1: pwr-sata1 {
		regulator-name = "pwr_en_sata1";
		compatible = "regulator-fixed";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata1: v5-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata1";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_12v_sata1: v12-sata1 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata1";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata1>;
	};

	reg_sata2: pwr-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata2";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata2: v5-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata2";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_12v_sata2: v12-sata2 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata2";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata2>;
	};

	reg_sata3: pwr-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "pwr_en_sata3";
		enable-active-high;
		regulator-always-on;
		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
	};

	reg_5v_sata3: v5-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v5.0-sata3";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};

	reg_12v_sata3: v12-sata3 {
		compatible = "regulator-fixed";
		regulator-name = "v12.0-sata3";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		vin-supply = <&reg_sata3>;
	};
};

&pinctrl {
	pca0_pins: pca0_pins {
		marvell,pins = "mpp18";
		marvell,function = "gpio";
	};
};
Commit	Line	Data
928413bd GC	1	/*
	2	* Device Tree file for Marvell Armada 385 development board
	3	* (RD-88F6820-GP)
	4	*
	5	* Copyright (C) 2014 Marvell
	6	*
	7	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	8	*
	9	* This file is dual-licensed: you can use it either under the terms
	10	* of the GPL or the X11 license, at your option. Note that this dual
	11	* licensing only applies to this file, and not this project as a
	12	* whole.
	13	*
	14	* a) This file is licensed under the terms of the GNU General Public
	15	* License version 2. This program is licensed "as is" without
	16	* any warranty of any kind, whether express or implied.
	17	*
	18	* Or, alternatively,
	19	*
	20	* b) Permission is hereby granted, free of charge, to any person
	21	* obtaining a copy of this software and associated documentation
	22	* files (the "Software"), to deal in the Software without
	23	* restriction, including without limitation the rights to use,
	24	* copy, modify, merge, publish, distribute, sublicense, and/or
	25	* sell copies of the Software, and to permit persons to whom the
	26	* Software is furnished to do so, subject to the following
	27	* conditions:
	28	*
	29	* The above copyright notice and this permission notice shall be
	30	* included in all copies or substantial portions of the Software.
	31	*
	32	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	33	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	34	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	35	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	36	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	37	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	38	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	39	* OTHER DEALINGS IN THE SOFTWARE.
	40	*/
	41
	42	/dts-v1/;
	43	#include "armada-388.dtsi"
	44	#include <dt-bindings/gpio/gpio.h>
	45
	46	/ {
	47	model = "Marvell Armada 385 GP";
	48	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
	49
	50	chosen {
9552203c	51	stdout-path = "serial0:115200n8";
928413bd GC	52	};
	53
	54	memory {
	55	device_type = "memory";
	56	reg = <0x00000000 0x80000000>; /* 2 GB */
	57	};
	58
	59	soc {
	60	ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
	61	MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
	62
	63	internal-regs {
	64	spi@10600 {
	65	pinctrl-names = "default";
	66	pinctrl-0 = <&spi0_pins>;
	67	status = "okay";
	68
	69	spi-flash@0 {
	70	#address-cells = <1>;
	71	#size-cells = <1>;
e9f3ed4a	72	compatible = "st,m25p128", "jedec,spi-nor";
928413bd GC	73	reg = <0>; /* Chip select 0 */
	74	spi-max-frequency = <50000000>;
	75	m25p,fast-read;
	76	};
	77	};
	78
	79	i2c@11000 {
	80	pinctrl-names = "default";
	81	pinctrl-0 = <&i2c0_pins>;
	82	status = "okay";
	83	clock-frequency = <100000>;
	84	/*
	85	* The EEPROM located at adresse 54 is needed
	86	* for the boot - DO NOT ERASE IT -
	87	*/
	88
	89	expander0: pca9555@20 {
	90	compatible = "nxp,pca9555";
	91	pinctrl-names = "default";
	92	pinctrl-0 = <&pca0_pins>;
	93	interrupt-parent = <&gpio0>;
	94	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	95	gpio-controller;
	96	#gpio-cells = <2>;
	97	interrupt-controller;
	98	#interrupt-cells = <2>;
	99	reg = <0x20>;
	100	};
	101
	102	expander1: pca9555@21 {
	103	compatible = "nxp,pca9555";
	104	pinctrl-names = "default";
	105	interrupt-parent = <&gpio0>;
	106	interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
	107	gpio-controller;
	108	#gpio-cells = <2>;
	109	interrupt-controller;
	110	#interrupt-cells = <2>;
	111	reg = <0x21>;
	112	};
	113
	114	};
	115
	116	serial@12000 {
	117	/*
	118	* Exported on the micro USB connector CON16
	119	* through an FTDI
	120	*/
	121
	122	pinctrl-names = "default";
	123	pinctrl-0 = <&uart0_pins>;
	124	status = "okay";
	125	};
	126
	127	/* GE1 CON15 */
	128	ethernet@30000 {
	129	pinctrl-names = "default";
	130	pinctrl-0 = <&ge1_rgmii_pins>;
	131	status = "okay";
	132	phy = <&phy1>;
	133	phy-mode = "rgmii-id";
	134	};
	135
	136	/* CON4 */
a165c3b6	137	usb@58000 {
928413bd GC	138	vcc-supply = <&reg_usb2_0_vbus>;
	139	status = "okay";
	140	};
	141
	142	/* GE0 CON1 */
	143	ethernet@70000 {
	144	pinctrl-names = "default";
	145	/*
	146	* The Reference Clock 0 is used to provide a
	147	* clock to the PHY
	148	*/
	149	pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
	150	status = "okay";
	151	phy = <&phy0>;
	152	phy-mode = "rgmii-id";
	153	};
	154
	155
	156	mdio@72004 {
	157	pinctrl-names = "default";
	158	pinctrl-0 = <&mdio_pins>;
	159
	160	phy0: ethernet-phy@1 {
	161	reg = <1>;
	162	};
	163
	164	phy1: ethernet-phy@0 {
	165	reg = <0>;
	166	};
	167	};
	168
	169	sata@a8000 {
	170	pinctrl-names = "default";
	171	pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
	172	status = "okay";
	173	#address-cells = <1>;
	174	#size-cells = <0>;
0df5a6cc GC	175
	176	sata0: sata-port@0 {
	177	reg = <0>;
	178	target-supply = <&reg_5v_sata0>;
	179	};
	180
	181	sata1: sata-port@1 {
	182	reg = <1>;
	183	target-supply = <&reg_5v_sata1>;
	184	};
928413bd GC	185	};
	186
	187	sata@e0000 {
	188	pinctrl-names = "default";
	189	pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
	190	status = "okay";
	191	#address-cells = <1>;
	192	#size-cells = <0>;
0df5a6cc GC	193
	194	sata2: sata-port@0 {
	195	reg = <0>;
	196	target-supply = <&reg_5v_sata2>;
	197	};
	198
	199	sata3: sata-port@1 {
	200	reg = <1>;
	201	target-supply = <&reg_5v_sata3>;
	202	};
928413bd GC	203	};
	204
	205	sdhci@d8000 {
	206	pinctrl-names = "default";
	207	pinctrl-0 = <&sdhci_pins>;
	208	cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
	209	no-1-8-v;
	210	wp-inverted;
	211	bus-width = <8>;
	212	status = "okay";
	213	};
	214
	215	/* CON5 */
	216	usb3@f0000 {
	217	vcc-supply = <&reg_usb2_1_vbus>;
	218	status = "okay";
	219	};
	220
	221	/* CON7 */
	222	usb3@f8000 {
	223	vcc-supply = <&reg_usb3_vbus>;
	224	status = "okay";
	225	};
	226	};
	227
	228	pcie-controller {
	229	status = "okay";
	230	/*
	231	* One PCIe units is accessible through
	232	* standard PCIe slot on the board.
	233	*/
	234	pcie@1,0 {
	235	/* Port 0, Lane 0 */
	236	status = "okay";
	237	};
	238
	239	/*
	240	* The two other PCIe units are accessible
	241	* through mini PCIe slot on the board.
	242	*/
	243	pcie@2,0 {
	244	/* Port 1, Lane 0 */
	245	status = "okay";
	246	};
	247	pcie@3,0 {
	248	/* Port 2, Lane 0 */
	249	status = "okay";
	250	};
	251	};
	252
	253	gpio-fan {
	254	compatible = "gpio-fan";
	255	gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
	256	gpio-fan,speed-map = < 0 0
	257	3000 1>;
	258	};
	259	};
	260
	261	reg_usb3_vbus: usb3-vbus {
	262	compatible = "regulator-fixed";
	263	regulator-name = "usb3-vbus";
	264	regulator-min-microvolt = <5000000>;
	265	regulator-max-microvolt = <5000000>;
	266	enable-active-high;
267	regulator-always-on;
268	gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
269	};
270
271	reg_usb2_0_vbus: v5-vbus0 {
272	compatible = "regulator-fixed";
273	regulator-name = "v5.0-vbus0";
274	regulator-min-microvolt = <5000000>;
275	regulator-max-microvolt = <5000000>;
276	enable-active-high;
277	regulator-always-on;
278	gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
279	};
280
281	reg_usb2_1_vbus: v5-vbus1 {
282	compatible = "regulator-fixed";
283	regulator-name = "v5.0-vbus1";
284	regulator-min-microvolt = <5000000>;
285	regulator-max-microvolt = <5000000>;
286	enable-active-high;
287	regulator-always-on;
288	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
289	};
290
291	reg_usb2_1_vbus: v5-vbus1 {
292	compatible = "regulator-fixed";
293	regulator-name = "v5.0-vbus1";
294	regulator-min-microvolt = <5000000>;
295	regulator-max-microvolt = <5000000>;
296	enable-active-high;
297	regulator-always-on;
298	gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
299	};
0df5a6cc GC	300
	301	reg_sata0: pwr-sata0 {
	302	compatible = "regulator-fixed";
	303	regulator-name = "pwr_en_sata0";
b5999dcb TP	304	regulator-min-microvolt = <12000000>;
b5999dcb TP	305	regulator-max-microvolt = <12000000>;
0df5a6cc GC	306	enable-active-high;
0df5a6cc GC	307	regulator-always-on;
b5999dcb	308	gpio = <&expander0 2 GPIO_ACTIVE_HIGH>;
0df5a6cc GC	309	};
	310
	311	reg_5v_sata0: v5-sata0 {
	312	compatible = "regulator-fixed";
	313	regulator-name = "v5.0-sata0";
	314	regulator-min-microvolt = <5000000>;
	315	regulator-max-microvolt = <5000000>;
	316	regulator-always-on;
	317	vin-supply = <&reg_sata0>;
	318	};
	319
	320	reg_12v_sata0: v12-sata0 {
	321	compatible = "regulator-fixed";
	322	regulator-name = "v12.0-sata0";
	323	regulator-min-microvolt = <12000000>;
	324	regulator-max-microvolt = <12000000>;
	325	regulator-always-on;
	326	vin-supply = <&reg_sata0>;
	327	};
	328
	329	reg_sata1: pwr-sata1 {
	330	regulator-name = "pwr_en_sata1";
	331	compatible = "regulator-fixed";
	332	regulator-min-microvolt = <12000000>;
	333	regulator-max-microvolt = <12000000>;
	334	enable-active-high;
	335	regulator-always-on;
	336	gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
	337	};
	338
	339	reg_5v_sata1: v5-sata1 {
	340	compatible = "regulator-fixed";
	341	regulator-name = "v5.0-sata1";
	342	regulator-min-microvolt = <5000000>;
	343	regulator-max-microvolt = <5000000>;
	344	regulator-always-on;
	345	vin-supply = <&reg_sata1>;
	346	};
	347
	348	reg_12v_sata1: v12-sata1 {
	349	compatible = "regulator-fixed";
	350	regulator-name = "v12.0-sata1";
	351	regulator-min-microvolt = <12000000>;
	352	regulator-max-microvolt = <12000000>;
	353	regulator-always-on;
	354	vin-supply = <&reg_sata1>;
	355	};
	356
	357	reg_sata2: pwr-sata2 {
	358	compatible = "regulator-fixed";
	359	regulator-name = "pwr_en_sata2";
	360	enable-active-high;
	361	regulator-always-on;
	362	gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
	363	};
	364
	365	reg_5v_sata2: v5-sata2 {
	366	compatible = "regulator-fixed";
	367	regulator-name = "v5.0-sata2";
	368	regulator-min-microvolt = <5000000>;
	369	regulator-max-microvolt = <5000000>;
	370	regulator-always-on;
	371	vin-supply = <&reg_sata2>;
	372	};
373
374	reg_12v_sata2: v12-sata2 {
375	compatible = "regulator-fixed";
376	regulator-name = "v12.0-sata2";
377	regulator-min-microvolt = <12000000>;
378	regulator-max-microvolt = <12000000>;
379	regulator-always-on;
380	vin-supply = <&reg_sata2>;
381	};
382
383	reg_sata3: pwr-sata3 {
384	compatible = "regulator-fixed";
385	regulator-name = "pwr_en_sata3";
386	enable-active-high;
387	regulator-always-on;
388	gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
389	};
390
391	reg_5v_sata3: v5-sata3 {
392	compatible = "regulator-fixed";
393	regulator-name = "v5.0-sata3";
394	regulator-min-microvolt = <5000000>;
395	regulator-max-microvolt = <5000000>;
396	regulator-always-on;
397	vin-supply = <&reg_sata3>;
398	};
399
400	reg_12v_sata3: v12-sata3 {
401	compatible = "regulator-fixed";
402	regulator-name = "v12.0-sata3";
403	regulator-min-microvolt = <12000000>;
404	regulator-max-microvolt = <12000000>;
405	regulator-always-on;
406	vin-supply = <&reg_sata3>;
407	};
928413bd GC	408	};
	409
	410	&pinctrl {
	411	pca0_pins: pca0_pins {
	412	marvell,pins = "mpp18";
	413	marvell,function = "gpio";
	414	};
	415	};