projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| c7841473 TP |
1 | /* |
| 2 | * Device Tree file for Marvell RD-AXPWiFiAP. | |
| 3 | * | |
| 4 | * Note: this board is shipped with a new generation boot loader that | |
| 5 | * remaps internal registers at 0xf1000000. Therefore, if earlyprintk | |
| 6cc082a8 PB |
6 | * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option or the |
| 7 | * CONFIG_DEBUG_MVEBU_UART1_ALTERNATE option should be used. | |
| c7841473 TP |
8 | * |
| 9 | * Copyright (C) 2013 Marvell | |
| 10 | * | |
| 11 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 12 | * | |
| 13 | * This file is licensed under the terms of the GNU General Public | |
| 14 | * License version 2. This program is licensed "as is" without any | |
| 15 | * warranty of any kind, whether express or implied. | |
| 16 | */ | |
| 17 | ||
| 18 | /dts-v1/; | |
| 29e74f8b | 19 | #include <dt-bindings/gpio/gpio.h> |
| 5c0169d1 | 20 | #include <dt-bindings/input/input.h> |
| d10ff4d7 | 21 | #include "armada-xp-mv78230.dtsi" |
| c7841473 TP |
22 | |
| 23 | / { | |
| 24 | model = "Marvell RD-AXPWiFiAP"; | |
| 25 | compatible = "marvell,rd-axpwifiap", "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; | |
| 26 | ||
| 27 | chosen { | |
| 28 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
| 29 | }; | |
| 30 | ||
| 31 | memory { | |
| 32 | device_type = "memory"; | |
| 33 | reg = <0x00000000 0x00000000 0x00000000 0x40000000>; /* 1GB */ | |
| 34 | }; | |
| 35 | ||
| 36 | soc { | |
| d10ff4d7 EG |
37 | ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000 |
| 38 | MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; | |
| 39 | ||
| 40 | pcie-controller { | |
| 41 | status = "okay"; | |
| 42 | ||
| 43 | /* First mini-PCIe port */ | |
| 44 | pcie@1,0 { | |
| 45 | /* Port 0, Lane 0 */ | |
| 46 | status = "okay"; | |
| 47 | }; | |
| 48 | ||
| 49 | /* Second mini-PCIe port */ | |
| 50 | pcie@2,0 { | |
| 51 | /* Port 0, Lane 1 */ | |
| 52 | status = "okay"; | |
| 53 | }; | |
| 54 | ||
| 55 | /* Renesas uPD720202 USB 3.0 controller */ | |
| 56 | pcie@3,0 { | |
| 57 | /* Port 0, Lane 3 */ | |
| 58 | status = "okay"; | |
| 59 | }; | |
| 60 | }; | |
| c7841473 TP |
61 | |
| 62 | internal-regs { | |
| 6cc082a8 | 63 | /* UART0 */ |
| c7841473 | 64 | serial@12000 { |
| c7841473 TP |
65 | status = "okay"; |
| 66 | }; | |
| 67 | ||
| 6cc082a8 | 68 | /* UART1 */ |
| c7841473 | 69 | serial@12100 { |
| c7841473 TP |
70 | status = "okay"; |
| 71 | }; | |
| 72 | ||
| 73 | sata@a0000 { | |
| 74 | nr-ports = <1>; | |
| 75 | status = "okay"; | |
| 76 | }; | |
| 77 | ||
| 78 | mdio { | |
| 79 | phy0: ethernet-phy@0 { | |
| 80 | reg = <0>; | |
| 81 | }; | |
| 82 | ||
| 83 | phy1: ethernet-phy@1 { | |
| 84 | reg = <1>; | |
| 85 | }; | |
| 86 | }; | |
| 87 | ||
| 88 | ethernet@70000 { | |
| 70ee4e9d | 89 | pinctrl-0 = <&ge0_rgmii_pins>; |
| c7841473 TP |
90 | pinctrl-names = "default"; |
| 91 | status = "okay"; | |
| 92 | phy = <&phy0>; | |
| 93 | phy-mode = "rgmii-id"; | |
| 94 | }; | |
| 95 | ethernet@74000 { | |
| 70ee4e9d | 96 | pinctrl-0 = <&ge1_rgmii_pins>; |
| c7841473 TP |
97 | pinctrl-names = "default"; |
| 98 | status = "okay"; | |
| 99 | phy = <&phy1>; | |
| 100 | phy-mode = "rgmii-id"; | |
| 101 | }; | |
| 102 | ||
| 103 | spi0: spi@10600 { | |
| 104 | status = "okay"; | |
| c7841473 TP |
105 | |
| 106 | spi-flash@0 { | |
| 107 | #address-cells = <1>; | |
| 108 | #size-cells = <1>; | |
| 109 | compatible = "n25q128a13"; | |
| 110 | reg = <0>; /* Chip select 0 */ | |
| 111 | spi-max-frequency = <108000000>; | |
| 112 | }; | |
| 113 | }; | |
| c7841473 TP |
114 | }; |
| 115 | }; | |
| 116 | ||
| 117 | gpio_keys { | |
| 118 | compatible = "gpio-keys"; | |
| 119 | #address-cells = <1>; | |
| 120 | #size-cells = <0>; | |
| 70ee4e9d | 121 | pinctrl-0 = <&keys_pin>; |
| c7841473 TP |
122 | pinctrl-names = "default"; |
| 123 | ||
| 124 | button@1 { | |
| 125 | label = "Factory Reset Button"; | |
| 5c0169d1 | 126 | linux,code = <KEY_SETUP>; |
| 29e74f8b | 127 | gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; |
| c7841473 TP |
128 | }; |
| 129 | }; | |
| 130 | }; | |
| 01c43422 SH |
131 | |
| 132 | &pinctrl { | |
| 70ee4e9d | 133 | pinctrl-0 = <&phy_int_pin>; |
| 01c43422 SH |
134 | pinctrl-names = "default"; |
| 135 | ||
| 70ee4e9d | 136 | keys_pin: keys-pin { |
| 01c43422 SH |
137 | marvell,pins = "mpp33"; |
| 138 | marvell,function = "gpio"; | |
| 139 | }; | |
| 140 | ||
| 70ee4e9d | 141 | phy_int_pin: phy-int-pin { |
| 01c43422 SH |
142 | marvell,pins = "mpp32"; |
| 143 | marvell,function = "gpio"; | |
| 144 | }; | |
| 145 | }; |