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1 | /* |
2 | * Device Tree Include file for Marvell Armada XP family SoC | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | * | |
12 | * Contains definitions specific to the Armada XP MV78230 SoC that are not | |
13 | * common to all Armada XP SoCs. | |
14 | */ | |
15 | ||
16 | /include/ "armada-xp.dtsi" | |
17 | ||
18 | / { | |
19 | model = "Marvell Armada XP MV78230 SoC"; | |
20 | compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; | |
21 | ||
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22 | aliases { |
23 | gpio0 = &gpio0; | |
24 | gpio1 = &gpio1; | |
25 | }; | |
26 | ||
9d202783 GC |
27 | cpus { |
28 | #address-cells = <1>; | |
29 | #size-cells = <0>; | |
30 | ||
31 | cpu@0 { | |
32 | device_type = "cpu"; | |
33 | compatible = "marvell,sheeva-v7"; | |
34 | reg = <0>; | |
35 | clocks = <&cpuclk 0>; | |
36 | }; | |
37 | } | |
38 | ||
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39 | soc { |
40 | pinctrl { | |
41 | compatible = "marvell,mv78230-pinctrl"; | |
42 | reg = <0xd0018000 0x38>; | |
43 | }; | |
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44 | |
45 | gpio0: gpio@d0018100 { | |
46 | compatible = "marvell,armadaxp-gpio"; | |
47 | reg = <0xd0018100 0x40>, | |
48 | <0xd0018800 0x30>; | |
49 | ngpios = <32>; | |
50 | gpio-controller; | |
51 | #gpio-cells = <2>; | |
52 | interrupt-controller; | |
53 | #interrupts-cells = <2>; | |
54 | interrupts = <16>, <17>, <18>, <19>; | |
55 | }; | |
56 | ||
57 | gpio1: gpio@d0018140 { | |
58 | compatible = "marvell,armadaxp-gpio"; | |
59 | reg = <0xd0018140 0x40>, | |
60 | <0xd0018840 0x30>; | |
61 | ngpios = <17>; | |
62 | gpio-controller; | |
63 | #gpio-cells = <2>; | |
64 | interrupt-controller; | |
65 | #interrupts-cells = <2>; | |
66 | interrupts = <20>, <21>, <22>; | |
67 | }; | |
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68 | }; |
69 | }; |