projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| f3b42b7c TP |
1 | /* |
| 2 | * Device Tree Include file for Marvell Armada XP family SoC | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Marvell | |
| 5 | * | |
| 6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
| 7 | * | |
| 8 | * This file is licensed under the terms of the GNU General Public | |
| 9 | * License version 2. This program is licensed "as is" without any | |
| 10 | * warranty of any kind, whether express or implied. | |
| 11 | * | |
| 12 | * Contains definitions specific to the Armada XP MV78230 SoC that are not | |
| 13 | * common to all Armada XP SoCs. | |
| 14 | */ | |
| 15 | ||
| 16 | /include/ "armada-xp.dtsi" | |
| 17 | ||
| 18 | / { | |
| 19 | model = "Marvell Armada XP MV78230 SoC"; | |
| 20 | compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp"; | |
| 21 | ||
| 397d59f3 TP |
22 | aliases { |
| 23 | gpio0 = &gpio0; | |
| 24 | gpio1 = &gpio1; | |
| 25 | }; | |
| 26 | ||
| 9d202783 GC |
27 | cpus { |
| 28 | #address-cells = <1>; | |
| 29 | #size-cells = <0>; | |
| 30 | ||
| 31 | cpu@0 { | |
| 32 | device_type = "cpu"; | |
| 33 | compatible = "marvell,sheeva-v7"; | |
| 34 | reg = <0>; | |
| 35 | clocks = <&cpuclk 0>; | |
| 36 | }; | |
| 44cfae9a TP |
37 | |
| 38 | cpu@1 { | |
| 39 | device_type = "cpu"; | |
| 40 | compatible = "marvell,sheeva-v7"; | |
| 41 | reg = <1>; | |
| 42 | clocks = <&cpuclk 1>; | |
| 43 | }; | |
| 41be8dc1 | 44 | }; |
| 9d202783 | 45 | |
| f3b42b7c TP |
46 | soc { |
| 47 | pinctrl { | |
| 48 | compatible = "marvell,mv78230-pinctrl"; | |
| 49 | reg = <0xd0018000 0x38>; | |
| 50 | }; | |
| 397d59f3 TP |
51 | |
| 52 | gpio0: gpio@d0018100 { | |
| 5f79c651 TP |
53 | compatible = "marvell,orion-gpio"; |
| 54 | reg = <0xd0018100 0x40>; | |
| 397d59f3 TP |
55 | ngpios = <32>; |
| 56 | gpio-controller; | |
| 57 | #gpio-cells = <2>; | |
| 58 | interrupt-controller; | |
| 59 | #interrupts-cells = <2>; | |
| 5f79c651 | 60 | interrupts = <82>, <83>, <84>, <85>; |
| 397d59f3 TP |
61 | }; |
| 62 | ||
| 63 | gpio1: gpio@d0018140 { | |
| 5f79c651 TP |
64 | compatible = "marvell,orion-gpio"; |
| 65 | reg = <0xd0018140 0x40>; | |
| 397d59f3 TP |
66 | ngpios = <17>; |
| 67 | gpio-controller; | |
| 68 | #gpio-cells = <2>; | |
| 69 | interrupt-controller; | |
| 70 | #interrupts-cells = <2>; | |
| 5f79c651 | 71 | interrupts = <87>, <88>, <89>; |
| 397d59f3 | 72 | }; |
| f3b42b7c TP |
73 | }; |
| 74 | }; |